698 lines
15 KiB
Plaintext
698 lines
15 KiB
Plaintext
/*
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* P1010 RDB Device Tree Source
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*
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* Copyright 2010-2011 Freescale Semiconductor Inc.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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/dts-v1/;
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/ {
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model = "fsl,P1010";
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compatible = "fsl,P1010RDB";
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#address-cells = <2>;
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#size-cells = <2>;
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aliases {
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serial0 = &serial0;
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serial1 = &serial1;
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ethernet0 = &enet0;
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ethernet1 = &enet1;
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ethernet2 = &enet2;
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pci0 = &pci0;
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pci1 = &pci1;
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};
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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PowerPC,P1010@0 {
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device_type = "cpu";
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reg = <0x0>;
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next-level-cache = <&L2>;
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};
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};
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memory {
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device_type = "memory";
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};
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ifc@ffe1e000 {
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#address-cells = <2>;
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#size-cells = <1>;
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compatible = "fsl,ifc", "simple-bus";
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reg = <0x0 0xffe1e000 0 0x2000>;
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interrupts = <16 2 19 2>;
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interrupt-parent = <&mpic>;
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/* NOR, NAND Flashes and CPLD on board */
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/*
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ranges = <0x0 0x0 0x0 0xee000000 0x02000000
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0x1 0x0 0x0 0xff800000 0x00010000
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0x3 0x0 0x0 0xffb00000 0x00100000>;
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*/
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ranges = <0x0 0x0 0x0 0xff800000 0x00010000
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0x3 0x0 0x0 0xffb00000 0x00100000>;
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nand@0,0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "fsl,ifc-nand";
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reg = <0x0 0x0 0x10000>;
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partition@0 {
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/* This location must not be altered */
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/* 1MB for u-boot Bootloader Image */
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reg = <0x0 0x00100000>;
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label = "NAND U-Boot Image";
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};
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partition@100000 {
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/* 1MB for DTB Image */
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reg = <0x00100000 0x00100000>;
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label = "NAND DTB Image";
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};
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partition@200000 {
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/* 4MB for Linux Kernel Image */
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reg = <0x00200000 0x00400000>;
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label = "NAND Linux Kernel Image";
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};
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partition@a00000 {
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// 16MB for Compressed Root file System Image
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reg = <0x00a00000 0x01000000>;
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label = "NAND Compressed RFS Image";
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};
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/*
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partition@a00000 {
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// 15MB for JFFS2 based Root file System
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reg = <0x00a00000 0x00f00000>;
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label = "NAND JFFS2 Root File System";
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};
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partition@1900000 {
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// 7MB for User Area
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reg = <0x01900000 0x00700000>;
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label = "NAND User area";
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};
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*/
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};
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cpld@3,0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "fsl,p1010rdb-cpld";
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reg = <0x3 0x0 0x0100000>;
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bank-width = <1>;
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device-width = <1>;
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};
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};
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soc@ffe00000 {
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#address-cells = <1>;
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#size-cells = <1>;
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device_type = "soc";
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compatible = "fsl,p1020-immr", "simple-bus";
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ranges = <0x0 0x0 0xffe00000 0x100000>;
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bus-frequency = <0>; // Filled out by uboot.
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ecm-law@0 {
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compatible = "fsl,ecm-law";
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reg = <0x0 0x1000>;
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fsl,num-laws = <12>;
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};
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ecm@1000 {
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compatible = "fsl,p1020-ecm", "fsl,ecm";
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reg = <0x1000 0x1000>;
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interrupts = <16 2>;
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interrupt-parent = <&mpic>;
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};
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memory-controller@2000 {
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compatible = "fsl,p1020-memory-controller";
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reg = <0x2000 0x1000>;
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interrupt-parent = <&mpic>;
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interrupts = <16 2>;
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};
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i2c@3000 {
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#address-cells = <1>;
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#size-cells = <0>;
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cell-index = <0>;
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compatible = "fsl-i2c";
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reg = <0x3000 0x100>;
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interrupts = <43 2>;
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interrupt-parent = <&mpic>;
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dfsrr;
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};
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/*
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i2c@3100 {
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#address-cells = <1>;
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#size-cells = <0>;
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cell-index = <1>;
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compatible = "fsl-i2c";
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reg = <0x3100 0x100>;
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interrupts = <43 2>;
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interrupt-parent = <&mpic>;
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dfsrr;
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};
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*/
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serial0: serial@4500 {
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cell-index = <0>;
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device_type = "serial";
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compatible = "ns16550";
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reg = <0x4500 0x100>;
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clock-frequency = <0>;
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interrupts = <42 2>;
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interrupt-parent = <&mpic>;
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};
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serial1: serial@4600 {
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cell-index = <1>;
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device_type = "serial";
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compatible = "ns16550";
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reg = <0x4600 0x100>;
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clock-frequency = <0>;
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interrupts = <42 2>;
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interrupt-parent = <&mpic>;
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};
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/*
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spi@7000 {
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cell-index = <0>;
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "fsl,espi";
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reg = <0x7000 0x1000>;
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interrupts = <59 0x2>;
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interrupt-parent = <&mpic>;
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espi,num-ss-bits = <4>;
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mode = "cpu";
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fsl_m25p80@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "fsl,espi-flash","spansion,s25sl12801";
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reg = <0>;
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linux,modalias = "fsl_m25p80";
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modal = "s25sl128b";
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spi-max-frequency = <50000000>;
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mode = <0>;
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partition@0 {
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// 512KB for u-boot Bootloader Image
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reg = <0x0 0x00080000>;
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label = "SPI (RO) U-Boot Image";
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read-only;
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};
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partition@80000 {
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// 512KB for DTB Image
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reg = <0x00080000 0x00080000>;
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label = "SPI (RO) DTB Image";
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read-only;
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};
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partition@100000 {
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// 4MB for Linux Kernel Image
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reg = <0x00100000 0x00400000>;
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label = "SPI (RO) Linux Kernel Image";
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read-only;
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};
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partition@500000 {
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// 4MB for Compressed RFS Image
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reg = <0x00500000 0x00400000>;
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label = "SPI (RO) Compressed RFS Image";
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read-only;
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};
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partition@900000 {
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// 7MB for JFFS2 based RFS
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reg = <0x00900000 0x00700000>;
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label = "SPI (RW) JFFS2 RFS";
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};
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};
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// If SPI flash node exists legerity cannot be in device tree because both
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// are sitting at same CS #0
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// either legerity or SPI flash node will be deleted by u-boot fixup at runtime.
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legerity@0{
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compatible = "fsl,espi-slic","zarlink,le88266";
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reg = <0>;
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linux,modalias = "legerity";
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spi-max-frequency = <8000000>;
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ch1-rx-slot = <0>;
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ch1-tx-slot = <0>;
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ch2-rx-slot = <2>;
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ch2-tx-slot = <2>;
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};
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};
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*/
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gpio: gpio-controller@f000 {
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#gpio-cells = <2>;
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compatible = "fsl,mpc8572-gpio";
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reg = <0xf000 0x100>;
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interrupts = <47 0x2>;
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interrupt-parent = <&mpic>;
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gpio-controller;
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};
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tdm@16000 {
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device_type = "tdm";
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compatible = "fsl,starlite-tdm";
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reg = <0x16000 0x200 0x2c000 0x2000>;
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clock-frequency = <0>;
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interrupts = <16 8 62 8>;
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interrupt-parent = < &mpic >;
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};
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sata@18000 {
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compatible = "fsl,mpc8536-sata", "fsl,pq-sata";
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reg = <0x18000 0x1000>;
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cell-index = <1>;
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interrupts = <74 0x2>;
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interrupt-parent = <&mpic>;
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};
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sata@19000 {
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compatible = "fsl,mpc8536-sata", "fsl,pq-sata";
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reg = <0x19000 0x1000>;
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cell-index = <2>;
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interrupts = <41 0x2>;
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interrupt-parent = <&mpic>;
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};
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/*
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can0@1c000 {
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compatible = "fsl,flexcan-v1.0";
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reg = <0x1c000 0x1000>;
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interrupts = <48 0x2>;
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interrupt-parent = <&mpic>;
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fsl,flexcan-clock-source = <1>;
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fsl,flexcan-clock-divider = <2>;
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};
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can1@1d000 {
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compatible = "fsl,flexcan-v1.0";
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reg = <0x1d000 0x1000>;
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interrupts = <61 0x2>;
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interrupt-parent = <&mpic>;
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fsl,flexcan-clock-source = <1>;
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fsl,flexcan-clock-divider = <2>;
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};
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*/
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L2: l2-cache-controller@20000 {
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compatible = "fsl,p1020-l2-cache-controller";
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reg = <0x20000 0x1000>;
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cache-line-size = <32>; // 32 bytes
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cache-size = <0x40000>; // L2,256K
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interrupt-parent = <&mpic>;
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interrupts = <16 2>;
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};
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dma@21300 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "fsl,eloplus-dma";
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reg = <0x21300 0x4>;
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ranges = <0x0 0x21100 0x200>;
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cell-index = <0>;
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dma-channel@0 {
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compatible = "fsl,eloplus-dma-channel";
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reg = <0x0 0x80>;
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cell-index = <0>;
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interrupt-parent = <&mpic>;
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interrupts = <20 2>;
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};
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dma-channel@80 {
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compatible = "fsl,eloplus-dma-channel";
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reg = <0x80 0x80>;
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cell-index = <1>;
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interrupt-parent = <&mpic>;
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interrupts = <21 2>;
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};
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dma-channel@100 {
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compatible = "fsl,eloplus-dma-channel";
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reg = <0x100 0x80>;
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cell-index = <2>;
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interrupt-parent = <&mpic>;
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interrupts = <22 2>;
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};
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dma-channel@180 {
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compatible = "fsl,eloplus-dma-channel";
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reg = <0x180 0x80>;
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cell-index = <3>;
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interrupt-parent = <&mpic>;
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interrupts = <23 2>;
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};
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};
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mdio@24000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "fsl,etsec2-mdio";
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reg = <0x24000 0x1000 0xb0030 0x4>;
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phy0: ethernet-phy@0 {
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interrupt-parent = <&mpic>;
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interrupts = <3 1>;
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reg = <0x00>;
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};
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phy1: ethernet-phy@1 {
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interrupt-parent = <&mpic>;
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// interrupts = <2 1>;
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reg = <0x02>;
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};
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phy2: ethernet-phy@2 {
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interrupt-parent = <&mpic>;
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// interrupts = <2 1>;
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reg = <0x01>;
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};
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};
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mdio@25000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "fsl,etsec2-tbi";
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reg = <0x25000 0x1000 0xb1030 0x4>;
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tbi0: tbi-phy@11 {
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reg = <0x11>;
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device_type = "tbi-phy";
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};
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};
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mdio@26000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "fsl,etsec2-tbi";
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reg = <0x26000 0x1000 0xb1030 0x4>;
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tbi1: tbi-phy@11 {
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reg = <0x11>;
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device_type = "tbi-phy";
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};
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};
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ptp_timer: ptimer@b0e00 {
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compatible = "fsl,gianfar-ptp-timer";
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reg = <0xb0e00 0xb0>;
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interrupts = <68 2 69 2 70 2>;
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interrupt-parent = <&mpic>;
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tmr-prsc = <0x2>;
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cksel = <1>;
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};
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/*
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usb@22000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "fsl-usb2-dr";
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reg = <0x22000 0x1000>;
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interrupt-parent = <&mpic>;
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interrupts = <28 0x2>;
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dr_mode = "host";
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phy_type = "utmi";
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};
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*/
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crypto: crypto@30000 {
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compatible = "fsl,p4080-sec4.0", "fsl,sec4.0";
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0x30000 0x10000>;
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interrupts = <58 2>;
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interrupt-parent = <&mpic>;
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sec_jr0: jr@1000 {
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compatible = "fsl,p4080-sec4.0-job-ring", "fsl,sec4.0-job-ring";
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reg = <0x1000 0x1000>;
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interrupts = <45 2>;
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interrupt-parent = <&mpic>;
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};
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sec_jr1: jr@2000 {
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compatible = "fsl,p4080-sec4.0-job-ring", "fsl,sec4.0-job-ring";
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reg = <0x2000 0x1000>;
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interrupts = <45 2>;
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interrupt-parent = <&mpic>;
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};
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sec_jr2: jr@3000 {
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compatible = "fsl,p4080-sec4.0-job-ring", "fsl,sec4.0-job-ring";
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reg = <0x3000 0x1000>;
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interrupts = <45 2>;
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interrupt-parent = <&mpic>;
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};
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sec_jr3: jr@4000 {
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compatible = "fsl,p4080-sec4.0-job-ring", "fsl,sec4.0-job-ring";
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reg = <0x4000 0x1000>;
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interrupts = <45 2>;
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interrupt-parent = <&mpic>;
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};
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};
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enet0: ethernet@b2000 {
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#address-cells = <1>;
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#size-cells = <1>;
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device_type = "network";
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model = "eTSEC";
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compatible = "fsl,etsec2";
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fsl,index = <0x00>;
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fsl,num_rx_queues = <0x8>;
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fsl,num_tx_queues = <0x8>;
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local-mac-address = [ 00 00 00 00 00 00 ];
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interrupt-parent = <&mpic>;
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phy-handle = <&phy2>;
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tbi-handle = <&tbi1>;
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phy-connection-type = "sgmii";
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#fixed-link = <2 2 100 1 1>;
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ptimer-handle = < &ptp_timer >;
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queue-group@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0xb2000 0x1000>;
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rx-bit-map = <0xff>;
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tx-bit-map = <0xff>;
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interrupts = <31 2 32 2 33 2>;
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};
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};
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enet1: ethernet@b0000 {
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#address-cells = <1>;
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#size-cells = <1>;
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device_type = "network";
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model = "eTSEC";
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compatible = "fsl,etsec2";
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fsl,index = <0x01>;
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fsl,num_rx_queues = <0x8>;
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fsl,num_tx_queues = <0x8>;
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local-mac-address = [ 00 00 00 00 00 00 ];
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interrupt-parent = <&mpic>;
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phy-handle = <&phy0>;
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phy-connection-type = "rgmii-id";
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ptimer-handle = < &ptp_timer >;
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queue-group@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0xb0000 0x1000>;
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rx-bit-map = <0xff>;
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tx-bit-map = <0xff>;
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interrupts = <29 2 30 2 34 2>;
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};
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};
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enet2: ethernet@b1000 {
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#address-cells = <1>;
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#size-cells = <1>;
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device_type = "network";
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model = "eTSEC";
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compatible = "fsl,etsec2";
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fsl,index = <0x02>;
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fsl,num_rx_queues = <0x8>;
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fsl,num_tx_queues = <0x8>;
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local-mac-address = [ 00 00 00 00 00 00 ];
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interrupt-parent = <&mpic>;
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phy-handle = <&phy1>;
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tbi-handle = <&tbi0>;
|
|
phy-connection-type = "sgmii";
|
|
#fixed-link = <1 1 100 0 0>;
|
|
ptimer-handle = < &ptp_timer >;
|
|
queue-group@0 {
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
reg = <0xb1000 0x1000>;
|
|
rx-bit-map = <0xff>;
|
|
tx-bit-map = <0xff>;
|
|
interrupts = <35 2 36 2 40 2>;
|
|
};
|
|
};
|
|
|
|
sdhci@2e000 {
|
|
compatible = "fsl,p1020-esdhc", "fsl,esdhc";
|
|
reg = <0x2e000 0x1000>;
|
|
interrupts = <72 0x2>;
|
|
interrupt-parent = <&mpic>;
|
|
fsl,sdhci-auto-cmd12;
|
|
fsl,sdhci-adma-broken;
|
|
fsl,sdhci-adjust-timeout;
|
|
fsl,sdhci-relax-freq;
|
|
// Filled in by U-Boot
|
|
clock-frequency = <0>;
|
|
};
|
|
|
|
|
|
mpic: pic@40000 {
|
|
interrupt-controller;
|
|
#address-cells = <0>;
|
|
#interrupt-cells = <2>;
|
|
reg = <0x40000 0x40000>;
|
|
compatible = "chrp,open-pic";
|
|
device_type = "open-pic";
|
|
};
|
|
|
|
message@41400 {
|
|
compatible = "fsl,p1020-msg", "fsl,mpic-msg";
|
|
reg = <0x41400 0x200>;
|
|
interrupts = <
|
|
0xb0 2
|
|
0xb1 2
|
|
0xb2 2
|
|
0xb3 2>;
|
|
interrupt-parent = <&mpic>;
|
|
};
|
|
|
|
message@42400 {
|
|
compatible = "fsl,p1020-msg", "fsl,mpic-msg";
|
|
reg = <0x42400 0x200>;
|
|
interrupts = <
|
|
0xb4 2
|
|
0xb5 2
|
|
0xb6 2
|
|
0xb7 2>;
|
|
interrupt-parent = <&mpic>;
|
|
};
|
|
|
|
timer@41100 {
|
|
compatible = "fsl,mpic-global-timer";
|
|
reg = <0x41100 0x204>;
|
|
interrupts = <0xf7 0x2>;
|
|
interrupt-parent = <&mpic>;
|
|
};
|
|
|
|
msi@41600 {
|
|
compatible = "fsl,p1020-msi", "fsl,mpic-msi";
|
|
reg = <0x41600 0x80>;
|
|
msi-available-ranges = <0 0x100>;
|
|
interrupts = <
|
|
0xe0 0
|
|
0xe1 0
|
|
0xe2 0
|
|
0xe3 0
|
|
0xe4 0
|
|
0xe5 0
|
|
0xe6 0
|
|
0xe7 0>;
|
|
interrupt-parent = <&mpic>;
|
|
};
|
|
|
|
global-utilities@e0000 { //global utilities block
|
|
compatible = "fsl,p2020-guts";
|
|
reg = <0xe0000 0x1000>;
|
|
fsl,has-rstcr;
|
|
};
|
|
};
|
|
|
|
pci0: pcie@ffe09000 {
|
|
cell-index = <1>;
|
|
compatible = "fsl,p1010-pcie", "fsl,qoriq-pcie-v2.3", "fsl,qoriq-pcie-v2.2";
|
|
device_type = "pci";
|
|
#interrupt-cells = <1>;
|
|
#size-cells = <2>;
|
|
#address-cells = <3>;
|
|
reg = <0 0xffe09000 0 0x1000>;
|
|
bus-range = <0 255>;
|
|
ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
|
|
0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
|
|
clock-frequency = <33333333>;
|
|
interrupt-parent = <&mpic>;
|
|
interrupts = <16 2>;
|
|
interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
|
|
interrupt-map = <
|
|
// IDSEL 0x0
|
|
0000 0x0 0x0 0x1 &mpic 0x4 0x1
|
|
0000 0x0 0x0 0x2 &mpic 0x5 0x1
|
|
0000 0x0 0x0 0x3 &mpic 0x6 0x1
|
|
0000 0x0 0x0 0x4 &mpic 0x7 0x1
|
|
>;
|
|
pcie@0 {
|
|
reg = <0x0 0x0 0x0 0x0 0x0>;
|
|
#size-cells = <2>;
|
|
#address-cells = <3>;
|
|
device_type = "pci";
|
|
ranges = <0x2000000 0x0 0xa0000000
|
|
0x2000000 0x0 0xa0000000
|
|
0x0 0x20000000
|
|
|
|
0x1000000 0x0 0x0
|
|
0x1000000 0x0 0x0
|
|
0x0 0x100000>;
|
|
};
|
|
};
|
|
|
|
pci1: pcie@ffe0a000 {
|
|
cell-index = <2>;
|
|
compatible = "fsl,p1010-pcie", "fsl,qoriq-pcie-v2.3", "fsl,qoriq-pcie-v2.2";
|
|
device_type = "pci";
|
|
#interrupt-cells = <1>;
|
|
#size-cells = <2>;
|
|
#address-cells = <3>;
|
|
reg = <0 0xffe0a000 0 0x1000>;
|
|
bus-range = <0 255>;
|
|
ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
|
|
0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
|
|
clock-frequency = <33333333>;
|
|
interrupt-parent = <&mpic>;
|
|
interrupts = <16 2>;
|
|
interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
|
|
interrupt-map = <
|
|
// IDSEL 0x0
|
|
0000 0x0 0x0 0x1 &mpic 0x0 0x1
|
|
0000 0x0 0x0 0x2 &mpic 0x1 0x1
|
|
0000 0x0 0x0 0x3 &mpic 0x2 0x1
|
|
0000 0x0 0x0 0x4 &mpic 0x3 0x1
|
|
>;
|
|
pcie@0 {
|
|
reg = <0x0 0x0 0x0 0x0 0x0>;
|
|
#size-cells = <2>;
|
|
#address-cells = <3>;
|
|
device_type = "pci";
|
|
ranges = <0x2000000 0x0 0x80000000
|
|
0x2000000 0x0 0x80000000
|
|
0x0 0x20000000
|
|
|
|
0x1000000 0x0 0x0
|
|
0x1000000 0x0 0x0
|
|
0x0 0x100000>;
|
|
};
|
|
};
|
|
};
|