464 lines
11 KiB
C
464 lines
11 KiB
C
#include <linux/errno.h>
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#include <linux/delay.h>
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#include <linux/time.h>
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#include <linux/rtc.h>
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#include <linux/slab.h>
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/mm.h>
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#include <linux/fs.h>
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#include <linux/proc_fs.h>
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#include <linux/seq_file.h>
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#include <linux/string.h>
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#include <linux/irq.h>
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#include <linux/io.h>
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#include <linux/interrupt.h>
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#include "bus.h"
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#include "irq.h"
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#define MAP_KEY_IRQ (0x02)
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#define MAP_1MS_IRQ (0x03)
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#define PROC_NAME ("fpga_irq")
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enum IRQ_TYPE_NAME
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{
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MRS_KEY_IRQ = 0,
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MRS_1MS_IRQ = 1,
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};
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typedef struct __EXT_IRQ_INFO__
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{
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int irqId;
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int irqMap;
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enum IRQ_TYPE_NAME irqType;
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char irqName[32];
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} EXT_IRQ_INFO, *PEXT_IRQ_INFO;
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typedef int (*PEXT_1MSTIMER_RUNTIME)(void*);
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typedef int (*PEXT_KEY_RUNTIME)(void*);
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struct irq_hook
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{
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PEXT_1MSTIMER_RUNTIME hook;
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void* data;
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};
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static EXT_IRQ_INFO g_IrqInfo[2];
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static unsigned int g_IrqCnt = 0;
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static unsigned int g_KeyCnt = 0;
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static unsigned int* g_pIrqRegBase = NULL;
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static struct irq_hook g_1MSIrqHooks[32];
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static volatile unsigned int g_1MSPoolMap = 0xFFFFFFFF;
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static struct irq_hook g_KeyIrqHooks[32];
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static volatile unsigned int g_KeyPoolMap = 0xFFFFFFFF;
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static unsigned int g_FPGAINfoOption = 0;
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static struct tm g_LastKeyTime;
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int register_ext_timer_irq(PEXT_1MSTIMER_RUNTIME phooks, void* data)
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{
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int ret = -ENOSPC;
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int idx = 0;
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if((idx = fls(g_1MSPoolMap) - 1) >= 0)
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{
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g_1MSPoolMap &= ~(1 << idx);
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g_1MSIrqHooks[idx].hook = phooks;
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g_1MSIrqHooks[idx].data = data;
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ret = idx;
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printk("ext_irq_poll_register %x\n", ret);
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}
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return ret;
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}
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EXPORT_SYMBOL(register_ext_timer_irq);
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int unregister_ext_timer_irq(int idx)
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{
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int ret = -EINVAL;
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printk("ext_irq_poll_unregister %x\n", idx);
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if(!(g_1MSPoolMap & (1 << idx)))
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{
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g_1MSPoolMap |= (1 << idx);
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}
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return ret;
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}
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EXPORT_SYMBOL(unregister_ext_timer_irq);
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int register_key_timer_irq(PEXT_KEY_RUNTIME phooks, void* data)
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{
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int ret = -ENOSPC;
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int idx = 0;
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if((idx = fls(g_KeyPoolMap) - 1) >= 0)
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{
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g_KeyPoolMap &= ~(1 << idx);
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g_KeyIrqHooks[idx].hook = phooks;
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g_KeyIrqHooks[idx].data = data;
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ret = idx;
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printk("key_irq_poll_register %x\n", ret);
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}
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return ret;
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}
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EXPORT_SYMBOL(register_key_timer_irq);
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int unregister_key_timer_irq(int idx)
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{
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int ret = -EINVAL;
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printk("key_irq_poll_unregister %x\n", idx);
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if(!(g_KeyPoolMap & (1 << idx)))
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{
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g_KeyPoolMap |= (1 << idx);
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}
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return ret;
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}
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EXPORT_SYMBOL(unregister_key_timer_irq);
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/** disable interrput **/
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static void fpga_disable_irq(unsigned short irq)
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{
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unsigned short reg;
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reg = read_fpga16(FPGA_INT_MASK_REG_OFFSET);
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reg &= ~irq;
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write_fpga16(FPGA_INT_MASK_REG_OFFSET, reg);
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reg = read_fpga16(FPGA_INT_MASK_REG_OFFSET);
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}
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/** enable interrput **/
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static void fpga_enable_irq(unsigned short irq)
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{
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unsigned short reg;
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reg = read_fpga16(FPGA_INT_MASK_REG_OFFSET);
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reg |= irq;
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write_fpga16(FPGA_INT_MASK_REG_OFFSET, reg);
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reg = read_fpga16(FPGA_INT_MASK_REG_OFFSET);
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}
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static unsigned short fpga_irq_clr(void)
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{
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unsigned short value;
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value = read_fpga16(FPGA_INT_STATUS_REG_OFFSET);
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value &= FPGA_INT_REG_MASK;
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return value;
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}
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static void clr_int_status_bit(unsigned short value)
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{
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unsigned short reg;
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reg = read_fpga16(FPGA_INT_STATUS_REG_OFFSET);
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reg &= ~value;
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write_fpga16(FPGA_INT_STATUS_REG_OFFSET, reg);
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}
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static unsigned short get_int_status_bit(void)
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{
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unsigned short value;
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value = read_fpga16(FPGA_INT_STATUS_REG_OFFSET);
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value &= FPGA_INT_REG_MASK;
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return value;
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}
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static unsigned short get_gpio_data(void)
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{
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unsigned short value;
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value = read_fpga16(FPGA_GPIO_DATA_OFFSET);
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return value;
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}
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static irqreturn_t ext1ms_irq_handler(int irq, void* dev_id)
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{
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int i = -1;
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unsigned int bits;
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bits = ~g_1MSPoolMap;
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while((i = fls(bits) - 1) >= 0)
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{
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bits &= ~(1 << i);
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g_1MSIrqHooks[i].hook(g_1MSIrqHooks[i].data);
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}
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g_IrqCnt++;
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// Reset Irq
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in_be32((const volatile unsigned int*)&g_pIrqRegBase[MPIC_IACK_OFFSET]);
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out_be32((volatile unsigned int*)&g_pIrqRegBase[MPIC_EOI_OFFSET],
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MPIC_EOI_VALUE);
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return IRQ_HANDLED;
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}
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static irqreturn_t key_irq_handler(int irq, void* dev_id)
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{
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unsigned short status, data;
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int i = -1;
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unsigned int bits;
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struct timeval tv;
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status = get_int_status_bit();
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fpga_disable_irq(FPGA_INT_REG_MASK);
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if(status & (FPGA_GPIO_STOP_BIT))
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{
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//ndelay(10000000);
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data = get_gpio_data();
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if(data & (FPGA_GPIO_STOP_BIT))
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{
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//printk("key stop detect\n");
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do_gettimeofday(&tv);
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time_to_tm(tv.tv_sec, 0, &g_LastKeyTime);
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g_LastKeyTime.tm_yday = tv.tv_usec / 1000;
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g_KeyCnt++;
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bits = ~g_KeyPoolMap;
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while((i = fls(bits) - 1) >= 0)
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{
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bits &= ~(1 << i);
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g_KeyIrqHooks[i].hook(g_KeyIrqHooks[i].data);
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}
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}
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}
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clr_int_status_bit(FPGA_INT_REG_MASK);
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in_be32((const volatile unsigned int*)&g_pIrqRegBase[MPIC_IACK_OFFSET]);
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out_be32((volatile unsigned int*)&g_pIrqRegBase[MPIC_EOI_OFFSET],
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MPIC_EOI_VALUE);
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fpga_enable_irq(FPGA_GPIO_STOP_BIT);
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return IRQ_HANDLED;
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}
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static int mpic_irq_init(enum IRQ_TYPE_NAME irqType,
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irqreturn_t (*handler)(int irq, void* dev_id))
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{
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int ret = 0;
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unsigned int count;
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unsigned int value;
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unsigned int vector;
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value = g_pIrqRegBase[MPIC_EIVPR_OFFSET(g_IrqInfo[irqType].irqMap)];
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vector = value & MPIC_EIVPR_VECTOR_MASK;
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g_IrqInfo[irqType].irqId = irq_create_mapping(NULL, vector);
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//printk("irq %d irq no: %d\n", g_IrqInfo[irqType].irqMap, g_IrqInfo[irqType].irqId);
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value = (value & MPIC_EIVPR_VECTOR_MASK) | MPIC_EIVPR_MSK | MPIC_EIVPR_PRIORITY(
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vector) ;
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/*active high to low*/
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g_pIrqRegBase[MPIC_EIVPR_OFFSET(g_IrqInfo[irqType].irqMap)] = value;
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g_pIrqRegBase[MPIC_EIDR_OFFSET(g_IrqInfo[irqType].irqMap)] = MPIC_EIDR_VALUE;
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g_pIrqRegBase[MPIC_CTPR_OFFSET] = MPIC_CTPR_VALUE;
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g_pIrqRegBase[MPIC_GCR_OFFSET] |= MPIC_GCR_M;
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/* start irq */
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count = g_pIrqRegBase[MPIC_FRR_OFFSET];
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count = (count & IRQ_NUM_MASK) >> 16 ;
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while(count--)
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{
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in_be32((const volatile unsigned int*)&g_pIrqRegBase[MPIC_IACK_OFFSET]);
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out_be32((volatile unsigned int*)&g_pIrqRegBase[MPIC_EOI_OFFSET],
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MPIC_EOI_VALUE);
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}
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ret = request_irq(g_IrqInfo[irqType].irqId, handler, 0,
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g_IrqInfo[irqType].irqName, 0);
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g_pIrqRegBase[MPIC_MER_OFFSET] = MPIC_MER_VALUE;
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g_pIrqRegBase[MPIC_CTPR_OFFSET] = MPIC_CTPR_VALUE;
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/* start irq */
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g_pIrqRegBase[MPIC_EIVPR_OFFSET(g_IrqInfo[irqType].irqMap)] &= ~ MPIC_EIVPR_MSK;
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return ret;
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}
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static void mpic_irq_exit(enum IRQ_TYPE_NAME irqType)
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{
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mdelay(1);
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g_pIrqRegBase[MPIC_EIVPR_OFFSET(g_IrqInfo[irqType].irqMap)] |= MPIC_EIVPR_MSK;
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free_irq(g_IrqInfo[irqType].irqId, NULL);
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}
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static int fpga_irq_proc_show(struct seq_file* m, void* v)
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{
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seq_printf(m, "--------FPGA IRQ INFO--------\n");
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seq_puts(m, "\n");
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seq_puts(m, "+++++MRS_KEY_IRQ IRQ Info:+++++\n");
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seq_printf(m, "IRQ ID: %u\n", g_IrqInfo[0].irqId);
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seq_printf(m, "IRQ MAP ID: %u\n", g_IrqInfo[0].irqMap);
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seq_printf(m, "IRQ TYPE: %u\n", g_IrqInfo[0].irqType);
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seq_printf(m, "IRQ Name: %s\n", g_IrqInfo[0].irqName);
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seq_printf(m, "IRQ HOOK MAP: 0x%08X\n", g_KeyPoolMap);
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seq_printf(m, "IRQ Key Count: 0x%08X\n", g_KeyCnt);
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if(g_KeyCnt > 0)
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{
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seq_printf(m, "At [%02d:%02d:%02d:%03d] Stop Key Pressed\n",
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g_LastKeyTime.tm_hour, g_LastKeyTime.tm_min,
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g_LastKeyTime.tm_sec, g_LastKeyTime.tm_yday);
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}
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seq_puts(m, "-----MRS_KEY_IRQ IRQ Info:-----\n");
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seq_puts(m, "\n");
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seq_puts(m, "+++++MRS_1MS_IRQ IRQ Info:+++++\n");
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seq_printf(m, "IRQ ID: %u\n", g_IrqInfo[1].irqId);
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seq_printf(m, "IRQ MAP ID: %u\n", g_IrqInfo[1].irqMap);
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seq_printf(m, "IRQ TYPE: %u\n", g_IrqInfo[1].irqType);
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seq_printf(m, "IRQ Name: %s\n", g_IrqInfo[1].irqName);
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seq_printf(m, "IRQ HOOK MAP: 0x%08X\n", g_1MSPoolMap);
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seq_printf(m, "IRQ 1MS Count: 0x%08X(%u)\n", g_IrqCnt, g_IrqCnt);
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seq_puts(m, "-----MRS_1MS_IRQ IRQ Info:-----\n");
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return 0;
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}
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static int fpga_irq_proc_open(struct inode* inode, struct file* file)
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{
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return single_open(file, fpga_irq_proc_show, NULL);
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}
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static ssize_t fpga_irq_write(struct file* file, const char __user* userbuf,
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size_t count, loff_t* data)
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{
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char buf[20];
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if(count >= sizeof(buf))
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{
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printk("Input Params Error:count = %d, max size = %d\n", count, sizeof(buf));
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return -1;
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}
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if(copy_from_user(buf, userbuf, count))
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{
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printk("Copy Data To Kernel Error\n");
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return -2;
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}
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buf[count] = '\0';
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if(strict_strtoul(buf, 0, (long unsigned int*)&g_FPGAINfoOption))
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{
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return -3;
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}
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printk("Set Options To [%u]\n", g_FPGAINfoOption);
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return count;
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}
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static const struct file_operations fpga_irq_proc_fops =
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{
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.open = fpga_irq_proc_open,
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.read = seq_read,
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.llseek = seq_lseek,
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.release = single_release,
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.write = fpga_irq_write,
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};
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int mrs_irq_init(void)
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{
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int uRet = 0;
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#ifdef PLATFORM_P1010
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printk("Init PLATFORM P1010 Build:%s(%s)\n", __DATE__, __TIME__);
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#else
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printk("Init PLATFORM MPC8309 Build:%s(%s)\n", __DATE__, __TIME__);
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#endif
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proc_create(PROC_NAME, 0, NULL, &fpga_irq_proc_fops);
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fpga_bus_init();
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g_IrqInfo[0].irqId = -1;
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g_IrqInfo[0].irqMap = MAP_KEY_IRQ;
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g_IrqInfo[0].irqType = MRS_KEY_IRQ;
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strcpy(g_IrqInfo[0].irqName, "MRS_KEY_IRQ");
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g_IrqInfo[1].irqId = -1;
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g_IrqInfo[1].irqMap = MAP_1MS_IRQ;
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g_IrqInfo[1].irqType = MRS_1MS_IRQ;
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strcpy(g_IrqInfo[1].irqName, "MRS_1MS_IRQ");
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g_pIrqRegBase = (unsigned int*)ioremap(MPIC_REGS_BASE, MPIC_REG_MAP_SIZE);
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// printk("g_pRegBase = 0x%08X, g_pIrqRegBase = 0x%08X\n", g_pIrqRegBase, g_pIrqRegBase);
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/** disable all fpga interrupt **/
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fpga_disable_irq(FPGA_INT_MASK);
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/** enable the switch key **/
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fpga_enable_irq(FPGA_GPIO_STOP_BIT);
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/** enable board select interrupt **/
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fpga_enable_irq(FPGA_GPIO_BD_SEL);
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fpga_irq_clr();
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mpic_irq_init(MRS_KEY_IRQ, key_irq_handler);
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mpic_irq_init(MRS_1MS_IRQ, ext1ms_irq_handler);
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return uRet;
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}
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void mrs_irq_exit(void)
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{
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#ifdef PLATFORM_P1010
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printk("Exit PLATFORM P1010 Build:%s(%s)\n", __DATE__, __TIME__);
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#else
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printk("Exit PLATFORM MPC8309 Build:%s(%s)\n", __DATE__, __TIME__);
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#endif
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mpic_irq_exit(MRS_KEY_IRQ);
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mpic_irq_exit(MRS_1MS_IRQ);
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if(g_pIrqRegBase != NULL)
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{
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iounmap(g_pIrqRegBase);
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g_pIrqRegBase = NULL;
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}
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fpga_bus_exit();
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remove_proc_entry(PROC_NAME, NULL);
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}
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