90 lines
2.4 KiB
C
90 lines
2.4 KiB
C
|
#ifndef _MIRROR_DRV_H_
|
|||
|
|
#define _MIRROR_DRV_H_
|
|||
|
|
|
|||
|
|
#define MAX_SWITCH_PORT (14)
|
|||
|
|
|
|||
|
|
/**
|
|||
|
|
* @var typedef __MIRROR_ERROR_CODE__ MIRROR_ERROR_CODE
|
|||
|
|
* @brief
|
|||
|
|
*/
|
|||
|
|
/**
|
|||
|
|
* @enum __MIRROR_ERROR_CODE__
|
|||
|
|
* @brief
|
|||
|
|
*/
|
|||
|
|
typedef enum __MIRROR_ERROR_CODE__
|
|||
|
|
{
|
|||
|
|
ERR_NO_ERROR = 0, ///< <20><EFBFBD><DEB4><EFBFBD>
|
|||
|
|
ERR_INPUT_PARAMS, ///< <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|||
|
|
ERR_DEV_UNVALID, ///< <20>豸<EFBFBD><E8B1B8>Ч<EFBFBD><D0A7><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|||
|
|
ERR_MALLOC_MEMORY, ///< <20><><EFBFBD><EFBFBD><EFBFBD>ڴ<EFBFBD>ʧ<EFBFBD><CAA7>
|
|||
|
|
ERR_CONVERT_STR, ///< <20>ַ<EFBFBD><D6B7><EFBFBD>ת<EFBFBD><D7AA>ʧ<EFBFBD><CAA7>
|
|||
|
|
|
|||
|
|
ERR_UNSUPPORT_PORT = 10,
|
|||
|
|
|
|||
|
|
ERR_SPI_TRANSFER = 100, ///< I2C <20>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>ʧ<EFBFBD><CAA7>
|
|||
|
|
ERR_SPI_UNINIT, ///< I2C <20>豸δ<E8B1B8><CEB4>ʼ<EFBFBD><CABC>
|
|||
|
|
ERR_SPI_DEVICE, ///< δ֪ I2C <20>豸
|
|||
|
|
|
|||
|
|
ERR_UNSUPPORT_BOARD = 200, ///< <20><>֧<EFBFBD>ֵİ忨
|
|||
|
|
ERR_IOC_UNKNOWNCMD, ///< δ֪<CEB4><D6AA><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|||
|
|
} MIRROR_ERROR_CODE;
|
|||
|
|
|
|||
|
|
typedef enum __BCM_PORT_NAME__
|
|||
|
|
{
|
|||
|
|
BCM_PORT_UNKNOWN = -1,
|
|||
|
|
FE0_BOARD_SLOT1 = 0,
|
|||
|
|
FE1_BOARD_SLOT2,
|
|||
|
|
FE2_BOARD_SLOT3,
|
|||
|
|
FE3_BOARD_SLOT4,
|
|||
|
|
FE4_BOARD_SLOT5,
|
|||
|
|
FE5_BOARD_FSLOT1,
|
|||
|
|
FE6_MSB_ETH0,
|
|||
|
|
FE7_SG_ETH0,
|
|||
|
|
FE8_MSB_FE1,
|
|||
|
|
FE9_MSB_FE2,
|
|||
|
|
FE10_MSB_FE3,
|
|||
|
|
FE11_DM_TC,
|
|||
|
|
GE0_MSB_GE = 25,
|
|||
|
|
GE1_BOARD_FSLOT2 = 26,
|
|||
|
|
} BCM_PORT_NAME;
|
|||
|
|
|
|||
|
|
typedef enum __MIRROR_MASK__
|
|||
|
|
{
|
|||
|
|
MIRROR_MASK_DISABLE = 0,
|
|||
|
|
MIRROR_MASK_ENABLE = (1 << 7),
|
|||
|
|
MIRROR_MASK_OUT_ENABLE = (1 << 0),
|
|||
|
|
MIRROR_MASK_IN_ENABLE = (1 << 1),
|
|||
|
|
} MIRROR_MASK;
|
|||
|
|
|
|||
|
|
typedef struct __BCM_PORT__
|
|||
|
|
{
|
|||
|
|
const BCM_PORT_NAME portName; ///< <20>˿<EFBFBD><CBBF><EFBFBD><EFBFBD><EFBFBD>
|
|||
|
|
BCM_PORT_NAME mirrorPort; ///< <20>˿ڵľ<DAB5><C4BE><EFBFBD><EFBFBD>˿<EFBFBD><CBBF><EFBFBD><EFBFBD><EFBFBD>
|
|||
|
|
MIRROR_MASK mirrorMask; ///< <20>˿ھ<CBBF><DABE><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|||
|
|
// const char* pPortDesc; ///< <20>˿<EFBFBD><CBBF><EFBFBD>ʾ<EFBFBD><CABE><EFBFBD><EFBFBD>
|
|||
|
|
} BCM_PORT, *PBCM_PORT;
|
|||
|
|
|
|||
|
|
#if 0
|
|||
|
|
typedef struct __SWITCH_PORT__
|
|||
|
|
{
|
|||
|
|
//int mirrorEnable;
|
|||
|
|
//char portPos[32];
|
|||
|
|
|
|||
|
|
BCM_PORT bcmPortInfo;
|
|||
|
|
} SWITCH_PORT, *PSWITCH_PORT;
|
|||
|
|
#endif
|
|||
|
|
|
|||
|
|
typedef struct __MIRROR_HAL_DEV__
|
|||
|
|
{
|
|||
|
|
struct class* pDevClass; ///< <20>豸ע<E8B1B8><D7A2><EFBFBD><EFBFBD>Ϣ
|
|||
|
|
struct spi_master* pSPIMaster; ///< SPI <20>豸ָ<E8B1B8><D6B8>
|
|||
|
|
struct spi_device* pSPIDevice; ///< SPI <20><><EFBFBD><EFBFBD><EFBFBD>豸
|
|||
|
|
int bEnabled; ///< <20>Ƿ<EFBFBD><C7B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD>˿ھ<CBBF><DABE><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|||
|
|
// BCM_PORT bcmPortInfo[MAX_SWITCH_PORT]; ///< <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>˿<EFBFBD><CBBF><EFBFBD>Ϣ
|
|||
|
|
} MIRROR_HAL_DEV, *PMIRROR_HAL_DEV;
|
|||
|
|
|
|||
|
|
PMIRROR_HAL_DEV DRV_GetDrvDetail(void);
|
|||
|
|
|
|||
|
|
const char* GetBCMPortName(BCM_PORT_NAME bcmPort);
|
|||
|
|
#endif
|