70 lines
2.0 KiB
C
70 lines
2.0 KiB
C
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#ifndef _BUS_H_
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#define _BUS_H_
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#define CSBAR (0xFFE00000)
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#define FPGA_BUS_REG_OFFSET (0x1e000)
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#define FPGA_BUS_REG_MAP_SIZE (0x2000)
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#define FPGA_BUS_BASE (0xffb00000)
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#define FPGA_BUS_MAP_SIZE (0x10000)
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#define FPGA_BUS_CSPR3_OFFSET (0x34 >> 2)
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#define FPGA_BUS_AMASK3_OFFSET (0xc4 >> 2)
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#define FPGA_BUS_CSOR3_OFFSET (0x154 >>2)
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#define FPGA_BUS_CCR_OFFSET (0x44c >>2)
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#define FPGA_BUS_FTIM0_OFFSET (0x250 >>2)
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#define FPGA_BUS_FTIM1_OFFSET (0x254 >>2)
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#define FPGA_BUS_FTIM2_OFFSET (0x258 >>2)
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/** RD **/
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#define FPGA_CARD_TYPE_OFFSET (0x0)
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#define FPGA_CPLD_VER_OFFSET (0x1)
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#define FPGA_USER_ID_LOW_OFF (0x2)
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#define FPGA_USER_ID_HIGH_OFF (0x3)
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/** WR **/
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#define FPGA_GLOBAL_REG_OFFSET (0x10)
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#define FPGA_GPIO_CFG_OFFSET (0x11)
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#define FPGA_GPIO_DATA_OFFSET (0x12)
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#define FPGA_INT_MASK_REG_OFFSET (0x13)
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#define FPGA_INT_STATUS_REG_OFFSET (0x14)
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/** FPGA INTERRUPT ALL MASK **/
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#define FPGA_INT_REG_MASK (0xff)
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/** gpio bit define **/
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#define FPGA_GPIO_BD_SEL (1<<0x0)
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#define FPGA_GPIO_PEAK_BIT (1<<0x1)
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#define FPGA_GPIO_ALARM_LED (1<<0x2)
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#define FPGA_GPIO_RUN_LED (1<<0x3)
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#define FPGA_GPIO4_BIT (1<<0x4)
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#define FPGA_GPIO5_BIT (1<<0x5)
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#define FPGA_GPIO6_BIT (1<<0x6)
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#define FPGA_GPIO7_BIT (1<<0x7)
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#define FPGA_GPIO_STOP_BIT (FPGA_GPIO7_BIT)
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#define FPGA_GPIO_MRS_PHY (FPGA_GPIO4_BIT|FPGA_GPIO5_BIT|FPGA_GPIO6_BIT)
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#define FPGA_INT_MASK (0xff)
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/** FPGA 1,2,3 = PEAK ,ALARM LED ,RUN LED as output ,others as input **/
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#define GPIO_DEFAULT_CFG (FPGA_GPIO_PEAK_BIT |FPGA_GPIO_ALARM_LED |FPGA_GPIO_RUN_LED)
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/** TDM ,GPIO MULTIPLE PINS AS GPIO **/
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#define TDM_GPIO_SEL (1 << 2)
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#define GLOBAL_DEFAULT_CFG ( TDM_GPIO_SEL)
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int fpga_bus_init(void);
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void fpga_bus_exit(void);
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unsigned short read_fpga16(unsigned short offset);
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void write_fpga16(unsigned short offset, unsigned short value);
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int p1010_irq_init(void);
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void p1010_irq_exit(void);
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#endif
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