403 lines
10 KiB
C
Executable File
403 lines
10 KiB
C
Executable File
/*
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* (C) Copyright 2007-2013
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* Allwinner Technology Co., Ltd. <www.allwinnertech.com>
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* Jerry Wang <wangflord@allwinnertech.com>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <malloc.h>
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#include <asm/io.h>
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#include <fastboot.h>
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#include <asm/arch/nand_bsp.h>
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#include <mmc.h>
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#include <android_misc.h>
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#include <sunxi_mbr.h>
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#include <boot_type.h>
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#include <sys_partition.h>
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#include <sys_config_old.h>
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#include <power/sunxi/axp.h>
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DECLARE_GLOBAL_DATA_PTR;
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void enable_smp(void)
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{
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/* SMP status is controlled by bit 6 of the CP15 Aux Ctrl Reg */
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asm volatile("MRC p15, 0, r0, c1, c0, 1"); /* Read ACTLR */
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asm volatile("ORR r0, r0, #0x040"); /* Set bit 6 */
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asm volatile("MCR p15, 0, r0, c1, c0, 1"); /* Write ACTLR */
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}
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/*
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************************************************************************************************************
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*
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* function
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*
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* name :
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*
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* parmeters :
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*
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* return :
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*
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* note :
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*
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*
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************************************************************************************************************
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*/
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/* add board specific code here */
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int board_init(void)
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{
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gd->bd->bi_arch_number = LINUX_MACHINE_ID;
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gd->bd->bi_boot_params = (PHYS_SDRAM_1 + 0x100);
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debug("board_init storage_type = %d\n", uboot_spare_head.boot_data.storage_type);
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/* we should open this bit before cache&mmu enable. */
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/* the cache is useless if smp bit is not set,although cache has been enabled. */
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enable_smp();
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return 0;
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}
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char* board_hardware_info(void)
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{
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static char *hardware_info = "sun8iw6p1";
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return hardware_info;
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}
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extern int axp81_probe(void);
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/**
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* platform_axp_probe -detect the pmu on board
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* @sunxi_axp_dev_pt: pointer to the axp array
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* @max_dev: the max num of pmu
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* returns:
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* the num of pmu
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*/
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int platform_axp_probe(sunxi_axp_dev_t *sunxi_axp_dev_pt[], int max_dev)
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{
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int pmu_id;
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/* axp has been probe by boot0 */
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pmu_id = uboot_spare_head.boot_ext[0].data[0];
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if (pmu_id > 0) {
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printf("boot0 probe pmu_type = 0x%x\n", pmu_id);
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sunxi_axp_dev_pt[0] = &sunxi_axp_81;
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return 1;
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}
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if (axp81_probe()) {
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printf("probe axp81X failed\n");
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sunxi_axp_dev_pt[0] = &sunxi_axp_null;
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return 0;
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}
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/* pmu type AXP81X */
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tick_printf("PMU: AXP81X found\n");
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sunxi_axp_dev_pt[0] = &sunxi_axp_81;
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/* find one axp */
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return 1;
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}
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/*
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************************************************************************************************************
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*
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* function
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*
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* name :
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*
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* parmeters :
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*
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* return :
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*
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* note :
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*
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*
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************************************************************************************************************
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*/
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void dram_init_banksize(void)
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{
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#if 0
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/*
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* We should init the Dram options, and kernel get it by tag.
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*/
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int dram_size;
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int ret;
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/* gd->ram_size = get_ram_size((long *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE); */
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ret = script_parser_fetch("dram_para", "dram_para1", &dram_size, 1);
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if (!ret) {
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dram_size &= 0xffff;
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if (dram_size) {
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gd->bd->bi_dram[0].size = dram_size * 1024 * 1024;
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} else {
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gd->bd->bi_dram[0].size = get_ram_size((long *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE);
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}
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} else {
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gd->bd->bi_dram[0].size = get_ram_size((long *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE);
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}
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#else
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uint dram_size = 0;
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dram_size = uboot_spare_head.boot_data.dram_scan_size;
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if (dram_size) {
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gd->bd->bi_dram[0].size = dram_size * 1024 * 1024;
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} else {
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gd->bd->bi_dram[0].size =
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get_ram_size((long *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE);
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}
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print_size(gd->bd->bi_dram[0].size, "");
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putc('\n');
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#endif
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gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
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}
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/*
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************************************************************************************************************
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*
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* function
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*
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* name :
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*
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* parmeters :
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*
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* return :
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*
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* note :
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*
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*
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************************************************************************************************************
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*/
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int dram_init(void)
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{
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uint *addr;
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/* gd->ram_size = get_ram_size((long *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE); */
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/* memcpy((void *)BOOT_STANDBY_DRAM_PARA_ADDR, uboot_spare_head.boot_data.dram_para, 32 * 4); // add by jerry */
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addr = (uint *)uboot_spare_head.boot_data.dram_para;
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#if 0
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if (addr[4]) {
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gd->ram_size = (addr[4] & 0xffff) * 1024 * 1024;
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} else {
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gd->ram_size = get_ram_size((long *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE);
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}
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#else
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uint dram_size = 0;
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dram_size = uboot_spare_head.boot_data.dram_scan_size;
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if (dram_size) {
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gd->ram_size = dram_size * 1024 * 1024;
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} else {
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gd->ram_size = get_ram_size((long *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE);
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}
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/* reserve trusted dram */
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/* what is this used for? */
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/* if(gd->securemode == SUNXI_SECURE_MODE_WITH_SECUREOS) */
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/* gd->ram_size -= 64 * 1024 * 1024; */
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print_size(gd->ram_size, "");
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putc('\n');
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#endif
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puts("dram_para_set start\n");
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script_parser_patch("dram_para", "dram_clk", &addr[0], 1);
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script_parser_patch("dram_para", "dram_type", &addr[1], 1);
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script_parser_patch("dram_para", "dram_zq", &addr[2], 1);
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script_parser_patch("dram_para", "dram_odt_en", &addr[3], 1);
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script_parser_patch("dram_para", "dram_para1", &addr[4], 1);
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script_parser_patch("dram_para", "dram_para2", &addr[5], 1);
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script_parser_patch("dram_para", "dram_mr0", &addr[6], 1);
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script_parser_patch("dram_para", "dram_mr1", &addr[7], 1);
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script_parser_patch("dram_para", "dram_mr2", &addr[8], 1);
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script_parser_patch("dram_para", "dram_mr3", &addr[9], 1);
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script_parser_patch("dram_para", "dram_tpr0", &addr[10], 1);
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script_parser_patch("dram_para", "dram_tpr1", &addr[11], 1);
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script_parser_patch("dram_para", "dram_tpr2", &addr[12], 1);
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script_parser_patch("dram_para", "dram_tpr3", &addr[13], 1);
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script_parser_patch("dram_para", "dram_tpr4", &addr[14], 1);
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script_parser_patch("dram_para", "dram_tpr5", &addr[15], 1);
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script_parser_patch("dram_para", "dram_tpr6", &addr[16], 1);
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script_parser_patch("dram_para", "dram_tpr7", &addr[17], 1);
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script_parser_patch("dram_para", "dram_tpr8", &addr[18], 1);
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script_parser_patch("dram_para", "dram_tpr9", &addr[19], 1);
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script_parser_patch("dram_para", "dram_tpr10", &addr[20], 1);
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script_parser_patch("dram_para", "dram_tpr11", &addr[21], 1);
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script_parser_patch("dram_para", "dram_tpr12", &addr[22], 1);
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script_parser_patch("dram_para", "dram_tpr13", &addr[23], 1);
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puts("dram_para_set end\n");
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return 0;
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}
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#ifdef CONFIG_GENERIC_MMC
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extern int sunxi_mmc_init(int sdc_no);
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int board_mmc_init(bd_t *bis)
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{
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sunxi_mmc_init(bis->bi_card_num);
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return 0;
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}
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void board_mmc_pre_init(int card_num)
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{
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bd_t *bd;
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bd = gd->bd;
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gd->bd->bi_card_num = card_num;
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mmc_initialize(bd);
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/* gd->bd->bi_card_num = card_num; */
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}
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int board_mmc_get_num(void)
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{
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return gd->boot_card_num;
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}
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void board_mmc_set_num(int num)
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{
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gd->boot_card_num = num;
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}
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/* int mmc_get_env_addr(struct mmc *mmc, u32 *env_addr) {
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*env_addr = sunxi_partition_get_offset_byname(CONFIG_SUNXI_ENV_PARTITION);
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return 0;
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} */
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#endif
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#ifdef CONFIG_DISPLAY_BOARDINFO
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int checkboard(void)
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{
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tick_printf("Board: SUN6I\n");
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return 0;
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}
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#endif
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int cpu0_set_detected_paras(void)
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{
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return 0;
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}
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#ifdef CONFIG_CMD_NET
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#ifdef CONFIG_USB_ETHER
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extern int sunxi_udc_probe(void);
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#ifdef CONFIG_USE_UBOOT_SERIALNO
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extern int get_serial_num_from_chipid(char* serial);
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static int sunxi_serial_num_is_zero(char *serial)
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{
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int i = 0;
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get_serial_num_from_chipid(serial);
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while (i < 20) {
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if (serial[i] != '0')
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break;
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i++;
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}
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if (i == 20)
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return 0;
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else
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return 1;
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}
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#endif
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static void sunxi_random_ether_addr(void)
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{
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int i = 0;
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char serial[128] = {0};
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ulong tmp = 0;
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char tmp_s[5] = "";
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unsigned long long rand = 0;
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uchar usb_net_addr[6];
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char mac[18] = "";
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char tmp_mac = 0;
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int ret = 0;
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/*
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* get random mac address from serial num if it's not zero, or from timer.
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*/
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#ifdef CONFIG_USE_UBOOT_SERIALNO
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ret = sunxi_serial_num_is_zero(serial);
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#endif
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if (ret == 1) {
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for(i = 0; i < 6; i++) {
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if (i == 0)
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strncpy(tmp_s, serial + 16, 4);
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else if ((i == 1) || (i == 4))
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strncpy(tmp_s, serial + 12, 4);
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else if (i == 2)
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strncpy(tmp_s, serial + 8, 4);
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else
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strncpy(tmp_s, serial + 4, 4);
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tmp = simple_strtoul(tmp_s, NULL, 16);
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rand = (tmp) * 0xfedf4fd;
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rand = rand * 0xd263f967 + 0xea6f22ad8235;
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usb_net_addr[i] = (uchar)(rand % 0x100);
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}
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} else {
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for(i = 0; i < 6; i++) {
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rand = get_timer_masked() * 0xfedf4fd;
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rand = rand * 0xd263f967 + 0xea6f22ad8235;
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usb_net_addr[i] = (uchar)(rand % 0x100);
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}
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}
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/*
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* usbnet_hostaddr, usb_net_addr[0] = 0xxx xx10
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*/
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tmp_mac = usb_net_addr[0] & 0x7e;
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tmp_mac = tmp_mac | 0x02;
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sprintf(mac, "%02x:%02x:%02x:%02x:%02x:%02x", tmp_mac, usb_net_addr[1],usb_net_addr[2],
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usb_net_addr[3],usb_net_addr[4],usb_net_addr[5]);
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setenv("usbnet_hostaddr", mac);
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/*
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* usbnet_devaddr, usb_net_addr[0] = 1xxx xx10
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*/
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tmp_mac = usb_net_addr[0] & 0xfe;
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tmp_mac = tmp_mac | 0x82;
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sprintf(mac, "%02x:%02x:%02x:%02x:%02x:%02x", tmp_mac, usb_net_addr[1],usb_net_addr[2],
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usb_net_addr[3],usb_net_addr[4],usb_net_addr[5]);
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setenv("usbnet_devaddr", mac);
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}
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#endif
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int board_eth_init(bd_t *bis)
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{
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int rc = 0;
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#if defined(CONFIG_USB_ETHER)
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sunxi_random_ether_addr();
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sunxi_udc_probe();
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usb_eth_initialize(bis);
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#endif
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return rc;
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}
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#endif
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