269 lines
8.0 KiB
C
Executable File
269 lines
8.0 KiB
C
Executable File
/*
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* (C) Copyright 2016
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*Allwinner Technology Co., Ltd. <www.allwinnertech.com>
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*zhouhuacai <zhouhuacai@allwinnertech.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __WINE_CONFIG_H
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#define __WINE_CONFIG_H
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#include "sunxi-base.h"
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#undef DEBUG
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#ifndef __KERNEL__
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#define __KERNEL__
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#endif
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/* #define DEBUG */
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#define FPGA_PLATFORM
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#define CONFIG_TARGET_NAME sun50iw9p1
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#define CONFIG_ARCH_SUN50IW9P1
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#define CONFIG_ARM_A53
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/* #define CONFIG_SUPPORT_DDR4 */
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/*********************************************************************
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*platform memory map
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**********************************************************************/
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#define CONFIG_SYS_SRAM_BASE (0x20000) /* sram */
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#define CONFIG_SYS_SRAM_SIZE (0x8000)
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/* #define CONFIG_SYS_SRAMA2_BASE (0x100000) */
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/* #define CONFIG_SYS_SRAMA2_SIZE (0x1C000) */
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#define CONFIG_SYS_SRAMC_BASE (0x28000)
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#define CONFIG_SYS_SRAMC_SIZE (0x30000)
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#define PLAT_SDRAM_BASE 0x40000000 /* dram */
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#define CONFIG_SYS_SDRAM_BASE 0x40000000
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#define SDRAM_OFFSET(x) (0x40000000+(x))
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#define CONFIG_SYS_TEXT_BASE 0x4A000000
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/*********************************************************************
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*boot0 run address config
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**********************************************************************/
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#define CONFIG_BOOT0_RUN_ADDR (0x20000) /* sram a */
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#define CONFIG_TOC0_RUN_ADDR (0x20480) /* sram a */
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#define CONFIG_FES1_RUN_ADDR (0x28000) /* sram c */
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#define CONFIG_BOOT0_RET_ADDR (CONFIG_SYS_SRAM_BASE)
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#define CONFIG_TOC0_RET_ADDR (0)
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#define CONFIG_FES1_RET_ADDR (CONFIG_SYS_SRAMC_BASE + 0x7210)
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#define BOOT_COMMON_STACK \
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(CONFIG_SYS_SRAMC_BASE+CONFIG_SYS_SRAMC_SIZE)
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#define CONFIG_NORMAL_BOOT_STACK BOOT_COMMON_STACK
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#define CONFIG_SECURE_BOOT_STACK BOOT_COMMON_STACK
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/*********************************************************************
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*CPUs and ATF run address config
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**********************************************************************/
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#define SCP_SRAM_BASE (CONFIG_SYS_SRAMA2_BASE)
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#define SCP_SRAM_SIZE (CONFIG_SYS_SRAMA2_SIZE)
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#define BL31_BASE PLAT_TRUSTED_DRAM_BASE
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#define BL31_SIZE (0x100000)
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#define OPTEE_BASE (0x48600000)
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#define SCP_DRAM_BASE (PLAT_TRUSTED_DRAM_BASE+BL31_SIZE)
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#define SCP_DRAM_SIZE (0x4000)
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#define SCP_CODE_DRAM_OFFSET (0x1C000)
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/*********************************************************************
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*uboot run address config
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**********************************************************************/
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#define CONFIG_SYS_TEXT_BASE 0x4A000000
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/*********************************************************************
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*uboot common config support
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**********************************************************************/
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/* #define CONFIG_SUNXI_SECURE_STORAGE */
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/* #define CONFIG_SUNXI_SECURE_SYSTEM */
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#define PMU_SCRIPT_NAME "charger0"
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#define FDT_PATH_REGU "regulator0"
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#define CONFIG_SUNXI_CORE_VOL 900
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#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
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/*#define CONFIG_SUNXI_KEY_SUPPORT*/
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/* #define CONFIG_SUNXI_KEY_BURN */
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/* #define CONFIG_SUNXI_DRAGONBOARD_SUPPORT */
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#define CONFIG_LZMA
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#define CONFIG_DETECT_RTC_BOOT_MODE
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/*#define CONFIG_SYS_I2C*/
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/*#define CONFIG_I2C_MULTI_BUS*/
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/*#define CONFIG_SYS_MAX_I2C_BUS 4*/
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#ifdef CONFIG_AXP_USE_I2C
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#define CONFIG_SUNXI_I2C
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#define CONFIG_CPUS_I2C
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#define CONFIG_SYS_I2C_SPEED 400000
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#define CONFIG_SYS_I2C_SLAVE 0x36
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#endif
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/* #define CONFIG_AXP_USE_RSB */
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#ifdef CONFIG_AXP_USE_RSB
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#define CONFIG_SUNXI_RSB_NCAT
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#endif
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#define FEL_BASE 0x20
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#define SUNXI_FEL_ADDR_IN_SECURE (0x64)
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#define SUNXI_RUN_EFEX_FLAG (0x5AA5A55A)
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#define SUNXI_RUN_EFEX_ADDR (SUNXI_RTC_BASE + 0x108)
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/* #define CONFIG_SUNXI_DMA */
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#define CONFIG_SUNXI_CHIPID
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/*#define CONFIG_SUNXI_ARISC_EXIST*/
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/* #define CONFIG_SUNXI_ARISC_NOT_RESET */
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/* #define CONFIG_SUNXI_MULITCORE_BOOT */
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/* #define CONFIG_SUNXI_HDCP_IN_SECURESTORAGE */
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/* #define CONFIG_BOOTLOGO_DISABLE */
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/*#define CONFIG_SUNXI_LOGBUFFER*/
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/* #define CONFIG_GPT_SUPPORT */
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#ifdef CONFIG_GPT_SUPPORT
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#define CONFIG_SUNXI_GPT
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#define CONFIG_EFI_PARTITION
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#define CONFIG_CONVERT_CARD0_TO_GPT
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#endif
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#define CONFIG_SUNXI_USER_KEY
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#define CONFIG_SUNXI_SERIAL
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#define CONFIG_GPADC_KEY
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/*********************************************************************
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*uboot cmd support
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**********************************************************************/
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#define CONFIG_CMD_IRQ
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#define CONFIG_CMD_ELF
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#define CONFIG_CMD_BOOTA
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#define CONFIG_CMD_MEMORY
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#define CONFIG_CMD_FAT /* with this we can access bootfs in nand */
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#define CONFIG_CMD_BOOTA /* boot android image */
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#define CONFIG_CMD_RUN /* run a command */
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#define CONFIG_CMD_BOOTD /* boot the default command */
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#define CONFIG_CMD_FASTBOOT
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#define CONFIG_CMD_SUNXI_SPRITE
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#define CONFIG_CMD_SUNXI_TIMER
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#define CONFIG_CMD_SUNXI_EFEX
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#define CONFIG_CMD_SUNXI_SHUTDOWN
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#define CONFIG_CMD_SUNXI_BMP
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#define CONFIG_CMD_SUNXI_BURN
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#define CONFIG_CMD_SUNXI_MEMTEST
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#define CONFIG_CMD_FDT
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#define CONFIG_CMD_LZMADEC
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#define CONFIG_CMD_SUNXI_PMU
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#define CONFIG_CMD_SUNXI_SYSCFG
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#ifdef CONFIG_SUNXI_DMA
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#define CONFIG_SUNXI_CMD_DMA
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#endif
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#define CONFIG_SUNXI_CMD_SMC
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/*********************************************************************
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*module support
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**********************************************************************/
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#define CONFIG_SUNXI_MODULE_SPRITE
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/*#define CONFIG_SUNXI_MODULE_NAND*/
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#define CONFIG_SUNXI_MODULE_SDMMC
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#define CONFIG_SUNXI_MODULE_USB
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/* #define CONFIG_SUNXI_MODULE_AXP */
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/* #define CONFIG_SUNXI_MODULE_DISPLAY */
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#ifdef CONFIG_SUNXI_MODULE_SDMMC
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/* mmc config */
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#define CONFIG_STORAGE_MEDIA_MMC
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#define CONFIG_MMC
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#define CONFIG_GENERIC_MMC
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#define CONFIG_CMD_MMC
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#define CONFIG_MMC_SUNXI
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#define CONFIG_MMC_SUNXI_USE_DMA
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#define CONFIG_STORAGE_EMMC
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/* #define CONFIG_MMC_LOGICAL_OFFSET (20 * 1024 * 1024/512) */
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#endif
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#define CONFIG_MMC_LOGICAL_OFFSET (20 * 1024 * 1024/512)
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#ifdef CONFIG_SUNXI_MODULE_NAND
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/* Nand config */
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#define CONFIG_STORAGE_MEDIA_NAND
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#define CONFIG_NAND
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#define CONFIG_STORAGE_NAND
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#define CONFIG_NAND_SUNXI
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#define CONFIG_SYS_MAX_NAND_DEVICE 1
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#define CONFIG_SYS_NAND_BASE 0x00
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#endif
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#ifdef CONFIG_SUNXI_MODULE_USB
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#define CONFIG_USBD_HS
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/*#define CONFIG_USB_EHCI_SUNXI*/
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/*for usb host*/
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#ifdef CONFIG_USB_EHCI_SUNXI
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#define CONFIG_EHCI_DCACHE
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#define CONFIG_CMD_USB
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#define CONFIG_USB_STORAGE
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#define CONFIG_USB_EHCI
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#endif
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/* #define CONFIG_USB_ETHER */
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#ifdef CONFIG_USB_ETHER
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/* net support */
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#define CONFIG_CMD_NET
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#define CONFIG_NET_MULTI
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#define CONFIG_CMD_PING
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#define CONFIG_CMD_NFS
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/*
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* Reducing the ARP timeout from default 5000UL to 1000UL we speed up the
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* initial TFTP transfer or PING, etc, should the user wish one, significantly.
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*/
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#define CONFIG_ARP_TIMEOUT 1000UL
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/* USB SUSPORT */
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#define CONFIG_USB_ETHER
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#define CONFIG_USB_ETH_RNDIS
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#define CONFIG_USB_GADGET_DUALSPEED
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#define CONFIG_USB_SUNXI_UDC0
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#endif
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#endif
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#ifdef CONFIG_SUNXI_MODULE_DISPLAY
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#define CONFIG_SUNXI_DISPLAY
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#define CONFIG_VIDEO_SUNXI_V3
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/*#define CONFIG_SUNXI_MODULE_HDMI*/
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/*#define CONFIG_SUNXI_MODULE_TV*/
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#define CONFIG_SUNXI_MODULE_PWM
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#define CONFIG_SUNXI_MODULE_CLK
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/* #define CONFIG_EINK_PANEL_USED */
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#endif
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#ifdef CONFIG_SUNXI_MODULE_AXP
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#define CONFIG_SUNXI_AXP
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#define CONFIG_SUNXI_AXP858
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#define CONFIG_SUNXI_AXP2585
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#define CONFIG_CHARGER_PMU
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#define CONFIG_SUNXI_AXP_CONFIG_ONOFF
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#define CONFIG_SUNXI_PIO_POWER_MODE
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#endif
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/* #define CONFIG_SYS_DCACHE_OFF */
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#define CONFIG_OPTEE25
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/* #define CONFIG_WIDEVINE_KEY_INSTALL */
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/* #define CONFIG_KEYMASTER_KEY_INSTALL */
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/*********************************************************************
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*crash_dump support
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**********************************************************************/
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#define CONFIG_SUNXI_CRASH
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#endif /* __CONFIG_H */
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