542 lines
17 KiB
C
Executable File
542 lines
17 KiB
C
Executable File
/*
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* (C) Copyright 2017-2020
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*Allwinner Technology Co., Ltd. <www.allwinnertech.com>
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*zhouhuacai <zhouhuacai@allwinnertech.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __SUNXI_CONFIG_H
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#define __SUNXI_CONFIG_H
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#include <asm/arch/platform.h>
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#undef DEBUG
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#ifndef __KERNEL__
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#define __KERNEL__
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#endif
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//#define DEBUG
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#define FPGA_PLATFORM
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#define CONFIG_SUNXI_CRASH
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#define LINUX_MACHINE_ID 4137
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#define UBOOT_VERSION "3.0.0"
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#define UBOOT_PLATFORM "1.0.0"
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#define CONFIG_MACH_TYPE 0xffffffff
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#define CONFIG_TARGET_NAME sun50iw6p1
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#define SUNXI_NCAT_VERSION1
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#define CONFIG_STORAGE_MEDIA_NAND
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#define CONFIG_STORAGE_MEDIA_MMC
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#define CONFIG_SUNXI_MULITCORE_BOOT
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#define CONFIG_LZMA
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#define CONFIG_SUNXI_CORE_VOL 900
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#define CONFIG_BOOT0_CPU1_STACK_SIZE 0x1000
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#define CONFIG_SYS_GENERIC_BOARD
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#define HAVE_VENDOR_COMMON_LIB
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/*
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* High Level Configuration Options
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*/
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//#define CONFIG_SUNXI_WINE_FPGA
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#define CONFIG_ALLWINNER /* It's a Allwinner chip */
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#define CONFIG_SUNXI /* which is sunxi family */
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#define CONFIG_ARCH_SUN50IW6P1
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#define CONFIG_ARM_A53
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#define CONFIG_SUNXI_SECURE_STORAGE
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#define CONFIG_SUNXI_SECURE_SYSTEM
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#define CONFIG_SUNXI_HDCP_IN_SECURESTORAGE
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#define CONFIG_SYS_SRAM_BASE (0x20000)
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#define CONFIG_SYS_SRAMA1_BASE (0x20000)
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#define CONFIG_SYS_SRAMA1_SIZE (0x8000)
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#define CONFIG_SYS_SRAMA2_BASE (0x100000)
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#define CONFIG_SYS_SRAMA2_SIZE (0x18000)
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#define CONFIG_SYS_SRAMC_BASE (0x28000)
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#define CONFIG_SYS_SRAMC_SIZE (120<<10)
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#define PLAT_SDRAM_BASE 0x40000000
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//trusted dram area
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#define PLAT_TRUSTED_DRAM_BASE (PLAT_SDRAM_BASE+(128<<20))
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#define PLAT_TRUSTED_DRAM_SIZE 0x01000000
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//uboot run addr
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#define CONFIG_SYS_TEXT_BASE 0x4A000000
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//book pkg addr
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#define CONFIG_BOOTPKG_STORE_IN_DRAM_BASE (CONFIG_SYS_SDRAM_BASE + 0x2e00000)
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//toco mmu
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#define TOC0_MMU_BASE_ADDRESS (CONFIG_SYS_SDRAM_BASE + 0x2800000)
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//boot0 stack
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#define CONFIG_BOOT0_STACK_BOTTOM (CONFIG_SYS_SRAMC_BASE+CONFIG_SYS_SRAMC_SIZE)
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//dram base for uboot
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#define CONFIG_SYS_SDRAM_BASE (PLAT_SDRAM_BASE)
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//base addr for boot 0 to load the fw image
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#define BL31_BASE (PLAT_TRUSTED_DRAM_BASE) //bl31:0x40000000-0x40200000
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#define BL31_SIZE (0x100000) //1M
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#define SCP_SRAM_BASE (CONFIG_SYS_SRAMA2_BASE)
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#define SCP_SRAM_SIZE (CONFIG_SYS_SRAMA2_SIZE)
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#define SCP_DRAM_BASE (PLAT_TRUSTED_DRAM_BASE+BL31_SIZE)
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#define SCP_DRAM_SIZE (0x4000)
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#define SCP_CODE_DRAM_OFFSET (0x18000)
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//fdt addr for kernel
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#define CONFIG_SUNXI_FDT_ADDR (CONFIG_SYS_SDRAM_BASE+0x04000000)
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/* parameter for boot */
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#define CONFIG_SUNXI_PARAMETER_ADDR (CONFIG_SYS_SDRAM_BASE + 0x03F00000)
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//serial number
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#define CONFIG_SUNXI_SERIAL
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// the sram base address, and the stack address in stage1
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#define CONFIG_SYS_INIT_RAM_ADDR 0x20000
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#define CONFIG_SYS_INIT_RAM_SIZE 0x00007ff0
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#define CONFIG_BOOT0_SIZE_LIMIT (64<<20)
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#define CONFIG_SYS_INIT_SP_OFFSET \
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(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
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#define CONFIG_SYS_INIT_SP_ADDR \
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(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
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//for usb efex -- tools private data
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#define SRAM_AREA_A CONFIG_SYS_INIT_RAM_ADDR
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#define CONFIG_NR_DRAM_BANKS 1
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#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE /* SDRAM Bank #1 */
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#define PHYS_SDRAM_1_SIZE (512 << 20) /* 0x20000000, 512 MB Bank #1 */
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#define CONFIG_NONCACHE_MEMORY
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#define CONFIG_NONCACHE_MEMORY_SIZE (16 * 1024 * 1024)
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/*
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* define malloc space
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* Size of malloc() pool
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* 1MB = 0x100000, 0x100000 = 1024 * 1024
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*/
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#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 20))
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#define FASTBOOT_TRANSFER_BUFFER (CONFIG_SYS_SDRAM_BASE + 0x01000000)
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#define FASTBOOT_TRANSFER_BUFFER_SIZE (256 << 20)
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#define FASTBOOT_ERASE_BUFFER (CONFIG_SYS_SDRAM_BASE)
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#define FASTBOOT_ERASE_BUFFER_SIZE (16 << 20)
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/* SMP Definitions */
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#define CPU_RELEASE_ADDR CONFIG_SYS_INIT_SP_ADDR
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/* Generic Timer Definitions */
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#define COUNTER_FREQUENCY 0x18000000 /* 24MHz */
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/*
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* define all parameters
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*/
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#define FEL_BASE (0x20)
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#define SUNXI_RUN_EFEX_FLAG (0x5AA5A55A)
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#define SUNXI_RUN_EFEX_ADDR (0x07000000 + 0x108)
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#define DRAM_PARA_STORE_ADDR (CONFIG_SYS_SDRAM_BASE + 0x00800000)
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//#define SYS_CONFIG_MEMBASE (CONFIG_SYS_SDRAM_BASE + 0x00010000)
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#define CONFIG_RELOCATE_SYSCONIFG
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#define CONFIG_RELOCATE_PARAMETER
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#define CONFIG_SUNXI_LOGBUFFER
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#define SUNXI_DISPLAY_FRAME_BUFFER_ADDR (CONFIG_SYS_SDRAM_BASE + 0x06400000)
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#define SUNXI_DISPLAY_FRAME_BUFFER_SIZE 0x01000000
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#define CONFIG_SUNXI_ESM_HDCP
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#define SUNXI_ESM_IMG_SIZE_ADDR (0x42b00000)
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#define SUNXI_ESM_IMG_BUFF_ADDR (0x42b00000 + 16)
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#define SUNXI_LOGO_COMPRESSED_LOGO_SIZE_ADDR (0x43000000)
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#define SUNXI_LOGO_COMPRESSED_LOGO_BUFF (0x43000000 + 16)
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#define SUNXI_SHUTDOWN_CHARGE_COMPRESSED_LOGO_SIZE_ADDR (0x43100000)
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#define SUNXI_SHUTDOWN_CHARGE_COMPRESSED_LOGO_BUFF (0x43100000 + 16)
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#define SUNXI_ANDROID_CHARGE_COMPRESSED_LOGO_SIZE_ADDR (0x43200000)
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#define SUNXI_ANDROID_CHARGE_COMPRESSED_LOGO_BUFF (0x43200000 + 16)
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/*
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* define const value
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*/
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#define BOOT_USB_DETECT_DELAY_TIME (1000)
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#define FW_BURN_UDISK_MIN_SIZE (2 * 1024)
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#define BOOT_MOD_ENTER_STANDBY (0)
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#define BOOT_MOD_EXIT_STANDBY (1)
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#define MEMCPY_TEST_DST (CONFIG_SYS_SDRAM_BASE)
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#define MEMCPY_TEST_SRC (CONFIG_SYS_SDRAM_BASE + 0x06000000)
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//boot0 fes --start
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#define BOOT_PUB_HEAD_VERSION "1100"
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#define EGON_VERSION "1100"
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#define SUNXI_DRAM_PARA_MAX 32
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#define CONFIG_BOOT0_RET_ADDR (CONFIG_SYS_SRAM_BASE)
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#define CONFIG_BOOT0_RUN_ADDR (0x20000)
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#define CONFIG_FES1_RET_ADDR (0x28000+0x7210)
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#define CONFIG_FES1_RUN_ADDR (0x28000)
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#define CONFIG_SUNXI_CHIPID
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//boot0 fes --end
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/****************************************************************************************/
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/* */
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/* the fowllowing defines are used in sbrom */
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/* */
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/****************************************************************************************/
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#define CONFIG_SBROMSW_BASE (CONFIG_SYS_SRAM_BASE)
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#define CONFIG_DBG_BUF_SIZE (8*1024)
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#define CONFIG_STACK_BASE (CONFIG_SYS_SRAMC_BASE+CONFIG_SYS_SRAMC_SIZE-CONFIG_DBG_BUF_SIZE)
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#define CONFIG_DEBUG_BASE (CONFIG_STACK_BASE)
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#define CONFIG_NORMAL_DEBUG_BASE (CONFIG_SYS_SRAMC_BASE)
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#define CONFIG_HEAP_BASE (CONFIG_SYS_SDRAM_BASE + 0x800000)
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#define CONFIG_HEAP_SIZE (16 * 1024 * 1024)
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#define CONFIG_TOC0_RET_ADDR (0)
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#define CONFIG_TOC0_RUN_ADDR (0x20A00)
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#define CONFIG_TOC0_CONFIG_ADDR (CONFIG_SBROMSW_BASE + 0x80)
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#define CONFIG_TOC1_STORE_IN_DRAM_BASE (CONFIG_SYS_SDRAM_BASE + 0x2e00000)
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#define PAGE_BUF_FOR_BOOT0 (CONFIG_SYS_SDRAM_BASE + 16 * 1024 * 1024)
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#define SUNXI_FEL_ADDR_IN_SECURE (0x00000064)
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#define CONFIG_SUNXI_KEY_LADDER
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/****************************************************************************************/
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/* */
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/* all the defines are finished */
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/* */
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/****************************************************************************************/
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//#define SUNXI_DMA_LINK_NULL (0x1ffff800)
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#define CONFIG_USE_ARCH_MEMCPY
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#define CONFIG_USE_ARCH_MEMSET
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/*
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* Display CPU and Board information
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*/
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//#define CONFIG_DISPLAY_CPUINFO
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//#define CONFIG_DISPLAY_BOARDINFO
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#undef CONFIG_DISPLAY_CPUINFO
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#undef CONFIG_DISPLAY_BOARDINFO
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/* Serial & console */
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#define CONFIG_SYS_NS16550
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#define CONFIG_SYS_NS16550_SERIAL
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#define CONFIG_SYS_NS16550_REG_SIZE (-4) /* ns16550 reg in the low bits of cpu reg */
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#define CONFIG_SYS_NS16550_CLK (24000000)
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#define CONFIG_SYS_NS16550_COM1 SUNXI_UART0_BASE
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#define CONFIG_SYS_NS16550_COM2 SUNXI_UART1_BASE
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#define CONFIG_SYS_NS16550_COM3 SUNXI_UART2_BASE
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#define CONFIG_SYS_NS16550_COM4 SUNXI_UART3_BASE
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#define CONFIG_NS16550_FIFO_ENABLE (1)
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#define CONFIG_CONS_INDEX 1 /* which serial channel for console */
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//#define CONFIG_CONS_INDEX 3 /* which serial channel for console */
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#define CONFIG_SETUP_MEMORY_TAGS
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#define CONFIG_CMDLINE_TAG
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#define CONFIG_INITRD_TAG
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#define CONFIG_CMDLINE_EDITING
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/*
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* Reducing the ARP timeout from default 5000UL to 1000UL we speed up the
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* initial TFTP transfer or PING, etc, should the user wish one, significantly.
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*/
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#define CONFIG_ARP_TIMEOUT 1000UL
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/*
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* Miscellaneous configurable options
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*/
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#define CONFIG_SYS_LONGHELP /* undef to save memory */
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#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
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#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
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#define CONFIG_SYS_PROMPT "sunxi#"
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#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
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#define CONFIG_SYS_PBSIZE 384 /* Print Buffer Size */
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#define CONFIG_SYS_MAXARGS 32 /* max number of command args */
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/* Boot Argument Buffer Size */
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#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
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/* memtest works on */
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#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
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#define CONFIG_SYS_MEMTEST_END ((CONFIG_SYS_SDRAM_BASE + 256)<<20) /* 256M */
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#define CONFIG_SYS_LOAD_ADDR 0x50000000 /* default load address */
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#define CONFIG_SYS_HZ 1000
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/* valid baudrates */
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#define CONFIG_BAUDRATE 115200
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#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
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/*-----------------------------------------------------------------------
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* FLASH and environment organization
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*/
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#define CONFIG_SYS_NO_FLASH
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#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* 256 KiB */
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#define CONFIG_IDENT_STRING " Allwinner Technology "
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#define CONFIG_ENV_IS_IN_SUNXI_FLASH /* we store env in one partition of our nand */
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#define CONFIG_SUNXI_ENV_PARTITION "env" /* the partition name */
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/*------------------------------------------------------------------------
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* we save the environment in a nand partition, the partition name is defined
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* in sysconfig.fex, which must be the same as CONFIG_SUNXI_NAND_ENV_PARTITION
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* if not, below CONFIG_ENV_ADDR and CONFIG_ENV_SIZE will be where to store env.
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* */
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#define CONFIG_ENV_ADDR (53 << 20) /* 16M */
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#define CONFIG_ENV_SIZE (128 << 10) /* 128KB */
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#define CONFIG_CMD_SAVEENV
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"bootdelay=3\0" \
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"bootcmd=run setargs_nand boot_normal\0" \
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"console=ttyS0,115200\0" \
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"nand_root=/dev/nandd\0" \
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"mmc_root=/dev/mmcblk0p7\0" \
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"init=/init\0" \
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"loglevel=8\0" \
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"setargs_nand=setenv bootargs console=${console} root=${nand_root}" \
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"init=${init} loglevel=${loglevel} partitions=${partitions}\0" \
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"setargs_mmc=setenv bootargs console=${console} root=${mmc_root}" \
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"init=${init} loglevel=${loglevel} partitions=${partitions}\0" \
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"boot_normal=sunxi_flash read 4007f800 boot;boota 4007f800\0" \
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"boot_recovery=sunxi_flash read 4007f800 recovery;boota 4007f800\0" \
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"boot_fastboot=fastboot\0"
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#define CONFIG_SUNXI_SPRITE_ENV_SETTINGS \
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"bootdelay=0\0" \
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"bootcmd=run sunxi_sprite_test\0" \
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"console=ttyS0,115200\0" \
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"sunxi_sprite_test=sprite_test read\0"
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#define CONFIG_BOOTDELAY 1
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#define CONFIG_BOOTCOMMAND "nand read 50000000 boot;boota 50000000"
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#define CONFIG_SYS_BOOT_GET_CMDLINE
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#define CONFIG_AUTO_COMPLETE
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#define CONFIG_DOS_PARTITION
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#define CONFIG_USE_IRQ
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#define CONFIG_SUNXI_DMA
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#define CONFIG_OF_LIBFDT
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#define CONFIG_OF_CONTROL
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#define CONFIG_ANDROID_BOOT_IMAGE /*image is android boot image*/
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#define CONFIG_USBD_HS
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#define BOARD_LATE_INIT /* init the fastboot partitions */
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#define CONFIG_SUNXI_KEY_BURN
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#define CONFIG_WIDEVINE_KEY_INSTALL
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#define CONFIG_KEYMASTER_KEY_INSTALL
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/*#define CONFIG_SUNXI_HDCP_HASH*/
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#define CONFIG_RSSK_INIT
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#define CONFIG_SYS_I2C
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#define CONFIG_I2C_MULTI_BUS
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#define CONFIG_SYS_MAX_I2C_BUS 4
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#define CONFIG_SUNXI_I2C
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#define CONFIG_CPUS_I2C
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#define CONFIG_AXP_USE_I2C
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#define CONFIG_SYS_I2C_SPEED 400000
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#define CONFIG_SYS_I2C_SLAVE 0x36
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#define CONFIG_SUNXI_KEY_SUPPORT
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#define CONFIG_SUNXI_ARISC_EXIST
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#define CONFIG_SUNXI_SID_SECURITY_STATUS
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/*-----------------------------------------------------------------------
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* Stack sizes
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*
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* The stack sizes are set up in start.S using the settings below
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*/
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#define CONFIG_STACKSIZE (256 << 10) /* 256 KiB */
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#define LOW_LEVEL_SRAM_STACK 0x00013FFC
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#ifdef CONFIG_USE_IRQ
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#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */
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#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
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#endif
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/***************************************
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*module support: sdmmc&&nand platform | spinor platform
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****************************************/
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#define CONFIG_SUNXI_MODULE_SPRITE
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#define CONFIG_SUNXI_MODULE_NAND
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#define CONFIG_SUNXI_MODULE_SDMMC
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//#define CONFIG_SUNXI_MODULE_AXP
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#define CONFIG_SUNXI_MODULE_USB
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#define CONFIG_SUNXI_MODULE_DISPLAY
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/***************************************************************
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*
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* all the config command
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*
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***************************************************************/
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#define CONFIG_CMD_BOOTA /* boot android image */
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#define CONFIG_CMD_RUN /* run a command */
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#define CONFIG_CMD_BOOTD /* boot the default command */
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#define CONFIG_CMD_FDT
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#define CONFIG_CMD_FAT /* with this we can access bootfs in nand */
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#define CONFIG_CMD_IRQ
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#define CONFIG_CMD_RECOVERY
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#define CONFIG_CMD_ELF
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#define CONFIG_CMD_MEMORY
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#define CONFIG_CMD_FASTBOOT
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#define CONFIG_CMD_SUNXI_SPRITE
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#define CONFIG_CMD_SUNXI_TIMER
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#define CONFIG_CMD_SUNXI_EFEX
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#define CONFIG_CMD_SUNXI_SHUTDOWN
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#define CONFIG_CMD_SUNXI_BMP
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#ifdef CONFIG_SUNXI_KEY_BURN
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#define CONFIG_CMD_SUNXI_BURN
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#endif
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#define CONFIG_CMD_SUNXI_MEMTEST
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#define CONFIG_SUNXI_CMD_SMC
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#ifdef CONFIG_SUNXI_MODULE_SDMMC
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/* mmc config */
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#define CONFIG_MMC
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#define CONFIG_GENERIC_MMC
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#define CONFIG_CMD_MMC
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#define CONFIG_MMC_SUNXI
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#define CONFIG_MMC_SUNXI_USE_DMA
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#define CONFIG_STORAGE_EMMC
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#define CONFIG_MMC_LOGICAL_OFFSET (20 * 1024 * 1024/512)
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#endif
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#ifdef CONFIG_SUNXI_MODULE_NAND
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/* Nand config */
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#define CONFIG_NAND
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#define CONFIG_STORAGE_NAND
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#define CONFIG_NAND_SUNXI
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//#define CONFIG_CMD_NAND /* NAND support */
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#define CONFIG_SYS_MAX_NAND_DEVICE 1
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#define CONFIG_SYS_NAND_BASE 0x00
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#endif
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#ifdef CONFIG_SUNXI_MODULE_DISPLAY
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#define CONFIG_SUNXI_DISPLAY
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#define CONFIG_VIDEO_SUNXI_V3
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#define CONFIG_SUNXI_MODULE_HDMI2
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#define CONFIG_SUNXI_MODULE_TV
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#define CONFIG_SUNXI_MODULE_CLK
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#define CONFIG_SUNXI_MODULE_PWM
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/* bootGUI config */
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#define ENABLE_ADVERT_PICTURE
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#define CONFIG_BOOT_GUI
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#define UPDATE_DISPLAY_MODE
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#endif
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#define CONFIG_USE_AC200
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#ifdef CONFIG_USE_AC200
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#ifndef CONFIG_SUNXI_MODULE_PWM
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#define CONFIG_SUNXI_MODULE_PWM
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#endif
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#define CONFIG_SUNXI_I2C
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#define CONFIG_CPUS_I2C
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#define CONFIG_SYS_I2C_AC200_SPEED 200000
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#define CONFIG_SYS_I2C_AC200_SLAVE 0x10
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#endif
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#define PMU_SCRIPT_NAME "charger0"
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#define FDT_PATH_REGU "regulator0"
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#ifdef CONFIG_SUNXI_MODULE_AXP
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#define CONFIG_SUNXI_AXP
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#define CONFIG_SUNXI_AXP806
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#define CONFIG_SUNXI_AXP_CONFIG_ONOFF
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#define CONFIG_SUNXI_PIO_POWER_MODE
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#endif
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#ifdef CONFIG_SUNXI_MODULE_SPINOR
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#define CONFIG_SUNXI_SPI
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#define CONFIG_SUNXI_SPINOR
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#define CONFIG_SPINOR_LOGICAL_OFFSET ((512 - 16) * 1024/512)
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#define UBOOT_START_SECTOR_IN_SPINOR (24*1024/512)
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#define SPINOR_STORE_BUFFER_SIZE (2<<20)
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#endif
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#ifdef CONFIG_SUNXI_MODULE_USB
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#define CONFIG_USBD_HS
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#define CONFIG_USB_EHCI_SUNXI
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/*for usb host*/
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#ifdef CONFIG_USB_EHCI_SUNXI
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#define CONFIG_EHCI_DCACHE
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#define CONFIG_CMD_USB
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#define CONFIG_USB_STORAGE
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#define CONFIG_USB_EHCI
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#endif
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//#define CONFIG_USB_ETHER
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#ifdef CONFIG_USB_ETHER
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/* USB SUSPORT */
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#define CONFIG_USB_ETH_RNDIS
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#define CONFIG_USB_SUNXI_UDC0
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#define CONFIG_USB_GADGET_DUALSPEED
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|
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/* net support */
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#define CONFIG_CMD_NET
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#define CONFIG_NET_MULTI
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#define CONFIG_CMD_PING
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#define CONFIG_CMD_NFS
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#endif
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|
|
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#endif
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|
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/*box_standby support*/
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|
#define CONFIG_BOX_STANDBY
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|
|
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/* CONFIG_ARCH_HOMELET && OPEN IR CTRL FUNC*/
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/*#define CONFIG_ARCH_HOMELET */
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/*#define CONFIG_BOOT_PARAMETER */
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/*#define CONFIG_SUNXI_IR */
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/*#define CONFIG_SUNXI_IR_NEC_DECODE */
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|
/*#define CONFIG_IR_BOOT_RECOVERY */
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/*#define IR_BASE (0x07040000) */
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|
|
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//#define CONFIG_SYS_DCACHE_OFF
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|
|
|
/* ethernet support */
|
|
/* #define CONFIG_SUNXI_GETH */
|
|
#ifdef CONFIG_SUNXI_GETH
|
|
#define CONFIG_SUNXI_EXT_PHY
|
|
#ifdef CONFIG_USE_AC200
|
|
#define CONFIG_PHY_SUNXI_ACX00
|
|
#endif
|
|
#define CONFIG_CMD_NET
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|
#define CONFIG_CMD_PING
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|
#define CONFIG_HARD_CHECKSUM
|
|
#define CONFIG_CMD_MII
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|
#define CONFIG_ETHADDR 72:D6:05:4F:B9:3B
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|
#define CONFIG_IPADDR 192.168.200.254
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|
#define CONFIG_SERVERIP 192.168.200.20
|
|
#define CONFIG_NETMASK 255.255.255.0
|
|
#define CONFIG_GATEWAYIP 192.168.200.1
|
|
#endif
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|
|
|
/* support optee25 */
|
|
#define CONFIG_OPTEE25
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|
|
|
#define CONFIG_GPT_SUPPORT
|
|
#ifdef CONFIG_GPT_SUPPORT
|
|
#define CONFIG_SUNXI_GPT
|
|
#define CONFIG_EFI_PARTITION
|
|
#define CONFIG_CONVERT_CARD0_TO_GPT
|
|
#endif
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|
|
|
#define CONFIG_DETECT_RTC_BOOT_MODE
|
|
|
|
#endif /* __SUNXI_CONFIG_H */
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