966 lines
25 KiB
Plaintext
Executable File
966 lines
25 KiB
Plaintext
Executable File
/{
|
|
clocks {
|
|
compatible = "allwinner,clk-init";
|
|
device_type = "clocks";
|
|
#address-cells = <2>;
|
|
#size-cells = <2>;
|
|
ranges;
|
|
reg = <0x0 0x03001000 0x0 0x1000>, /*cpux space*/
|
|
<0x0 0x07010000 0x0 0x400>, /*cpus space*/
|
|
<0x0 0x07000060 0x0 0x4>;
|
|
|
|
/* register fixed rate clock*/
|
|
clk_losc: losc {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,fixed-clock";
|
|
clock-frequency = <32768>;
|
|
clock-output-names = "losc";
|
|
};
|
|
clk_iosc: iosc {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,fixed-clock";
|
|
clock-frequency = <16000000>;
|
|
clock-output-names = "iosc";
|
|
};
|
|
clk_hosc: hosc {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,fixed-clock";
|
|
clock-frequency = <24000000>;
|
|
clock-output-names = "hosc";
|
|
};
|
|
|
|
clk_osc48m: osc48m {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,fixed-clock";
|
|
clock-frequency = <48000000>;
|
|
clock-output-names = "osc48m";
|
|
};
|
|
|
|
/* register allwinner,pll-clock */
|
|
clk_pll_cpu0: pll_cpu0 {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,pll-clock";
|
|
lock-mode = "new";
|
|
clock-output-names = "pll_cpu0";
|
|
};
|
|
clk_pll_cpu1: pll_cpu1 {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,pll-clock";
|
|
lock-mode = "new";
|
|
clock-output-names = "pll_cpu1";
|
|
};
|
|
clk_pll_ddr0: pll_ddr0 {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,pll-clock";
|
|
lock-mode = "new";
|
|
clock-output-names = "pll_ddr0";
|
|
};
|
|
clk_pll_ddr1: pll_ddr1 {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,pll-clock";
|
|
lock-mode = "new";
|
|
clock-output-names = "pll_ddr1";
|
|
};
|
|
clk_pll_periph0: pll_periph0 {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,pll-clock";
|
|
assigned-clock-rates = <600000000>;
|
|
lock-mode = "new";
|
|
clock-output-names = "pll_periph0";
|
|
};
|
|
clk_pll_periph1: pll_periph1 {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,pll-clock";
|
|
assigned-clock-rates = <600000000>;
|
|
lock-mode = "new";
|
|
clock-output-names = "pll_periph1";
|
|
};
|
|
clk_pll_gpu: pll_gpu {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,pll-clock";
|
|
assigned-clock-rates = <297000000>;
|
|
lock-mode = "new";
|
|
clock-output-names = "pll_gpu";
|
|
};
|
|
clk_pll_video0: pll_video0 {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,pll-clock";
|
|
lock-mode = "new";
|
|
clock-output-names = "pll_video0";
|
|
};
|
|
clk_pll_video1: pll_video1 {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,pll-clock";
|
|
lock-mode = "new";
|
|
clock-output-names = "pll_video1";
|
|
};
|
|
clk_pll_ve: pll_ve {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,pll-clock";
|
|
device_type = "clk_pll_ve";
|
|
lock-mode = "new";
|
|
clock-output-names = "pll_ve";
|
|
};
|
|
clk_pll_de: pll_de {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,pll-clock";
|
|
assigned-clock-rates = <297000000>;
|
|
lock-mode = "new";
|
|
clock-output-names = "pll_de";
|
|
};
|
|
clk_pll_isp: pll_isp {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,pll-clock";
|
|
lock-mode = "new";
|
|
clock-output-names = "pll_isp";
|
|
};
|
|
clk_pll_hsic: pll_hsic {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,pll-clock";
|
|
lock-mode = "new";
|
|
clock-output-names = "pll_hsic";
|
|
};
|
|
clk_pll_audio: pll_audio {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,pll-clock";
|
|
lock-mode = "new";
|
|
assigned-clock-rates = <24576000>;
|
|
clock-output-names = "pll_audio";
|
|
};
|
|
clk_pll_mipi: pll_mipi {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,pll-clock";
|
|
lock-mode = "new";
|
|
clock-output-names = "pll_mipi";
|
|
};
|
|
clk_pll_eve: pll_eve {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,pll-clock";
|
|
lock-mode = "new";
|
|
clock-output-names = "pll_eve";
|
|
};
|
|
|
|
/* register fixed factor clock*/
|
|
clk_pll_periph0x2: pll_periph0x2 {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,fixed-factor-clock";
|
|
clocks = <&clk_pll_periph0>;
|
|
clock-mult = <2>;
|
|
clock-div = <1>;
|
|
clock-output-names = "pll_periph0x2";
|
|
};
|
|
clk_pll_periph1x2: pll_periph1x2 {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,fixed-factor-clock";
|
|
clocks = <&clk_pll_periph1>;
|
|
clock-mult = <2>;
|
|
clock-div = <1>;
|
|
clock-output-names = "pll_periph1x2";
|
|
};
|
|
clk_pll_audiox8: pll_audiox8 {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,fixed-factor-clock";
|
|
clocks = <&clk_pll_audio>;
|
|
clock-mult = <8>;
|
|
clock-div = <1>;
|
|
clock-output-names = "pll_audiox8";
|
|
};
|
|
clk_pll_audiox4: pll_audiox4 {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,fixed-factor-clock";
|
|
clocks = <&clk_pll_audio>;
|
|
clock-mult = <4>;
|
|
clock-div = <1>;
|
|
clock-output-names = "pll_audiox4";
|
|
};
|
|
clk_pll_audiox2: pll_audiox2 {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,fixed-factor-clock";
|
|
clocks = <&clk_pll_audio>;
|
|
clock-mult = <2>;
|
|
clock-div = <1>;
|
|
clock-output-names = "pll_audiox2";
|
|
};
|
|
clk_pll_video0x2: pll_video0x2 {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,fixed-factor-clock";
|
|
clocks = <&clk_pll_video0>;
|
|
clock-mult = <2>;
|
|
clock-div = <1>;
|
|
clock-output-names = "pll_video0x2";
|
|
};
|
|
clk_pll_video1x2: pll_video1x2 {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,fixed-factor-clock";
|
|
clocks = <&clk_pll_video1>;
|
|
clock-mult = <2>;
|
|
clock-div = <1>;
|
|
clock-output-names = "pll_video1x2";
|
|
};
|
|
clk_osc48md4: osc48md4 {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,fixed-factor-clock";
|
|
clocks = <&clk_osc48m>;
|
|
clock-mult = <1>;
|
|
clock-div = <4>;
|
|
clock-output-names = "osc48md4";
|
|
};
|
|
clk_hoscd2: hoscd2 {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,fixed-factor-clock";
|
|
clocks = <&clk_hosc>;
|
|
clock-mult = <1>;
|
|
clock-div = <2>;
|
|
clock-output-names = "hoscd2";
|
|
};
|
|
|
|
/* register allwinner,periph-clock */
|
|
clk_cluster0: cluster0 {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "cluster0";
|
|
};
|
|
clk_cluster1: cluster1 {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "cluster1";
|
|
};
|
|
clk_axi0: axi0 {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "axi0";
|
|
};
|
|
clk_axi1: axi1 {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "axi1";
|
|
};
|
|
clk_cpuapb0: cpuapb0 {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "cpuapb0";
|
|
};
|
|
clk_cpuapb1: cpuapb1 {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "cpuapb1";
|
|
};
|
|
clk_psi: psi {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "psi";
|
|
};
|
|
clk_ahb1: ahb1 {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "ahb1";
|
|
};
|
|
clk_ahb2: ahb2 {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "ahb2";
|
|
};
|
|
clk_ahb3: ahb3 {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "ahb3";
|
|
};
|
|
clk_apb1: apb1 {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "apb1";
|
|
};
|
|
clk_apb2: apb2 {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "apb2";
|
|
};
|
|
clk_cci400: cci400 {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "cci400";
|
|
};
|
|
clk_mbus: mbus {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "mbus";
|
|
};
|
|
clk_de: de {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-clock";
|
|
assigned-clocks = <&clk_de>;
|
|
assigned-clock-parents = <&clk_pll_de>;
|
|
assigned-clock-rates = <297000000>;
|
|
clock-output-names = "de";
|
|
};
|
|
clk_di: di {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "di";
|
|
};
|
|
clk_g2d: g2d {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "g2d";
|
|
};
|
|
clk_eve: eve {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "eve";
|
|
};
|
|
clk_gpu: gpu {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "gpu";
|
|
};
|
|
clk_ce: ce {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "ce";
|
|
};
|
|
clk_ve: ve {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "ve";
|
|
};
|
|
clk_isp: isp {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "isp";
|
|
};
|
|
clk_dma: dma {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "dma";
|
|
};
|
|
clk_msgbox: msgbox {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "msgbox";
|
|
};
|
|
clk_hwspinlock_rst: hwspinlock_rst {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "hwspinlock_rst";
|
|
};
|
|
clk_hwspinlock_bus: hwspinlock_bus {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "hwspinlock_bus";
|
|
};
|
|
clk_hstimer: hstimer {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "hstimer";
|
|
};
|
|
clk_avs: avs {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "avs";
|
|
};
|
|
clk_dbgsys: dbgsys {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "dbgsys";
|
|
};
|
|
clk_pwm: pwm {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "pwm";
|
|
};
|
|
clk_sdram: sdram {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "sdram";
|
|
};
|
|
clk_nand0: nand0 {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "nand0";
|
|
};
|
|
clk_nand1: nand1 {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "nand1";
|
|
};
|
|
clk_sdmmc0_mod: sdmmc0_mod {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "sdmmc0_mod";
|
|
};
|
|
clk_sdmmc0_bus: sdmmc0_bus {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "sdmmc0_bus";
|
|
};
|
|
clk_sdmmc0_rst: sdmmc0_rst {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "sdmmc0_rst";
|
|
};
|
|
clk_sdmmc1_mod: sdmmc1_mod {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "sdmmc1_mod";
|
|
};
|
|
clk_sdmmc1_bus: sdmmc1_bus {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "sdmmc1_bus";
|
|
};
|
|
clk_sdmmc1_rst: sdmmc1_rst {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "sdmmc1_rst";
|
|
};
|
|
clk_sdmmc2_mod: sdmmc2_mod {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "sdmmc2_mod";
|
|
};
|
|
clk_sdmmc2_bus: sdmmc2_bus {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "sdmmc2_bus";
|
|
};
|
|
clk_sdmmc2_rst: sdmmc2_rst {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "sdmmc2_rst";
|
|
};
|
|
clk_sdmmc3_mod: sdmmc3_mod {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "sdmmc3_mod";
|
|
};
|
|
clk_sdmmc3_bus: sdmmc3_bus {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "sdmmc3_bus";
|
|
};
|
|
clk_sdmmc3_rst: sdmmc3_rst {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "sdmmc3_rst";
|
|
};
|
|
clk_uart0: uart0 {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "uart0";
|
|
};
|
|
clk_uart1: uart1 {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "uart1";
|
|
};
|
|
clk_uart2: uart2 {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "uart2";
|
|
};
|
|
clk_uart3: uart3 {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "uart3";
|
|
};
|
|
clk_uart4: uart4 {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "uart4";
|
|
};
|
|
clk_twi0: twi0 {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "twi0";
|
|
};
|
|
clk_twi1: twi1 {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "twi1";
|
|
};
|
|
clk_twi2: twi2 {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "twi2";
|
|
};
|
|
clk_twi3: twi3 {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "twi3";
|
|
};
|
|
clk_twi4: twi4 {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "twi4";
|
|
};
|
|
clk_twi5: twi5 {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "twi5";
|
|
};
|
|
clk_twi6: twi6 {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "twi6";
|
|
};
|
|
clk_can: can {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "can";
|
|
};
|
|
clk_scr: scr {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "scr";
|
|
};
|
|
clk_spi0: spi0 {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "spi0";
|
|
};
|
|
clk_spi1: spi1 {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "spi1";
|
|
};
|
|
clk_gmac: gmac {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "gmac";
|
|
};
|
|
clk_ts: ts {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "ts";
|
|
};
|
|
clk_gpadc: gpadc {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "gpadc";
|
|
};
|
|
clk_i2s0: i2s0 {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "i2s0";
|
|
};
|
|
clk_i2s1: i2s1 {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "i2s1";
|
|
};
|
|
clk_i2s2: i2s2 {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "i2s2";
|
|
};
|
|
clk_spdif: spdif {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "spdif";
|
|
};
|
|
clk_dmic: dmic {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "dmic";
|
|
};
|
|
clk_codec_1x: codec_1x {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "codec_1x";
|
|
};
|
|
clk_codec_4x: codec_4x {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "codec_4x";
|
|
};
|
|
clk_usbphy0: usbphy0 {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "usbphy0";
|
|
};
|
|
clk_usbphy1: usbphy1 {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "usbphy1";
|
|
};
|
|
clk_usbphy2: usbphy2 {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "usbphy2";
|
|
};
|
|
clk_usbphy3: usbphy3 {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "usbphy3";
|
|
};
|
|
clk_usbohci0: usbohci0 {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "usbohci0";
|
|
};
|
|
clk_usbohci1: usbohci1 {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "usbohci1";
|
|
};
|
|
clk_usbohci2: usbohci2 {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "usbohci2";
|
|
};
|
|
clk_usbohci3: usbohci3 {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "usbohci3";
|
|
};
|
|
clk_usbehci0: usbehci0 {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "usbehci0";
|
|
};
|
|
clk_usbehci1: usbehci1 {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "usbehci1";
|
|
};
|
|
clk_usbehci2: usbehci2 {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "usbehci2";
|
|
};
|
|
clk_usbehci3: usbehci3 {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "usbehci3";
|
|
};
|
|
clk_usbotg: usbotg {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "usbotg";
|
|
};
|
|
clk_usbohci0_12m: usbohci0_12m {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "usbohci0_12m";
|
|
};
|
|
clk_usbhsic: usbhsic {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "usbhsic";
|
|
};
|
|
clk_usbhsic12m: usbhsic12m {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "usbhsic12m";
|
|
};
|
|
clk_usbohci1_12m: usbohci1_12m {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "usbohci1_12m";
|
|
};
|
|
clk_usbohci2_12m: usbohci2_12m {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "usbohci2_12m";
|
|
};
|
|
clk_usbohci3_12m: usbohci3_12m {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "usbohci3_12m";
|
|
};
|
|
clk_mipi_host: mipi_host {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "mipi_host";
|
|
};
|
|
clk_display_top: display_top {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "display_top";
|
|
};
|
|
clk_tcon_lcd0: tcon_lcd0 {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-clock";
|
|
assigned-clocks = <&clk_tcon_lcd0>;
|
|
clock-output-names = "tcon_lcd0";
|
|
};
|
|
clk_tcon_lcd1: tcon_lcd1 {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-clock";
|
|
assigned-clock-parents = <&clk_pll_mipi>;
|
|
assigned-clocks = <&clk_tcon_lcd1>;
|
|
clock-output-names = "tcon_lcd1";
|
|
};
|
|
clk_tcon_tv: tcon_tv {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-clock";
|
|
assigned-clock-parents = <&clk_pll_video1>;
|
|
assigned-clocks = <&clk_tcon_tv>;
|
|
clock-output-names = "tcon_tv";
|
|
};
|
|
clk_lvds: tcon_lvds {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "lvds";
|
|
};
|
|
clk_tve_top: tve_top {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-clock";
|
|
assigned-clock-parents = <&clk_pll_video1>;
|
|
assigned-clocks = <&clk_tve_top>;
|
|
clock-output-names = "tve_top";
|
|
};
|
|
clk_tve0: tve0 {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-clock";
|
|
assigned-clock-parents = <&clk_pll_video1>;
|
|
assigned-clocks = <&clk_tve0>;
|
|
clock-output-names = "tve0";
|
|
};
|
|
clk_tvd_top: tvd_top {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "tvd_top";
|
|
};
|
|
clk_tvd0: tcon_tvd0 {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-clock";
|
|
assigned-clock-parents = <&clk_pll_video1>;
|
|
assigned-clocks = <&clk_tvd0>;
|
|
clock-output-names = "tvd0";
|
|
};
|
|
clk_tvd1: tcon_tvd1 {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-clock";
|
|
assigned-clock-parents = <&clk_pll_video1>;
|
|
assigned-clocks = <&clk_tvd1>;
|
|
clock-output-names = "tvd1";
|
|
};
|
|
clk_tvd2: tcon_tvd2 {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-clock";
|
|
assigned-clock-parents = <&clk_pll_video1>;
|
|
assigned-clocks = <&clk_tvd2>;
|
|
clock-output-names = "tvd2";
|
|
};
|
|
clk_tvd3: tcon_tvd3 {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-clock";
|
|
assigned-clock-parents = <&clk_pll_video1>;
|
|
assigned-clocks = <&clk_tvd3>;
|
|
clock-output-names = "tvd3";
|
|
};
|
|
clk_csi_cci_0: csi_cci_0 {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "csi_cci_0";
|
|
};
|
|
clk_csi_cci_1: csi_cci_1 {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "csi_cci_1";
|
|
};
|
|
clk_csi_cci0: csi_cci0 {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "csi_cci0";
|
|
};
|
|
clk_csi_cci1: csi_cci1 {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "csi_cci1";
|
|
};
|
|
clk_csi_cci2: csi_cci2 {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "csi_cci2";
|
|
};
|
|
clk_csi_cci3: csi_cci3 {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "csi_cci3";
|
|
};
|
|
clk_csi_top: csi_top {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "csi_top";
|
|
};
|
|
clk_csi_master0: csi_master0 {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "csi_master0";
|
|
};
|
|
clk_csi_master1: csi_master1 {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "csi_master1";
|
|
};
|
|
clk_csi_master2: csi_master2 {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "csi_master2";
|
|
};
|
|
clk_csi_master3: csi_master3 {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "csi_master3";
|
|
};
|
|
clk_mipi_rx: mipi_rx {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "mipi_rx";
|
|
};
|
|
clk_pio: pio {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "pio";
|
|
};
|
|
|
|
/*cpus space clocks from PRCM-SPEC*/
|
|
/* clk below are read only , just to keep a clock tree */
|
|
clk_cpurcpus_pll: cpurcpus_pll {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-cpus-clock";
|
|
clock-output-names = "cpurcpus_pll";
|
|
};
|
|
clk_cpurcpus: cpurcpus {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-cpus-clock";
|
|
clock-output-names = "cpurcpus";
|
|
};
|
|
clk_cpurahbs: cpurahbs {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-cpus-clock";
|
|
clock-output-names = "cpurahbs";
|
|
};
|
|
clk_cpurapbs1: cpurapbs1 {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-cpus-clock";
|
|
clock-output-names = "cpurapbs1";
|
|
};
|
|
clk_cpurapbs2_pll: cpurapbs2_pll {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-cpus-clock";
|
|
clock-output-names = "cpurapbs2_pll";
|
|
};
|
|
clk_cpurapbs2: cpurapbs2 {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-cpus-clock";
|
|
clock-output-names = "cpurapbs2";
|
|
};
|
|
clk_cpurtimer: cpurtimer {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-cpus-clock";
|
|
clock-output-names = "cpurtimer";
|
|
};
|
|
clk_cpurtwdog: cpurtwdog {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-cpus-clock";
|
|
clock-output-names = "cpurtwdog";
|
|
};
|
|
clk_cpurpwm: cpurpwm {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-cpus-clock";
|
|
clock-output-names = "cpurpwm";
|
|
};
|
|
clk_cpur_vm_ths: cpur_vm_ths {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-cpus-clock";
|
|
assigned-clock-parents = <&clk_hosc>;
|
|
assigned-clock-rates = <24000000>;
|
|
assigned-clocks = <&clk_cpur_vm_ths>;
|
|
clock-output-names = "cpur_vm_ths";
|
|
};
|
|
clk_cpurvm: cpurvm {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-cpus-clock";
|
|
clock-output-names = "cpurvm";
|
|
};
|
|
clk_cpurths: cpurths {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-cpus-clock";
|
|
clock-output-names = "cpurths";
|
|
};
|
|
clk_cpurlradc: cpurlradc {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-cpus-clock";
|
|
clock-output-names = "cpurlradc";
|
|
};
|
|
clk_cpuruart0: cpuruart0 {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-cpus-clock";
|
|
clock-output-names = "cpuruart0";
|
|
};
|
|
clk_cpuruart1: cpuruart1 {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-cpus-clock";
|
|
clock-output-names = "cpuruart1";
|
|
};
|
|
clk_cpuruart2: cpuruart2 {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-cpus-clock";
|
|
clock-output-names = "cpuruart2";
|
|
};
|
|
clk_cpuruart3: cpuruart3 {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-cpus-clock";
|
|
clock-output-names = "cpuruart3";
|
|
};
|
|
clk_cpuruart4: cpuruart4 {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-cpus-clock";
|
|
clock-output-names = "cpuruart4";
|
|
};
|
|
clk_cpurtwi0: cpurtwi0 {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-cpus-clock";
|
|
clock-output-names = "cpurtwi0";
|
|
};
|
|
clk_cpurtwi1: cpurtwi1 {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-cpus-clock";
|
|
clock-output-names = "cpurtwi1";
|
|
};
|
|
clk_cpurtwi2: cpurtwi2 {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-cpus-clock";
|
|
clock-output-names = "cpurtwi2";
|
|
};
|
|
clk_cpurcan: cpurcan {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-cpus-clock";
|
|
clock-output-names = "cpurcan";
|
|
};
|
|
clk_cpurrsb: cpurrsb {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-cpus-clock";
|
|
clock-output-names = "cpurrsb";
|
|
};
|
|
clk_cpurcir: cpurcir {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-cpus-clock";
|
|
clock-output-names = "cpurcir";
|
|
};
|
|
clk_cpurspi: cpurspi {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-cpus-clock";
|
|
clock-output-names = "cpurspi";
|
|
};
|
|
clk_cpurrtc: cpurrtc {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-cpus-clock";
|
|
clock-output-names = "cpurrtc";
|
|
};
|
|
clk_cpurpio: cpurpio {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-cpus-clock";
|
|
clock-output-names = "cpurpio";
|
|
};
|
|
clk_losc_out: losc_out {
|
|
#clock-cells = <0>;
|
|
compatible = "allwinner,periph-cpus-clock";
|
|
clock-output-names = "losc_out";
|
|
};
|
|
};
|
|
};
|