352 lines
9.6 KiB
C
Executable File
352 lines
9.6 KiB
C
Executable File
/*
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* (C) Copyright 2010-2016
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* Allwinner Technology Co., Ltd. <www.allwinnertech.com>
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* fanqinghua <fanqinghua@allwinnertech.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*/
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#ifndef __AW_PM_H__
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#define __AW_PM_H__
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#include <linux/power/axp_depend.h>
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/* the wakeup source of main cpu: cpu0 */
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#define CPU0_WAKEUP_MSGBOX (1<<0)
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#define CPU0_WAKEUP_KEY (1<<1)
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#define CPU0_WAKEUP_EXINT (1<<2)
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#define CPU0_WAKEUP_IR (1<<3)
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#define CPU0_WAKEUP_ALARM (1<<4)
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#define CPU0_WAKEUP_USB (1<<5)
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#define CPU0_WAKEUP_TIMEOUT (1<<6)
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#define CPU0_WAKEUP_GPIO (1<<7)
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/* the wakeup source of assistant cpu: cpus */
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#define CPUS_WAKEUP_LOWBATT (1<<12)
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#define CPUS_WAKEUP_USB (1<<13)
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#define CPUS_WAKEUP_AC (1<<14)
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#define CPUS_WAKEUP_ASCEND (1<<15)
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#define CPUS_WAKEUP_DESCEND (1<<16)
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#define CPUS_WAKEUP_SHORT_KEY (1<<17)
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#define CPUS_WAKEUP_LONG_KEY (1<<18)
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#define CPUS_WAKEUP_IR (1<<19)
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#define CPUS_WAKEUP_ALM0 (1<<20)
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#define CPUS_WAKEUP_ALM1 (1<<21)
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#define CPUS_WAKEUP_TIMEOUT (1<<22)
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#define CPUS_WAKEUP_GPIO (1<<23)
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#define CPUS_WAKEUP_USBMOUSE (1<<24)
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#define CPUS_WAKEUP_LRADC (1<<25)
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#define CPUS_WAKEUP_WLAN (1<<26)
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#define CPUS_WAKEUP_CODEC (1<<27)
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#define CPUS_WAKEUP_BAT_TEMP (1<<28)
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#define CPUS_WAKEUP_FULLBATT (1<<29)
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#define CPUS_WAKEUP_HMIC (1<<30)
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#define CPUS_WAKEUP_POWER_EXP (1<<31)
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#define CPUS_WAKEUP_KEY (CPUS_WAKEUP_SHORT_KEY \
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| CPUS_WAKEUP_LONG_KEY)
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/* define cpus wakeup src */
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#define CPUS_MEM_WAKEUP (CPUS_WAKEUP_LOWBATT \
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| CPUS_WAKEUP_USB \
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| CPUS_WAKEUP_AC \
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| CPUS_WAKEUP_DESCEND \
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| CPUS_WAKEUP_ASCEND \
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| CPUS_WAKEUP_ALM0 \
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| CPUS_WAKEUP_GPIO \
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| CPUS_WAKEUP_IR) \
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| CPUS_WAKEUP_USBMOUSE
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#define CPUS_BOOTFAST_WAKEUP (CPUS_WAKEUP_LOWBATT \
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| CPUS_WAKEUP_LONG_KEY \
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| CPUS_WAKEUP_ALM0 \
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| CPUS_WAKEUP_USB \
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| CPUS_WAKEUP_AC)
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#define CPU0_MEM_WAKEUP (CPU0_WAKEUP_MSGBOX \
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| CPU0_WAKEUP_EXINT \
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| CPU0_WAKEUP_ALARM)
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/* for format all the wakeup gpio into one word.*/
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#define GPIO_PL_MAX_NUM (11) /* 0-11 */
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#define GPIO_PM_MAX_NUM (11) /* 0-11 */
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#define GPIO_AXP_MAX_NUM (7) /* 0-7 */
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#define WAKEUP_GPIO_PL(num) (1 << (num))
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#define WAKEUP_GPIO_PM(num) (1 << (num + 12))
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#define WAKEUP_GPIO_AXP(num) (1 << (num + 24))
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#define WAKEUP_GPIO_GROUP(group) (1 << (group - 'A'))
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#define PM_PLL_C0 (0)
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#define PM_PLL_C1 (1)
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#define PM_PLL_AUDIO (2)
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#define PM_PLL_VIDEO0 (3)
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#define PM_PLL_VE (4)
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#define PM_PLL_DRAM (5)
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#define PM_PLL_PERIPH (6)
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#define PM_PLL_GPU (7)
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#define PM_PLL_HSIC (8)
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#define PM_PLL_DE (9)
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#define PM_PLL_VIDEO1 (10)
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#define PLL_PERIPH1 (11)
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#define PLL_DRAM1 (12)
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#define PLL_MIPI (13)
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#define PLL_NUM (14)
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#define BUS_C0 (0)
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#define BUS_C1 (1)
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#define BUS_AXI0 (2)
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#define BUS_AXI1 (3)
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#define BUS_AHB1 (4)
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#define BUS_AHB2 (5)
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#define BUS_APB1 (6)
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#define BUS_APB2 (7)
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#define BUS_NUM (8)
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#define IO_NUM (2)
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#define OSC_HOSC_BIT (3)
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#define OSC_LOSC_BIT (2)
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#define OSC_LDO1_BIT (1)
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#define OSC_LDO0_BIT (0)
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typedef enum power_dm {
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DM_CPUA = 0, /* 0 */
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DM_CPUB, /* 1 */
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DM_DRAM, /* 2 */
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DM_GPU, /* 3 */
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DM_SYS, /* 4 */
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DM_VPU, /* 5 */
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DM_CPUS, /* 6 */
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DM_DRAMPLL, /* 7 */
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DM_ADC, /* 8 */
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DM_PL, /* 9 */
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DM_PM, /* 10 */
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DM_IO, /* 11 */
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DM_CPVDD, /* 12 */
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DM_LDOIN, /* 13 */
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DM_PLL, /* 14 */
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DM_LPDDR, /* 15 */
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DM_TEST, /* 16 */
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DM_RES1, /* 17 */
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DM_RES2, /* 18 */
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DM_RES3, /* 19 */
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DM_MAX, /* 20 */
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} power_dm_e;
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typedef struct {
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unsigned int factor1;
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unsigned int factor2;
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unsigned int factor3;
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unsigned int factor4;
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} pll_para_t;
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typedef struct {
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unsigned int src;
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unsigned int pre_div;
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unsigned int div_ratio;
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unsigned int n;
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unsigned int m;
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} bus_para_t;
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typedef struct super_standby_para {
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/* cpus wakeup event types */
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unsigned int event;
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/* cpux resume code src */
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unsigned int resume_code_src;
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/* cpux resume code length */
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unsigned int resume_code_length;
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/* cpux resume entry */
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unsigned int resume_entry;
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/* wakeup after timeout seconds */
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unsigned int timeout;
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unsigned int gpio_enable_bitmap;
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unsigned int cpux_gpiog_bitmap;
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unsigned int pextended_standby;
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} super_standby_t;
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typedef enum {
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CLK_SRC_NONE = 0x0, /* invalid source clock id */
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CLK_SRC_LOSC, /* LOSC, 33/50/67:32768Hz, 73:16MHz/512=31250*/
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CLK_SRC_IOSC, /* InternalOSC, 33/50/67:700KHZ, 73:16MHz*/
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CLK_SRC_HOSC, /* HOSC, 24MHZ clock*/
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CLK_SRC_AXI, /* AXI clock*/
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CLK_SRC_16M, /* 16M for the backdoor*/
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CLK_SRC_PLL1, /* PLL1 clock */
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CLK_SRC_PLL2, /* PLL2 clock */
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CLK_SRC_PLL3, /* PLL3 clock */
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CLK_SRC_PLL4, /* PLL4 clock */
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CLK_SRC_PLL5, /* PLL5 clock */
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CLK_SRC_PLL6, /* PLL6 clock */
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CLK_SRC_PLL7, /* PLL7 clock */
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CLK_SRC_PLL8, /* PLL8 clock */
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CLK_SRC_PLL9, /* PLL9 clock */
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CLK_SRC_PLL10, /* PLL10 clock */
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CLK_SRC_PLL11, /* PLL10 clock */
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CLK_SRC_CPUS, /* cpus clock */
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CLK_SRC_C0, /* cluster0 clock */
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CLK_SRC_C1, /* cluster1 clock */
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CLK_SRC_AXI0, /* AXI0 clock */
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CLK_SRC_AXI1, /* AXI0 clock */
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CLK_SRC_AHB0, /* AHB0 clock */
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CLK_SRC_AHB1, /* AHB1 clock */
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CLK_SRC_AHB2, /* AHB2 clock */
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CLK_SRC_APB0, /* APB0 clock */
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CLK_SRC_APB1, /* APB1 clock */
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CLK_SRC_APB2, /* APB2 clock */
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} clk_src_e;
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typedef struct {
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/*
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* for state bitmap:
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* bitx = 1: keep state.
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* bitx = 0: mean close corresponding power src.
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*/
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unsigned int state;
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/* bitx=1, the corresponding state is effect,
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* otherwise, the corresponding power is in charge in device driver.
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* sys_mask&state: bitx=1,
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* mean the power is on,
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* for the "on" state power,
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* u need care about the voltage.;
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* ((~sys_mask)|state): bitx=0, mean the power is close;
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*
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* pwr_dm_state bitmap
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* actually: we care about the pwr_dm voltage,
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* such as: we want to keep the vdd_sys at 1.0v at standby period.
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* we actually do not care how to do it.
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* it can be sure that cpus can do it with the pmu's help.
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*/
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unsigned int sys_mask;
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unsigned int volt[VCC_MAX_INDEX]; /* unsigned short is 16bit width. */
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} pwr_dm_state_t;
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/* selfresh_flag must be compatible with vdd_sys pwr state.*/
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typedef struct pm_dram_para {
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unsigned int selfresh_flag;
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unsigned int crc_en;
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unsigned int crc_start;
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unsigned int crc_len;
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} pm_dram_para_t;
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typedef struct cpus_clk_para {
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unsigned int cpus_id;
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} cpus_para_t;
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typedef struct io_state_config {
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unsigned int paddr;
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unsigned int value_mask; /* specify the effect bit.*/
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unsigned int value;
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} io_state_config_t;
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typedef struct soc_io_para {
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/*
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* hold: mean before power off vdd_sys, whether hold gpio pad or not.
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* this flag only effect: when vdd_sys is powered_off;
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* this flag only affect hold&unhold operation.
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* the recommended hold sequence is as follow:
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* backup_io_cfg -> cfg_io(enter_low_power_mode)
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* -> hold -> assert vdd_sys_reset -> poweroff vdd_sys.
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* the recommended unhold sequence is as follow:
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* poweron vdd_sys -> de_assert vdd_sys -> restore_io_cfg -> unhold.
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*/
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unsigned int hold_flag;
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/*
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* note: only specific bit mark by value_mask is effect.
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* IO_NUM: only uart and jtag needed care.
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*/
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io_state_config_t io_state[IO_NUM];
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} soc_io_para_t;
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typedef struct cpux_clk_para {
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/*
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* Hosc: losc: ldo1: ldo0
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* the osc bit map is as follow:
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* bit3: bit2: bit1:bit0
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* Hosc: losc: ldo1: ldo0
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*/
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int osc_en;
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/*
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* for a83, pll bitmap as follow:
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*
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* pll11(video1): pll10(de): pll9(hsic)
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* bit7: bit6: bit5: bit4:
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* pll8(gpu): pll6(periph): pll5(dram): pll4(ve):
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* bit3: bit2: bit1: bit0
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* pll3(video): pll2(audio): c1cpux: c0cpux
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*
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*/
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/* for disable bitmap:
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* bitx = 0: close
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* bitx = 1: do not care.
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*/
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int init_pll_dis;
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/* for enable bitmap:
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* bitx = 0: do not care.
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* bitx = 1: open
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*/
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int exit_pll_en;
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/*
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* set corresponding bit if it's pll factors need to be set some value.
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*/
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int pll_change;
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/*
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* fill in the enabled pll freq factor sequently.
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* unit is khz pll6: 0x90041811
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* factor n/m/k/p already do the pretreatment of the minus one
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*/
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pll_para_t pll_factor[PLL_NUM];
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int bus_change;
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/*
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* bus_src: ahb1, apb2 src;
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* option: pllx:axi:hosc:losc
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*/
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bus_para_t bus_factor[BUS_NUM];
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} cpux_clk_para_t;
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typedef struct soc_pwr_dep {
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/* id of scene_lock */
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unsigned int id;
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pwr_dm_state_t soc_pwr_dm_state;
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pm_dram_para_t soc_dram_state;
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soc_io_para_t soc_io_state;
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cpux_clk_para_t cpux_clk_state;
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} soc_pwr_dep_t;
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typedef struct extended_standby {
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/* id of extended standby */
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unsigned int id;
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/* for: 808 || 809+806 || 803 || 813
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* support 4 pmu: each pmu_id range is: 0-255;
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* pmu_id <--> pmu_name have directly mapping,
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* u can get the pmu_name from sys_config.fex files.;
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* bitmap as follow:
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* pmu0: 0-7 bit; pmu1: 8-15 bit; pmu2: 16-23 bit; pmu3: 24-31 bit
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*/
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unsigned int pmu_id;
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/* a33, a80, a83,...,
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* for compatible reason, different soc,
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* each bit have different meaning.
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*/
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unsigned int soc_id;
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pwr_dm_state_t soc_pwr_dm_state;
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pm_dram_para_t soc_dram_state;
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soc_io_para_t soc_io_state;
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cpux_clk_para_t cpux_clk_state;
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} extended_standby_t;
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#endif /* __AW_PM_H__ */
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