538 lines
14 KiB
C
Executable File
538 lines
14 KiB
C
Executable File
/*
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* (C) Copyright 2007-2013
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* Allwinner Technology Co., Ltd. <www.allwinnertech.com>
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* Jerry Wang <wangflord@allwinnertech.com>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <asm/arch/dma.h>
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#include <asm/arch/intc.h>
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#include <asm/arch/cpu.h>
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sw_dma_channal_set_t dma_channal_source[CFG_SW_DMA_NORMAL_MAX + CFG_SW_DMA_DEDICATE_MAX] =
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{
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{0, -1, (sw_dma_t)CFS_SW_DMA_NORMAL0 , 0 , {NULL, NULL} },
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{0, -1, (sw_dma_t)CFS_SW_DMA_NORMAL1 , 0 , {NULL, NULL} },
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{0, -1, (sw_dma_t)CFS_SW_DMA_NORMAL2 , 0 , {NULL, NULL} },
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{0, -1, (sw_dma_t)CFS_SW_DMA_NORMAL3 , 0 , {NULL, NULL} },
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{0, -1, (sw_dma_t)CFS_SW_DMA_NORMAL4 , 0 , {NULL, NULL} },
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{0, -1, (sw_dma_t)CFS_SW_DMA_NORMAL5 , 0 , {NULL, NULL} },
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{0, -1, (sw_dma_t)CFS_SW_DMA_NORMAL6 , 0 , {NULL, NULL} },
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{0, -1, (sw_dma_t)CFS_SW_DMA_NORMAL7 , 0 , {NULL, NULL} },
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{0, -1, (sw_dma_t)CFG_SW_DMA_DEDICATE0, (sw_dma_other_t)CFG_SW_DMA_DEDICATE0_OTHER, {NULL, NULL} },
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{0, -1, (sw_dma_t)CFG_SW_DMA_DEDICATE1, (sw_dma_other_t)CFG_SW_DMA_DEDICATE1_OTHER, {NULL, NULL} },
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{0, -1, (sw_dma_t)CFG_SW_DMA_DEDICATE2, (sw_dma_other_t)CFG_SW_DMA_DEDICATE2_OTHER, {NULL, NULL} },
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{0, -1, (sw_dma_t)CFG_SW_DMA_DEDICATE3, (sw_dma_other_t)CFG_SW_DMA_DEDICATE3_OTHER, {NULL, NULL} },
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{0, -1, (sw_dma_t)CFG_SW_DMA_DEDICATE4, (sw_dma_other_t)CFG_SW_DMA_DEDICATE4_OTHER, {NULL, NULL} },
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{0, -1, (sw_dma_t)CFG_SW_DMA_DEDICATE5, (sw_dma_other_t)CFG_SW_DMA_DEDICATE5_OTHER, {NULL, NULL} },
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{0, -1, (sw_dma_t)CFG_SW_DMA_DEDICATE6, (sw_dma_other_t)CFG_SW_DMA_DEDICATE6_OTHER, {NULL, NULL} },
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{0, -1, (sw_dma_t)CFG_SW_DMA_DEDICATE7, (sw_dma_other_t)CFG_SW_DMA_DEDICATE7_OTHER, {NULL, NULL} }
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};
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typedef struct
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{
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unsigned int irq_en0;
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unsigned int irq_pending0;
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}
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sunxi_dma_int_set;
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#define DMA_PKG_HALF_INT (1<<0)
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#define DMA_PKG_END_INT (1<<1)
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#define DMA_QUEUE_END_INT (1<<2)
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static int dma_int_count;
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/*
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************************************************************************************************************
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*
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* function
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*
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* name :
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*
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* parmeters :
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*
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* return :
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*
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* note :
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*
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*
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************************************************************************************************************
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*/
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static void sunxi_dma_int_func(void *p)
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{
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int i;
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uint pending;
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sunxi_dma_int_set *dma_int = (sunxi_dma_int_set *)SUNXI_DMA_BASE;
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for(i=0; i<=31; i+=2)
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{
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if(dma_channal_source[i/2].dma_func.m_func)
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{
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pending = (DMA_PKG_END_INT << i);
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if(dma_int->irq_pending0 & pending)
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{
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dma_int->irq_pending0 = pending;
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dma_channal_source[i/2].dma_func.m_func(dma_channal_source[i].dma_func.m_data);
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}
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}
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}
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}
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/*
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************************************************************************************************************
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*
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* function
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*
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* name :
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*
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* parmeters :
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*
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* return :
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*
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* note :
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*
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*
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************************************************************************************************************
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*/
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void sunxi_dma_init(void)
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{
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sunxi_dma_int_set *dma_int = (sunxi_dma_int_set *)SUNXI_DMA_BASE;
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dma_int->irq_en0 = 0;
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dma_int->irq_pending0 = 0xffffffff;
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dma_int_count = 0;
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irq_install_handler(AW_IRQ_DMA, sunxi_dma_int_func, 0);
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return ;
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}
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/*
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************************************************************************************************************
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*
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* function
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*
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* name :
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*
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* parmeters :
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*
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* return :
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*
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* note :
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*
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*
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************************************************************************************************************
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*/
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void sunxi_dma_exit(void)
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{
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sunxi_dma_int_set *dma_int = (sunxi_dma_int_set *)SUNXI_DMA_BASE;
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dma_int->irq_en0 = 0;
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dma_int->irq_pending0 = 0xffffffff;
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irq_free_handler(AW_IRQ_DMA);
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}
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/*
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****************************************************************************************************
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*
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* DMAC_RequestDma
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*
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* Description:
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* request dma
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*
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* Parameters:
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* type 0: normal timer
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* 1: special timer
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* Return value:
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* dma handler
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* if 0, fail
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****************************************************************************************************
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*/
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uint sunxi_dma_request(uint dmatype)
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{
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__u32 i;
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if(dmatype == DMAC_DMATYPE_NORMAL)
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{
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for(i=0;i<CFG_SW_DMA_NORMAL_MAX;i++)
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{
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if(!dma_channal_source[i].used)
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{
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dma_channal_source[i].used = 1;
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dma_channal_source[i].channalNo = i;
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return (__u32)&dma_channal_source[i];
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}
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}
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}
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else if(dmatype == DMAC_DMATYPE_DEDICATED)
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{
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for(i=CFG_SW_DMA_NORMAL_MAX;i<CFG_SW_DMA_NORMAL_MAX + CFG_SW_DMA_DEDICATE_MAX;i++)
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{
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if(!dma_channal_source[i].used)
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{
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dma_channal_source[i].used = 1;
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dma_channal_source[i].channalNo = i;
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return (__u32)&dma_channal_source[i];
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}
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}
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}
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return 0;
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}
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/*
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****************************************************************************************************
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*
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* DMAC_ReleaseDma
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*
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* Description:
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* release dma
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*
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* Parameters:
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* hDma dma handler
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*
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* Return value:
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* EPDK_OK/FAIL
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****************************************************************************************************
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*/
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int sunxi_dma_release(uint hdma)
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{
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sw_dma_channal_set_t * pdma = (sw_dma_channal_set_t *)hdma;
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sunxi_dma_disable_int(hdma);
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sunxi_dma_free_int(hdma);
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/* stop dma */
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pdma->channal->config &= 0x7fffffff; /* stop dma */
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/* free dma handle */
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pdma->used = 0;
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pdma->channalNo = -1;
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return 0;
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}
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/*
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****************************************************************************************************
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*
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* sunxi_dma_setting
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*
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* Description:
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* start interrupt
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*
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* Parameters:
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*
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*
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*
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*
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*
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*
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* Return value:
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*
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*
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**********************************************************************************************************************
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*/
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int sunxi_dma_setting(uint hdma, void *cfg)
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{
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sw_dma_channal_set_t * pdma = (sw_dma_channal_set_t *)hdma;
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sunxi_dma_setting_t * arg = (sunxi_dma_setting_t *)cfg;
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__u32 value;
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uint *tmp;
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if(pdma->other)
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{
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__ddma_config_t ddma_arg = {0};
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ddma_arg.src_drq_type = arg->cfg.src_drq_type;
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ddma_arg.src_addr_type = arg->cfg.src_addr_mode;
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ddma_arg.src_burst_length = arg->cfg.src_burst_length;
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ddma_arg.src_data_width = arg->cfg.src_data_width;
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ddma_arg.dst_drq_type = arg->cfg.dst_drq_type;
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ddma_arg.dst_addr_type = arg->cfg.dst_addr_mode;
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ddma_arg.dst_burst_length = arg->cfg.dst_burst_length;
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ddma_arg.dst_data_width = arg->cfg.dst_data_width;
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ddma_arg.continuous_mode = arg->cfg.continuous_mode;
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tmp = (uint *)&ddma_arg;
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value = *tmp;
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pdma->channal->config = value & (~0x80000000);
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pdma->other->page_size = arg->pgsz;
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pdma->other->page_step = arg->pgstp;
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pdma->other->comity_counter = arg->cmt_blk_cnt;
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}
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else
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{
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__ndma_config_t ndma_arg = {0};
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ndma_arg.src_drq_type = arg->cfg.src_drq_type;
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ndma_arg.src_addr_type = arg->cfg.src_addr_mode;
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ndma_arg.src_burst_length = arg->cfg.src_burst_length;
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ndma_arg.src_data_width = arg->cfg.src_data_width;
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ndma_arg.dst_drq_type = arg->cfg.dst_drq_type;
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ndma_arg.dst_addr_type = arg->cfg.dst_addr_mode;
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ndma_arg.dst_burst_length = arg->cfg.dst_burst_length;
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ndma_arg.dst_data_width = arg->cfg.dst_data_width;
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ndma_arg.continuous_mode = arg->cfg.continuous_mode;
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ndma_arg.wait_state = arg->cfg.wait_state;
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tmp = (uint *)&ndma_arg;
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value = *tmp;
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pdma->channal->config = value & (~0x80000000);
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}
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return 0;
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}
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/*
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**********************************************************************************************************************
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*
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* sunxi_dma_start
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*
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* Description:
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*
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*
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* Parameters:
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*
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*
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* Return value:
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*
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*
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****************************************************************************************************
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*/
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int sunxi_dma_start(uint hdma, uint saddr, uint daddr, uint bytes)
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{
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sw_dma_channal_set_t * pdma = (sw_dma_channal_set_t *)hdma;
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pdma->channal->src_addr = saddr;
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pdma->channal->dst_addr = daddr;
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pdma->channal->bytes = bytes;
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pdma->channal->config |= 0x80000000; /* start dma */
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return 0;
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}
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/*
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**********************************************************************************************************************
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*
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* sunxi_dma_stop
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*
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* Description:
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*
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*
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* Parameters:
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*
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*
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* Return value:
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*
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*
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**********************************************************************************************************************
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*/
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int sunxi_dma_stop(uint hdma)
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{
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sw_dma_channal_set_t * pdma = (sw_dma_channal_set_t *)hdma;
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pdma->channal->config &= 0x7fffffff; /* stop dma */
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return 0;
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}
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/*
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**********************************************************************************************************************
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*
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* sunxi_dma_querystatus
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*
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* Description:
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*
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*
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* Parameters:
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*
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*
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* Return value:
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*
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*
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**********************************************************************************************************************
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*/
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int sunxi_dma_querystatus(uint hdma)
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{
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sw_dma_channal_set_t * pdma = (sw_dma_channal_set_t *)hdma;
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return (pdma->channal->config >> 31) & 0x01;
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}
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/*
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************************************************************************************************************
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*
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* function
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*
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* name :
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*
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* parmeters :
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*
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* return :
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*
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* note :
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*
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*
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************************************************************************************************************
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*/
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int sunxi_dma_install_int(uint hdma, interrupt_handler_t dma_int_func, void *p)
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{
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sw_dma_channal_set_t *pdma = (sw_dma_channal_set_t *)hdma;
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sunxi_dma_int_set *dma_int = (sunxi_dma_int_set *)SUNXI_DMA_BASE;
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int dma_no;
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dma_no = pdma->channalNo;
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dma_int->irq_pending0 = (3 << (dma_no<<1)); //clear int status
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if(!dma_channal_source[dma_no].dma_func.m_func)
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{
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dma_channal_source[dma_no].dma_func.m_func = dma_int_func;
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dma_channal_source[dma_no].dma_func.m_data = p;
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}
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else
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{
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printf("dma 0x%x int is used already, you have to free it first\n", hdma);
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return -1;
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}
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return 0;
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}
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/*
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************************************************************************************************************
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*
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* function
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*
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* name :
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*
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* parmeters :
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*
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* return :
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*
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* note :
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*
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*
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************************************************************************************************************
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*/
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int sunxi_dma_free_int(uint hdma)
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{
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sunxi_dma_int_set *dma_int = (sunxi_dma_int_set *)SUNXI_DMA_BASE;
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sw_dma_channal_set_t *pdma = (sw_dma_channal_set_t *)hdma;
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int dma_no;
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dma_no = pdma->channalNo;
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dma_int->irq_pending0 = (3 << (dma_no<<1)); //clear int status
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if(dma_channal_source[dma_no].dma_func.m_func)
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{
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dma_channal_source[dma_no].dma_func.m_func = 0;
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dma_channal_source[dma_no].dma_func.m_data = 0;
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}
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else
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{
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printf("this dma channel int is not used\n");
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return -1;
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}
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return 0;
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}
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/*
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************************************************************************************************************
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*
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* function
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*
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* name :
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*
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* parmeters :
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*
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* return :
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*
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* note :
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*
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*
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************************************************************************************************************
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*/
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int sunxi_dma_enable_int(uint hdma)
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{
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int dma_no;
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sw_dma_channal_set_t *pdma = (sw_dma_channal_set_t *)hdma;
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sunxi_dma_int_set *dma_int = (sunxi_dma_int_set *)SUNXI_DMA_BASE;
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dma_no = pdma->channalNo;
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if(dma_int->irq_en0 & (2 << (dma_no<<1)))
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{
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printf("this dma int is avaible already\n");
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return 0;
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}
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//enable dma int
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dma_int->irq_en0 |= (2 << (dma_no<<1));
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//enable golbal int
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if(!dma_int_count)
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{
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irq_enable(AW_IRQ_DMA);
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}
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dma_int_count ++;
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return 0;
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}
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/*
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************************************************************************************************************
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*
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* function
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*
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* name :
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*
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* parmeters :
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*
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* return :
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*
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* note :
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*
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*
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************************************************************************************************************
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*/
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int sunxi_dma_disable_int(uint hdma)
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{
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int dma_no;
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sw_dma_channal_set_t *pdma = (sw_dma_channal_set_t *)hdma;
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sunxi_dma_int_set *dma_int = (sunxi_dma_int_set *)SUNXI_DMA_BASE;
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dma_no = pdma->channalNo;
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if(!(dma_int->irq_en0 & (2 << (dma_no<<1))))
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{
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printf("this dma int is unavaible\n");
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return 0;
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}
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//disable dma int
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dma_int->irq_en0 &= ~(2 << (dma_no<<1));
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//enable golbal int
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dma_int_count --;
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if(!dma_int_count)
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{
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irq_disable(AW_IRQ_DMA);
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}
|
|
|
|
return 0;
|
|
}
|
|
|
|
|