203 lines
5.9 KiB
C
Executable File
203 lines
5.9 KiB
C
Executable File
/******************************************************************************
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Copyright (C), 2001-2016, Allwinner Tech. Co., Ltd.
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******************************************************************************
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File Name : plat_defines.h
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Version : Initial Draft
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Author : Allwinner BU3-PD2 Team
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Created : 2016/03/15
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Last Modified :
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Description : The common configuration defination, always hardware constraint.
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Function List :
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History :
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******************************************************************************/
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#ifndef __IPCLINUX_PLAT_DEFINES_H__
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#define __IPCLINUX_PLAT_DEFINES_H__
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#ifdef __cplusplus
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extern "C"{
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#endif /* __cplusplus */
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#define AW_V40 0x1701
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#define AW_V5 0x1721
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#ifndef AWCHIP
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#define AWCHIP AW_V5
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#endif
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#if (AWCHIP==AW_V40)
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#define CHIP_NAME "AWV40"
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#define MPP_VER_PRIX "_MPP_V"
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#elif (AWCHIP==AW_V5)
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#define CHIP_NAME "AWV5"
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#define MPP_VER_PRIX "_MPP_V"
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#else
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#error AWCHIP define may be error
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#endif
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#define DEFAULT_ALIGN 16
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#define MAX_NODE_NUM 16
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/* For VDA */
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#define VDA_MAX_NODE_NUM 32
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#define VDA_MAX_INTERNAL 256
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#define VDA_CHN_NUM_MAX 32
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#define VDA_MAX_WIDTH 960
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#define VDA_MAX_HEIGHT 960
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#define VDA_MIN_WIDTH 32
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#define VDA_MIN_HEIGHT 32
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/* For VENC */
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#define VENC_MAX_NAME_LEN 16
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#define VENC_MAX_CHN_NUM 16
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#define VENC_MAX_GRP_NUM 16
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#define H264E_MAX_WIDTH 2592
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#define H264E_MAX_HEIGHT 2592
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#define H264E_MIN_WIDTH 160
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#define H264E_MIN_HEIGHT 64
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#define H265E_MAX_WIDTH 2592
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#define H265E_MAX_HEIGHT 2592
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#define H265E_MIN_WIDTH 128
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#define H265E_MIN_HEIGHT 128
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#define JPEGE_MAX_WIDTH 8192
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#define JPEGE_MAX_HEIGHT 8192
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#define JPEGE_MIN_WIDTH 32
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#define JPEGE_MIN_HEIGHT 32
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#define VENC_MAX_ROI_NUM 8 /* The max numbers of ROI region support */
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#define H264E_MIN_HW_INDEX 0
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#define H264E_MAX_HW_INDEX 11
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#define H264E_MIN_VW_INDEX 0
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#define H264E_MAX_VW_INDEX 3
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/* For RC */
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#define RC_TEXTURE_THR_SIZE 12
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#define RC_RQRATIO_SIZE 8
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/* For VDEC */
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#define VDEC_MAX_CHN_NUM 16
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/* For Region */
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#define RGN_MIN_WIDTH 2
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#define RGN_MIN_HEIGHT 2
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#define RGN_MAX_WIDTH 2592
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#define RGN_MAX_HEIGHT 2592
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#define RGN_ALIGN 2
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#define RGN_HANDLE_MAX 1024
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#define COVER_MAX_NUM_VI 0
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#define COVEREX_MAX_NUM_VI 16
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#define OVERLAY_MAX_NUM_VI 0
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#define OVERLAYEX_MAX_NUM_VI 16
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#define OVERLAY_MAX_NUM_VENC 8
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#define COVER_MAX_NUM_VPSS 8
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#define COVEREX_MAX_NUM_VPSS 8
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#define OVERLAY_MAX_NUM_VPSS 1
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#define OVERLAYEX_MAX_NUM_VPSS 8
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#define OVERLAYEX_MAX_NUM_VGS 1
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#define COVER_MAX_NUM_VGS 1
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#define COVEREX_MAX_NUM_VO 1
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#define OVERLAYEX_MAX_NUM_VO 1
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#define OVERLAYEX_MAX_NUM_PCIV 0
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/* number of channle and device on video input unit of chip
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* Note! VIU_MAX_CHN_NUM is NOT equal to VIU_MAX_DEV_NUM
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* multiplied by VIU_MAX_CHN_NUM, because all VI devices
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* can't work at mode of 4 channles at the same time.
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*/
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#define VIU_MAX_DEV_NUM 1
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#define VIU_MAX_WAY_NUM_PER_DEV 1
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#define VIU_MAX_CHN_NUM_PER_DEV 1
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#define VIU_MAX_PHYCHN_NUM 1
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#define VIU_MAX_RAWCHN_NUM 1 /* raw data chn, DVR/NVR: 0 */
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#define VIU_EXT_CHN_START VIU_MAX_PHYCHN_NUM
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#define VIU_MAX_EXT_CHN_NUM 16
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#define VIU_MAX_EXTCHN_BIND_PER_CHN 8
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#define VIU_MAX_CHN_NUM (VIU_MAX_PHYCHN_NUM + VIU_MAX_EXT_CHN_NUM)
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#define VIU_MAX_UFLIST_NUM (VIU_MAX_CHN_NUM + VIU_MAX_RAWCHN_NUM)
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#define VIU_CHNID_DEV_FACTOR 2
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/* Hi3516A do not support cascade. The definition of Macro is just for compiling */
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#define VIU_MAX_CAS_CHN_NUM 2
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#define VIU_SUB_CHN_START 16 /* The starting number of sub channel*/
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#define VIU_CAS_CHN_START 32 /* The starting number of cascade channel */
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/* max number of VBI region*/
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#define VIU_MAX_VBI_NUM 2
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/* max length of one VBI region (by word) */
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#define VIU_MAX_VBI_LEN 8
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#define VO_MIN_CHN_WIDTH 32 /* channel minimal width */
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#define VO_MIN_CHN_HEIGHT 32 /* channel minimal height */
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#define VO_MAX_ZOOM_RATIO 1000 /* max zoom ratio, 1000 means 100% scale */
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#define VO_MAX_DEV_NUM 1 /* max dev num */
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#define VO_MAX_LAYER_NUM 16 //1 /* max layer num */
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#define PIP_MAX_CHN_NUM 8
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#define VHD_MAX_CHN_NUM 32 /* max VHD chn num */
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#define VO_MAX_CHN_NUM VHD_MAX_CHN_NUM /* max chn num */
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#define VO_MAX_LAYER_IN_DEV 1 /* max layer num of each dev */
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#define VO_MIN_CHN_LINE 3
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#define VO_MAX_GFX_LAYER_PER_DEV 1
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#define VO_MAX_GRAPHICS_LAYER_NUM 1
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#define MDDRC_ZONE_MAX_NUM 32
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#define VO_MAX_PRIORITY 2
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#define VO_MIN_TOLERATE 1 /* min play toleration 1ms */
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#define VO_MAX_TOLERATE 100000 /* max play toleration 100s */
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#define AI_DEV_MAX_NUM 1
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#define AO_DEV_MIN_NUM 0
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#define AO_DEV_MAX_NUM 1
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#define AIO_MAX_NUM 1
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#define AIO_MAX_CHN_NUM 16
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#define AENC_MAX_CHN_NUM 32
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#define ADEC_MAX_CHN_NUM 32
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/* For VPSS */
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#define VPSS_MAX_GRP_NUM 128
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#define VPSS_MAX_PHY_CHN_NUM 4
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#define VPSS_MAX_EXT_CHN_NUM 8
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#define VPSS_MAX_CHN_NUM (VPSS_MAX_PHY_CHN_NUM + VPSS_MAX_EXT_CHN_NUM)
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#define VPSS_BSTR_CHN 0
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#define VPSS_LSTR_CHN 1
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#define VPSS_PRE0_CHN 2
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#define VPSS_COVER_POINT_NUM 4
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/* For DEMUX */
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#define DEMUX_MAX_CHN_NUM 16
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/* For MUX */
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#define MUX_MAX_GRP_NUM 8
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#define MUX_MAX_CHN_NUM 16
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/* For CLOCK */
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#define CLOCK_MAX_CHN_NUM 16
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#ifdef __cplusplus
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}
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#endif /* __cplusplus */
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#endif /* __IPCLINUX_PLAT_DEFINES_H__ */
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