546 lines
18 KiB
C
Executable File
546 lines
18 KiB
C
Executable File
/*
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* (C) Copyright 2016
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* Allwinner Technology Co., Ltd. <www.allwinnertech.com>
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* zhouhuacai <zhouhuacai@allwinnertech.com>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* SPDX-License-Identifier: GPL-2.0
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*/
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#include <common.h>
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#include <sunxi_mbr.h>
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#include <boot_type.h>
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#include <sys_partition.h>
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#include <sys_config.h>
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#include <mmc.h>
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#include <power/sunxi/axp.h>
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#include <asm/io.h>
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#include <power/sunxi/pmu.h>
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#include <asm/arch/ccmu.h>
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#include <asm/arch/gpio.h>
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#include <asm/arch/dram.h>
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#include <fdt_support.h>
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DECLARE_GLOBAL_DATA_PTR;
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int enable_smp(void)
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{
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//SMP status is controlled by bit 6 of the CP15 Aux Ctrl Reg
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asm volatile("MRC p15, 0, r0, c1, c0, 1"); // Read ACTLR
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asm volatile("ORR r0, r0, #0x040"); // Set bit 6
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asm volatile("MCR p15, 0, r0, c1, c0, 1"); // Write ACTLR
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return 0;
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}
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__s32 boot_set_gpio(void *user_gpio_list, __u32 group_count_max, __s32 set_gpio)
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{
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normal_gpio_set_t *tmp_user_gpio_data, *gpio_list;
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__u32 first_port; //保存真正有效的GPIO的个数
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__u32 tmp_group_func_data;
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__u32 tmp_group_pull_data;
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__u32 tmp_group_dlevel_data;
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__u32 tmp_group_data_data;
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__u32 data_change = 0;
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// __u32 *tmp_group_port_addr;
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volatile __u32 *tmp_group_func_addr, *tmp_group_pull_addr;
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volatile __u32 *tmp_group_dlevel_addr, *tmp_group_data_addr;
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__u32 port, port_num, port_num_func, port_num_pull;
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__u32 pre_port, pre_port_num_func;
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__u32 pre_port_num_pull;
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__s32 i, tmp_val;
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gpio_list = (normal_gpio_set_t *)user_gpio_list;
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for(first_port = 0; first_port < group_count_max; first_port++)
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{
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tmp_user_gpio_data = gpio_list + first_port;
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port = tmp_user_gpio_data->port; //读出端口数值
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port_num = tmp_user_gpio_data->port_num; //读出端口中的某一个GPIO
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if(!port)
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{
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continue;
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}
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port_num_func = (port_num >> 3);
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port_num_pull = (port_num >> 4);
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tmp_group_func_addr = PIO_REG_CFG(port, port_num_func); //更新功能寄存器地址
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tmp_group_pull_addr = PIO_REG_PULL(port, port_num_pull); //更新pull寄存器
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tmp_group_dlevel_addr = PIO_REG_DLEVEL(port, port_num_pull);//更新level寄存器
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tmp_group_data_addr = PIO_REG_DATA(port); //更新data寄存器
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tmp_group_func_data = GPIO_REG_READ(tmp_group_func_addr);
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tmp_group_pull_data = GPIO_REG_READ(tmp_group_pull_addr);
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tmp_group_dlevel_data = GPIO_REG_READ(tmp_group_dlevel_addr);
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tmp_group_data_data = GPIO_REG_READ(tmp_group_data_addr);
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pre_port = port;
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pre_port_num_func = port_num_func;
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pre_port_num_pull = port_num_pull;
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//更新功能寄存器
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tmp_val = (port_num - (port_num_func << 3)) << 2;
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tmp_group_func_data &= ~(0x07 << tmp_val);
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if(set_gpio)
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{
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tmp_group_func_data |= (tmp_user_gpio_data->mul_sel & 0x07) << tmp_val;
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}
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//根据pull的值决定是否更新pull寄存器
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tmp_val = (port_num - (port_num_pull << 4)) << 1;
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if(tmp_user_gpio_data->pull >= 0)
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{
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tmp_group_pull_data &= ~( 0x03 << tmp_val);
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tmp_group_pull_data |= (tmp_user_gpio_data->pull & 0x03) << tmp_val;
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}
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//根据driver level的值决定是否更新driver level寄存器
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if(tmp_user_gpio_data->drv_level >= 0)
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{
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tmp_group_dlevel_data &= ~( 0x03 << tmp_val);
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tmp_group_dlevel_data |= (tmp_user_gpio_data->drv_level & 0x03) << tmp_val;
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}
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//根据用户输入，以及功能分配决定是否更新data寄存器
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if(tmp_user_gpio_data->mul_sel == 1)
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{
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if(tmp_user_gpio_data->data >= 0)
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{
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tmp_val = tmp_user_gpio_data->data & 1;
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tmp_group_data_data &= ~(1 << port_num);
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tmp_group_data_data |= tmp_val << port_num;
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data_change = 1;
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}
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}
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break;
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}
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//检查是否有数据存在
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if(first_port >= group_count_max)
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{
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return -1;
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}
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//保存用户数据
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for(i = first_port + 1; i < group_count_max; i++)
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{
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tmp_user_gpio_data = gpio_list + i; //gpio_set依次指向用户的每个GPIO数组成员
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port = tmp_user_gpio_data->port; //读出端口数值
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port_num = tmp_user_gpio_data->port_num; //读出端口中的某一个GPIO
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if(!port)
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{
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break;
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}
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port_num_func = (port_num >> 3);
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port_num_pull = (port_num >> 4);
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if((port_num_pull != pre_port_num_pull) || (port != pre_port)) //如果发现当前引脚的端口不一致，或者所在的pull寄存器不一致
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{
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GPIO_REG_WRITE(tmp_group_func_addr, tmp_group_func_data); //回写功能寄存器
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GPIO_REG_WRITE(tmp_group_pull_addr, tmp_group_pull_data); //回写pull寄存器
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GPIO_REG_WRITE(tmp_group_dlevel_addr, tmp_group_dlevel_data); //回写driver level寄存器
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if(data_change)
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{
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data_change = 0;
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GPIO_REG_WRITE(tmp_group_data_addr, tmp_group_data_data); //回写data寄存器
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}
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tmp_group_func_addr = PIO_REG_CFG(port, port_num_func); //更新功能寄存器地址
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tmp_group_pull_addr = PIO_REG_PULL(port, port_num_pull); //更新pull寄存器
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tmp_group_dlevel_addr = PIO_REG_DLEVEL(port, port_num_pull);//更新level寄存器
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tmp_group_data_addr = PIO_REG_DATA(port); //更新data寄存器
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tmp_group_func_data = GPIO_REG_READ(tmp_group_func_addr);
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tmp_group_pull_data = GPIO_REG_READ(tmp_group_pull_addr);
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tmp_group_dlevel_data = GPIO_REG_READ(tmp_group_dlevel_addr);
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tmp_group_data_data = GPIO_REG_READ(tmp_group_data_addr);
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}
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else if(pre_port_num_func != port_num_func) //如果发现当前引脚的功能寄存器不一致
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{
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GPIO_REG_WRITE(tmp_group_func_addr, tmp_group_func_data); //则只回写功能寄存器
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tmp_group_func_addr = PIO_REG_CFG(port, port_num_func); //更新功能寄存器地址
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tmp_group_func_data = GPIO_REG_READ(tmp_group_func_addr);
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}
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//保存当前硬件寄存器数据
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pre_port_num_pull = port_num_pull; //设置当前GPIO成为前一个GPIO
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pre_port_num_func = port_num_func;
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pre_port = port;
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//更新功能寄存器
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tmp_val = (port_num - (port_num_func << 3)) << 2;
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if(tmp_user_gpio_data->mul_sel >= 0)
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{
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tmp_group_func_data &= ~( 0x07 << tmp_val);
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if(set_gpio)
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{
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tmp_group_func_data |= (tmp_user_gpio_data->mul_sel & 0x07) << tmp_val;
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}
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}
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//根据pull的值决定是否更新pull寄存器
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tmp_val = (port_num - (port_num_pull << 4)) << 1;
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if(tmp_user_gpio_data->pull >= 0)
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{
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tmp_group_pull_data &= ~( 0x03 << tmp_val);
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tmp_group_pull_data |= (tmp_user_gpio_data->pull & 0x03) << tmp_val;
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}
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//根据driver level的值决定是否更新driver level寄存器
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if(tmp_user_gpio_data->drv_level >= 0)
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{
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tmp_group_dlevel_data &= ~( 0x03 << tmp_val);
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tmp_group_dlevel_data |= (tmp_user_gpio_data->drv_level & 0x03) << tmp_val;
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}
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//根据用户输入，以及功能分配决定是否更新data寄存器
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if(tmp_user_gpio_data->mul_sel == 1)
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{
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if(tmp_user_gpio_data->data >= 0)
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{
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tmp_val = tmp_user_gpio_data->data & 1;
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tmp_group_data_data &= ~(1 << port_num);
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tmp_group_data_data |= tmp_val << port_num;
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data_change = 1;
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}
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}
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}
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//for循环结束，如果存在还没有回写的寄存器，这里写回到硬件当中
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if(tmp_group_func_addr) //只要更新过寄存器地址，就可以对硬件赋值
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{ //那么把所有的值全部回写到硬件寄存器
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GPIO_REG_WRITE(tmp_group_func_addr, tmp_group_func_data); //回写功能寄存器
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GPIO_REG_WRITE(tmp_group_pull_addr, tmp_group_pull_data); //回写pull寄存器
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GPIO_REG_WRITE(tmp_group_dlevel_addr, tmp_group_dlevel_data); //回写driver level寄存器
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if(data_change)
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{
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GPIO_REG_WRITE(tmp_group_data_addr, tmp_group_data_data); //回写data寄存器
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}
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}
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return 0;
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}
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void Netease_gpio_init(void) {
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normal_gpio_set_t ldo_gpio[2] =
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{
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{ 8, 4, 1, -1, -1, 1, {0}},//4v5_ldo_en = port:PH04<1><default><default><0>
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{ 8, 5, 1, -1, -1, 1, {0}} //3v_ldo_en = port:PH05<1><default><default><0>
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};
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boot_set_gpio(ldo_gpio,2,1);
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}
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int board_init(void)
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{
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//asm volatile("b .");
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u32 reg_val;
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int cpu_status = 0;
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cpu_status = readl(SUNXI_CPUXCFG_BASE+0x80);
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cpu_status &= (0xf<<24);
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//note:
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//sbrom will enable smp bit when jmp to non-secure fel on AW1718.
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//but normal brom not do this operation.
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//so should enable smp when run uboot by normal fel mode.
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if(!cpu_status)
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enable_smp();
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if (uboot_spare_head.boot_data.work_mode != WORK_MODE_USB_PRODUCT)
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{
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//VE SRAM:set sram to normal mode, default boot mode
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reg_val = readl(SUNXI_SYSCRL_BASE+0X0004);
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reg_val &= ~(0x1<<24);
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writel(reg_val, SUNXI_SYSCRL_BASE+0X0004);
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//VE gating&VE Bus Reset :brom set them, but not require now
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reg_val = readl(CCMU_VE_BGR_REG);
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reg_val &= ~(0x1<<0);
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reg_val &= ~(0x1<<16);
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writel(reg_val, CCMU_VE_BGR_REG);
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}
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printf("Enable GPIO PH04 PH05, by Netease!\n");
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Netease_gpio_init();
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return 0;
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}
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void dram_init_banksize(void)
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{
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gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
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gd->bd->bi_dram[0].size = gd->ram_size;
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}
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int dram_init(void)
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{
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uint dram_size = 0;
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dram_size = uboot_spare_head.boot_data.dram_scan_size;
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if(dram_size)
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{
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gd->ram_size = dram_size * 1024 * 1024;
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}
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else
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{
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gd->ram_size = get_ram_size((long *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE);
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}
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print_size(gd->ram_size, "");
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putc('\n');
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return 0;
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}
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#ifdef CONFIG_GENERIC_MMC
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extern int sunxi_mmc_init(int sdc_no);
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int board_mmc_init(bd_t *bis)
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{
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sunxi_mmc_init(bis->bi_card_num);
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return 0;
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}
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void board_mmc_pre_init(int card_num)
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{
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bd_t *bd;
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bd = gd->bd;
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gd->bd->bi_card_num = card_num;
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mmc_initialize(bd);
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}
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int board_mmc_get_num(void)
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{
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return gd->boot_card_num;
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}
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void board_mmc_set_num(int num)
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{
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gd->boot_card_num = num;
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}
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#endif
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#ifdef CONFIG_DISPLAY_BOARDINFO
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int checkboard(void)
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{
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printf("Board: SUN6I\n");
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return 0;
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}
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#endif
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int cpu0_set_detected_paras(void)
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{
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return 0;
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}
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ulong get_spare_head_size(void)
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{
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return (ulong)sizeof(struct spare_boot_head_t);
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}
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extern int axp858_probe(void);
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extern int axp2585_probe(void);
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/**
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* platform_axp_probe -detect the pmu on board
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* @sunxi_axp_dev_pt: pointer to the axp array
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* @max_dev: offset of the property to retrieve
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* returns:
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* the num of pmu
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*/
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int platform_axp_probe(sunxi_axp_dev_t *sunxi_axp_dev_pt[], int max_dev)
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{
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u32 axp_num = 0;
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#ifdef CONFIG_SUNXI_MODULE_AXP
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if (!axp858_probe()) {
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tick_printf("PMU: AXP858 found\n");
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sunxi_axp_dev_pt[0] = &sunxi_axp_858;
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axp_num++;
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} else {
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printf("probe axp858 failed\n");
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sunxi_axp_dev_pt[0] = &sunxi_axp_null;
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}
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/*bmu probe*/
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if (!axp2585_probe()) {
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sunxi_axp_dev_pt[1] = &sunxi_axp_2585;
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axp_num++;
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} else {
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printf("probe axp858 failed\n");
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sunxi_axp_dev_pt[1] = &sunxi_axp_null;
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}
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#else
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sunxi_axp_dev_pt[0] = &sunxi_axp_null;
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sunxi_axp_dev_pt[1] = &sunxi_axp_null;
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#endif
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return axp_num;
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}
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char* board_hardware_info(void)
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{
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static char *hardware_info = "sun8iw15p1";
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return hardware_info;
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}
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#ifdef CONFIG_CMD_NET
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#ifdef CONFIG_USB_ETHER
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extern int sunxi_udc_probe(void);
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#ifdef CONFIG_SUNXI_SERIAL
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extern int get_serial_num_from_chipid(char* serial);
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static int sunxi_serial_num_is_zero(char *serial)
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{
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int i = 0;
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get_serial_num_from_chipid(serial);
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while(i < 20) {
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if (serial[i] != '0')
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break;
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i++;
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}
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if (i == 20)
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return 0;
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else
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return 1;
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}
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#endif
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static void sunxi_random_ether_addr(void)
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{
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int i = 0;
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char serial[128] = {0};
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ulong tmp = 0;
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char tmp_s[5] = "";
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unsigned long long rand = 0;
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uchar usb_net_addr[6];
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char mac[18] = "";
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char tmp_mac = 0;
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int ret = 0;
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/*
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* get random mac address from serial num if it's not zero, or from timer.
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*/
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#ifdef CONFIG_SUNXI_SERIAL
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ret = sunxi_serial_num_is_zero(serial);
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#endif
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if (ret == 1) {
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for(i = 0; i < 6; i++) {
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if(i == 0)
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strncpy(tmp_s, serial+16, 4);
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else if ((i == 1) || (i == 4))
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strncpy(tmp_s, serial+12, 4);
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else if (i == 2)
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strncpy(tmp_s, serial+8, 4);
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else
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strncpy(tmp_s,serial+4,4);
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tmp = simple_strtoul(tmp_s, NULL, 16);
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rand = (tmp) * 0xfedf4fd;
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rand = rand * 0xd263f967 + 0xea6f22ad8235;
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usb_net_addr[i] = (uchar)(rand % 0x100);
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}
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} else {
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for(i = 0; i < 6; i++) {
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rand = get_timer_masked() * 0xfedf4fd;
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rand = rand * 0xd263f967 + 0xea6f22ad8235;
|
||
usb_net_addr[i] = (uchar)(rand % 0x100);
|
||
}
|
||
}
|
||
|
||
/*
|
||
* usbnet_hostaddr, usb_net_addr[0] = 0xxx xx10
|
||
*/
|
||
tmp_mac = usb_net_addr[0] & 0x7e;
|
||
tmp_mac = tmp_mac | 0x02;
|
||
sprintf(mac, "%02x:%02x:%02x:%02x:%02x:%02x", tmp_mac, usb_net_addr[1],usb_net_addr[2],
|
||
usb_net_addr[3],usb_net_addr[4],usb_net_addr[5]);
|
||
setenv("usbnet_hostaddr", mac);
|
||
|
||
/*
|
||
* usbnet_devaddr, usb_net_addr[0] = 1xxx xx10
|
||
*/
|
||
tmp_mac = usb_net_addr[0] & 0xfe;
|
||
tmp_mac = tmp_mac | 0x82;
|
||
sprintf(mac, "%02x:%02x:%02x:%02x:%02x:%02x", tmp_mac, usb_net_addr[1],usb_net_addr[2],
|
||
usb_net_addr[3],usb_net_addr[4],usb_net_addr[5]);
|
||
setenv("usbnet_devaddr", mac);
|
||
}
|
||
#endif
|
||
|
||
int board_eth_init(bd_t *bis)
|
||
{
|
||
int rc = 0;
|
||
|
||
#if defined(CONFIG_USB_ETHER)
|
||
sunxi_random_ether_addr();
|
||
sunxi_udc_probe();
|
||
usb_eth_initialize(bis);
|
||
#endif
|
||
|
||
return rc;
|
||
}
|
||
#endif
|
||
|
||
int update_fdt_dram_para(void *dtb_base)
|
||
{
|
||
/*fix dram para*/
|
||
int nodeoffset = 0;
|
||
uint32_t *dram_para = NULL;
|
||
dram_para = (uint32_t *)uboot_spare_head.boot_data.dram_para;
|
||
|
||
pr_msg("(sunxi):update dtb dram start\n");
|
||
nodeoffset = fdt_path_offset(dtb_base, "/dram");
|
||
if (nodeoffset < 0) {
|
||
printf("## error: %s : %s\n", __func__, fdt_strerror(nodeoffset));
|
||
return -1;
|
||
}
|
||
fdt_setprop_u32(dtb_base, nodeoffset, "dram_clk", dram_para[0]);
|
||
fdt_setprop_u32(dtb_base, nodeoffset, "dram_type", dram_para[1]);
|
||
fdt_setprop_u32(dtb_base, nodeoffset, "dram_dx_odt", dram_para[2]);
|
||
fdt_setprop_u32(dtb_base, nodeoffset, "dram_dx_dri", dram_para[3]);
|
||
fdt_setprop_u32(dtb_base, nodeoffset, "dram_ca_dri", dram_para[4]);
|
||
fdt_setprop_u32(dtb_base, nodeoffset, "dram_odt_en", dram_para[5]);
|
||
fdt_setprop_u32(dtb_base, nodeoffset, "dram_para1", dram_para[6]);
|
||
fdt_setprop_u32(dtb_base, nodeoffset, "dram_para2", dram_para[7]);
|
||
fdt_setprop_u32(dtb_base, nodeoffset, "dram_mr0", dram_para[8]);
|
||
fdt_setprop_u32(dtb_base, nodeoffset, "dram_mr1", dram_para[9]);
|
||
fdt_setprop_u32(dtb_base, nodeoffset, "dram_mr2", dram_para[10]);
|
||
fdt_setprop_u32(dtb_base, nodeoffset, "dram_mr3", dram_para[11]);
|
||
fdt_setprop_u32(dtb_base, nodeoffset, "dram_mr4", dram_para[12]);
|
||
fdt_setprop_u32(dtb_base, nodeoffset, "dram_mr5", dram_para[13]);
|
||
fdt_setprop_u32(dtb_base, nodeoffset, "dram_mr6", dram_para[14]);
|
||
fdt_setprop_u32(dtb_base, nodeoffset, "dram_mr11", dram_para[15]);
|
||
fdt_setprop_u32(dtb_base, nodeoffset, "dram_mr12", dram_para[16]);
|
||
fdt_setprop_u32(dtb_base, nodeoffset, "dram_mr13", dram_para[17]);
|
||
fdt_setprop_u32(dtb_base, nodeoffset, "dram_mr14", dram_para[18]);
|
||
fdt_setprop_u32(dtb_base, nodeoffset, "dram_mr16", dram_para[19]);
|
||
fdt_setprop_u32(dtb_base, nodeoffset, "dram_mr17", dram_para[20]);
|
||
fdt_setprop_u32(dtb_base, nodeoffset, "dram_mr22", dram_para[21]);
|
||
fdt_setprop_u32(dtb_base, nodeoffset, "dram_tpr0", dram_para[22]);
|
||
fdt_setprop_u32(dtb_base, nodeoffset, "dram_tpr1", dram_para[23]);
|
||
fdt_setprop_u32(dtb_base, nodeoffset, "dram_tpr2", dram_para[24]);
|
||
fdt_setprop_u32(dtb_base, nodeoffset, "dram_tpr3", dram_para[25]);
|
||
fdt_setprop_u32(dtb_base, nodeoffset, "dram_tpr6", dram_para[26]);
|
||
fdt_setprop_u32(dtb_base, nodeoffset, "dram_tpr10", dram_para[27]);
|
||
fdt_setprop_u32(dtb_base, nodeoffset, "dram_tpr11", dram_para[28]);
|
||
fdt_setprop_u32(dtb_base, nodeoffset, "dram_tpr12", dram_para[29]);
|
||
fdt_setprop_u32(dtb_base, nodeoffset, "dram_tpr13", dram_para[30]);
|
||
fdt_setprop_u32(dtb_base, nodeoffset, "dram_tpr14", dram_para[31]);
|
||
pr_msg("update dtb dram end\n");
|
||
return 0;
|
||
}
|
||
|