84 lines
2.3 KiB
ArmAsm
Executable File
84 lines
2.3 KiB
ArmAsm
Executable File
;***********************************************************************************************************************
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; eGON
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; the Embedded GO-ON Bootloader System
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;
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; Copyright(C), 2006-2008, SoftWinners Microelectronic Co., Ltd.
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; All Rights Reserved
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;
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; File Name : Boot0.s
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;
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; Author : Gary.Wang
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;
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; Version : 1.1.0
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;
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; Date : 2007.10.11
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;
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; Description :
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;
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; Functions list : none.
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;
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; Others : None at present.
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;
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;
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; History :
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;
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; <Author> <time> <version> <description>
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;
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; Gary.Wang 2007.10.07 1.1.0 build the file
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;
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; Gary.Wang 2007.10.10 1.1.0 delete "interrupt vector table"
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;
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; Gary.Wang 2007.10.11 1.1.0 add "boot_file_head_t"
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;
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;***********************************************************************************************************************
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INCLUDE boot0_i.inc
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IMPORT Boot0_C_part
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IMPORT cpu_init_s
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PRESERVE8
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AREA init, CODE, READONLY
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CODE32
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ENTRY
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;/*********************************the begin of initializing system********************************/
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initialize
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mrs r0, cpsr
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bic r0, r0, #ARMV7_MODE_MASK
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orr r0, r0, #ARMV7_SVC_MODE
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orr r0, r0, #( ARMV7_IRQ_MASK | ARMV7_FIQ_MASK ) ;// After reset, ARM automaticly disables IRQ and FIQ, and runs in SVC mode.
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bic r0, r0, #ARMV7_CC_E_BIT ;// set little-endian
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msr cpsr_c, r0
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;// configure memory system : disable MMU,cache and write buffer; set little_endian;
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mrc p15, 0, r0, c1, c0
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bic r0, r0, #( ARMV7_C1_M_BIT | ARMV7_C1_C_BIT ) ;// disable MMU, data cache
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bic r0, r0, #( ARMV7_C1_I_BIT | ARMV7_C1_Z_BIT ) ;// disable instruction cache, disable flow prediction
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bic r0, r0, #( ARMV7_C1_A_BIT) ;// disable align
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mcr p15, 0, r0, c1, c0
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;// set SP for C language
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ldr sp, =BOOT0_STACK_BOTTOM
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;// cpu init
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bl cpu_init_s
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;/**********************************the end of initializing system*********************************/
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bl Boot0_C_part
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b . ;// infinite loop
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END
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