353 lines
8.1 KiB
C
Executable File
353 lines
8.1 KiB
C
Executable File
/*
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* (C) Copyright 2007-2013
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* Allwinner Technology Co., Ltd. <www.allwinnertech.com>
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* Jerry Wang <wangflord@allwinnertech.com>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <asm/io.h>
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#include <asm/arch/platform.h>
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#include <asm/arch/ccmu.h>
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#include <asm/arch/clock.h>
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#include <asm/arch/timer.h>
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#include <asm/arch/intc.h>
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#include <div64.h>
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#define TIMER_MODE (0 << 7) /* continuous mode */
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#define TIMER_DIV (0 << 4) /* pre scale 1 */
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#define TIMER_SRC (1 << 2) /* osc24m */
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#define TIMER_RELOAD (1 << 1) /* reload internal value */
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#define TIMER_EN (1 << 0) /* enable timer */
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static int timer_used_status;
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/* init timer register */
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int timer_init(void)
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{
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struct sunxi_timer_reg *timer_reg = (struct sunxi_timer_reg *)SUNXI_TIMER_BASE;
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#ifdef CONFIG_ARCH_SUN3IW1P1
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writel(readl(CCMU_AVS_CLK_REG)|(1U << 31),CCMU_AVS_CLK_REG);
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timer_reg->avs.ctl = 3;
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timer_reg->avs.div |= 0xb04af;
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#endif
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timer_reg->tirqen = 0;
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timer_reg->tirqsta |= 0x03;
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return 0;
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}
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void timer_exit(void)
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{
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struct sunxi_timer_reg *timer_reg = (struct sunxi_timer_reg *)SUNXI_TIMER_BASE;
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timer_reg->tirqen = 0;
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timer_reg->tirqsta |= 0x043f;
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timer_reg->timer[0].ctl = 0;
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timer_reg->timer[1].ctl = 0;
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#ifdef CONFIG_ARCH_SUN3IW1P1
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timer_reg->avs.ctl = 0;
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timer_reg->avs.div = 0x05DB05DB;
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writel(readl(CCMU_AVS_CLK_REG) & 0x0fffffff, CCMU_AVS_CLK_REG);
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#endif
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}
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/*
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* This function is derived from PowerPC code (timebase clock frequency).
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* On ARM it returns the number of timer ticks per second.
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*/
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ulong get_tbclk(void)
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{
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return 24000000;
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}
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#ifdef CONFIG_ARCH_SUN3IW1P1
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static inline u64 get_arch_counter(void)
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{
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u32 t_us;
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struct sunxi_timer_reg *timer_reg = (struct sunxi_timer_reg *)SUNXI_TIMER_BASE;
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t_us = timer_reg->avs.cnt1;
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return (u64)(t_us*24);
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}
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#else
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/*
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* 64bit arch timer.CNTPCT
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* Freq = 24000000Hz
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*/
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static inline u64 get_arch_counter(void)
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{
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u32 low=0, high = 0;
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asm volatile("mrrc p15, 0, %0, %1, c14"
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: "=r" (low), "=r" (high)
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:
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: "memory");
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return (((u64)high)<<32 | low);
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}
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#endif
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void __usdelay(unsigned long us)
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{
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u64 t1, t2;
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t1 = get_arch_counter();
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t2 = t1 + us*24;
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do
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{
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t1 = get_arch_counter();
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}
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while(t2 >= t1);
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}
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void __msdelay(unsigned long ms)
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{
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__usdelay(ms*1000);
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return ;
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}
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/* get the current time(ms), freq = 24000000Hz*/
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int runtime_tick(void)
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{
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u64 cnt= 0;
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cnt = get_arch_counter();
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return lldiv(cnt, 24000);
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}
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ulong get_timer_masked(void)
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{
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/* current tick value */
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ulong now = runtime_tick();
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return now;
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}
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/* timer without interrupts */
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/* count the delay by seconds */
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ulong get_timer(ulong base)
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{
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return get_timer_masked() - base;
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}
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/*
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* This function is derived from PowerPC code (read timebase as long long).
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* On ARM it just returns the timer value.
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*/
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unsigned long long get_ticks(void)
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{
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return get_timer(0);
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}
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/*
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* This function is derived from PowerPC code (timebase clock frequency).
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* On ARM it returns the number of timer ticks per second.
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*/
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static void timerX_callback_default(void *data);
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struct __timer_callback
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{
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void (*func_back)( void *data);
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unsigned long data;
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};
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struct __timer_callback timer_callback[2] =
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{
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{timerX_callback_default, 0},
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{timerX_callback_default, 1}
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};
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static void timerX_callback_default(void *data)
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{
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printf("this is only for test, timer number=%d\n", (uint)(ulong)data);
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}
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void timer0_func(void *data)
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{
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struct sunxi_timer_reg *timer_control = (struct sunxi_timer_reg *)SUNXI_TIMER_BASE;
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if(!(timer_control->tirqsta & 0x01))
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{
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return ;
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}
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timer_control->tirqen &= ~0x01;
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timer_control->tirqsta = 0x01;
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irq_disable(AW_IRQ_TIMER0);
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timer_used_status &= ~1;
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debug("timer 0 occur\n");
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timer_callback[0].func_back((void *)timer_callback[0].data);
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}
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void timer1_func(void *data)
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{
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struct sunxi_timer_reg *timer_control = (struct sunxi_timer_reg *)SUNXI_TIMER_BASE;
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if(!(timer_control->tirqsta & 0x02))
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{
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return ;
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}
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timer_control->tirqen &= ~0x02;
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timer_control->tirqsta = 0x02;
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irq_disable(AW_IRQ_TIMER1);
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timer_used_status &= ~(1<<1);
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debug("timer 1 occur\n");
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timer_callback[1].func_back((void *)timer_callback[1].data);
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}
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void init_timer(struct timer_list *timer)
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{
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return ;
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}
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void add_timer(struct timer_list *timer)
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{
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u32 reg_val;
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int timer_num;
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struct sunxi_timer *timer_tcontrol;
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struct sunxi_timer_reg *timer_reg;
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if(timer->expires <= 0)
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{
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timer->expires = 1000;
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}
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if(!timer->expires)
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{
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return ;
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}
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debug("timer delay time %d\n", timer->expires);
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if(!(timer_used_status & 0x01))
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{
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timer_used_status |= 0x01;
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timer_num = 0;
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}
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else if(!(timer_used_status & 0x02))
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{
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timer_used_status |= 0x02;
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timer_num = 1;
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}
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else
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{
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printf("timer err: there is no timer cound be used\n");
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return ;
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}
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//debug("timer status = %x, number = %d\n", timer_used_status, timer_num);
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timer->timer_num = timer_num;
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timer_reg = (struct sunxi_timer_reg *)SUNXI_TIMER_BASE;
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timer_tcontrol = &((struct sunxi_timer_reg *)SUNXI_TIMER_BASE)->timer[timer_num];
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#ifndef FPGA_PLATFORM
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reg_val = (0 << 0) | // 不启动TIMER
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(1 << 1) | // 使用单次模式
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(1 << 2) | // 使用高频晶振24M
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(5 << 4) | // 除频系统32，保证当设置时间是1的时候，触发延时1ms
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(1 << 7);
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#else
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reg_val = (0 << 0) | // 不启动TIMER
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(1 << 1) | // 使用单次模式
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(0 << 2) | // 使用高频晶振24M
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(0 << 4) | //
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(1 << 7);
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#endif
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timer_tcontrol->ctl = reg_val;
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#ifndef FPGA_PLATFORM
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timer_tcontrol->inter = timer->expires * (24000 / 32);
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#else
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timer_tcontrol->inter = timer->expires * 1000/32;
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#endif
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timer_callback[timer_num].func_back = timer->function;
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timer_callback[timer_num].data = timer->data;
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if(!timer_num)
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{
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irq_install_handler(AW_IRQ_TIMER0 + timer_num, timer0_func, (void *)&timer_callback[timer_num].data);
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}
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else
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{
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irq_install_handler(AW_IRQ_TIMER0 + timer_num, timer1_func, (void *)&timer_callback[timer_num].data);
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}
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timer_tcontrol->ctl |= (1 << 1);
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while(timer_tcontrol->ctl & 0x02);
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//debug("timer number = %d\n", timer_num);
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irq_enable(AW_IRQ_TIMER0 + timer_num);
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timer_tcontrol->ctl |= 1;
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timer_reg->tirqsta = (1 << timer_num);
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timer_reg->tirqen |= (1 << timer_num);
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//debug("timer number = %d\n", timer_num);
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return ;
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}
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void del_timer(struct timer_list *timer)
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{
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struct sunxi_timer *timer_tcontrol;
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struct sunxi_timer_reg *timer_reg;
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int num = timer->timer_num;
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//debug("timer status at delling begin = %x, number = %d\n", timer_used_status, num);
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timer_reg = (struct sunxi_timer_reg *)SUNXI_TIMER_BASE;
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timer_tcontrol = &((struct sunxi_timer_reg *)SUNXI_TIMER_BASE)->timer[num];
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irq_disable(AW_IRQ_TIMER0 + num);
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timer_tcontrol->ctl &= ~1;
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timer_reg->tirqsta = (1<<num);
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timer_reg->tirqen &= ~(1<<num);
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timer_callback[num].data = num;
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timer_callback[num].func_back = timerX_callback_default;
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timer_used_status &= ~(1 << num);
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//debug("timer status at delling end = %x\n", timer_used_status);
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return ;
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}
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void stick_printf(void)
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{
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uint time, time_sec, time_rest;
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time = get_ticks();
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time_sec = time/1000;
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time_rest = time%1000;
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printf("[%8d.%3d]\n",time_sec, time_rest);
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return ;
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}
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void tick0_printf(char *s, int line)
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{
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uint time, time_sec, time_rest;
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time = get_ticks();
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time_sec = time/1000; time_rest = time%1000;
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if(s == NULL)
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{
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printf("[%8d.%3d]\n",time_sec, time_rest);
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}
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else
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{
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printf("[%8d.%3d] %s %d\n",time_sec, time_rest, s, line);
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}
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return ;
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}
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