655 lines
23 KiB
C
Executable File
655 lines
23 KiB
C
Executable File
/*
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* Allwinner sun8iw8p1 SoCs pinctrl driver.
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*
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* Copyright (C) 2016 czy
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*
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* czy <chenzunyin@allwinnertech.com>
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*
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* Copyright (C) 2014 Jackie Hwang
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*
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* Jackie Hwang <huangshr@allwinnertech.com>
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*
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* Copyright (C) 2014 Chen-Yu Tsai
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*
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* Chen-Yu Tsai <wens@csie.org>
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*
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* Copyright (C) 2014 Maxime Ripard
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*
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* Maxime Ripard <maxime.ripard@free-electrons.com>
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <linux/of.h>
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#include <linux/of_device.h>
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#include <linux/pinctrl/pinctrl.h>
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#include "pinctrl-sunxi.h"
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static const struct sunxi_desc_pin sun8iw8p1_pins[] = {
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SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 0),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "uart2"), /* TX */
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SUNXI_FUNCTION(0x5, "vdevice"), /* Vdevcie for test */
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SUNXI_FUNCTION(0x7, "io_disabled"),
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SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 0)),
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SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 1),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "uart2"), /* RX */
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SUNXI_FUNCTION(0x5, "vdevice"), /* Vdevcie for test */
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SUNXI_FUNCTION(0x7, "io_disabled"),
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SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 1)),
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SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 2),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "uart2"), /* RTS */
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SUNXI_FUNCTION(0x7, "io_disabled"),
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SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 2)),
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SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 3),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "uart2"), /* CTS */
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SUNXI_FUNCTION(0x7, "io_disabled"),
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SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 3)),
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SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 4),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "pwm0"), /* PWM0 */
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SUNXI_FUNCTION(0x7, "io_disabled"),
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SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 4)),
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SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 5),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "pwm1"), /* PWM1 */
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SUNXI_FUNCTION(0x7, "io_disabled"),
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SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 5)),
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SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 6),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "twi0"), /* SCK */
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SUNXI_FUNCTION(0x7, "io_disabled"),
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SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 6)),
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SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 7),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "twi0"), /* SDK */
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SUNXI_FUNCTION(0x7, "io_disabled"),
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SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 7)),
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SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 8),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "twi1"), /* SCK */
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SUNXI_FUNCTION(0x3, "uart0"), /* TX */
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SUNXI_FUNCTION(0x7, "io_disabled"),
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SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 8)),
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SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 9),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "twi1"), /* SDA */
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SUNXI_FUNCTION(0x3, "uart0"), /* RX */
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SUNXI_FUNCTION(0x7, "io_disabled"),
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SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 9)),
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SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 10),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "jtag0"), /* MS0 */
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SUNXI_FUNCTION(0x7, "io_disabled"),
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SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 10)),
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SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 11),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "jtag0"), /* CK0 */
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SUNXI_FUNCTION(0x7, "io_disabled"),
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SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 11)),
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SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 12),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "jtag0"), /* DO0 */
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SUNXI_FUNCTION(0x7, "io_disabled"),
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SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 12)),
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SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 13),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "jtag0"), /* DI0 */
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SUNXI_FUNCTION(0x7, "io_disabled"),
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SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 13)),
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/* HOLE */
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SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 0),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "sdc2"), /* CLK */
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SUNXI_FUNCTION(0x3, "spi0"), /* MISO */
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SUNXI_FUNCTION(0x7, "io_disabled")),
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SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 1),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "sdc2"), /* CMD */
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SUNXI_FUNCTION(0x3, "spi0"), /* CLK */
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SUNXI_FUNCTION(0x7, "io_disabled")),
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SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 2),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "sdc2"), /* RST */
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SUNXI_FUNCTION(0x3, "spi0"), /* CS */
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SUNXI_FUNCTION(0x7, "io_disabled")),
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SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 3),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "sdc2"), /* D0 */
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SUNXI_FUNCTION(0x3, "spi0"), /* MOSI */
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SUNXI_FUNCTION(0x7, "io_disabled")),
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SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 4),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "sdc2"), /* D1 */
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SUNXI_FUNCTION(0x7, "io_disabled")),
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SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 5),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "sdc2"), /* D2 */
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SUNXI_FUNCTION(0x7, "io_disabled")),
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SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 6),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "sdc2"), /* D3 */
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SUNXI_FUNCTION(0x7, "io_disabled")),
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SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 7),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "sdc2"), /* D4 */
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SUNXI_FUNCTION(0x7, "io_disabled")),
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SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 8),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "sdc2"), /* D5 */
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SUNXI_FUNCTION(0x7, "io_disabled")),
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SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 9),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "sdc2"), /* D6 */
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SUNXI_FUNCTION(0x7, "io_disabled")),
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SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 10),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "sdc2"), /* D7 */
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SUNXI_FUNCTION(0x7, "io_disabled")),
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/* HOLE */
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SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 0),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "lcd0"), /* D2 */
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SUNXI_FUNCTION(0x4, "gmac0"), /* RXD3 */
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SUNXI_FUNCTION(0x7, "io_disabled")),
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SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 1),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "lcd0"), /* D3 */
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SUNXI_FUNCTION(0x4, "gmac0"), /* RXD2 */
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SUNXI_FUNCTION(0x7, "io_disabled")),
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SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 2),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "lcd0"), /* D4 */
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SUNXI_FUNCTION(0x4, "gmac0"), /* RXD1 */
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SUNXI_FUNCTION(0x7, "io_disabled")),
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SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 3),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "lcd0"), /* D5 */
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SUNXI_FUNCTION(0x4, "gmac0"), /* RXD0 */
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SUNXI_FUNCTION(0x7, "io_disabled")),
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SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 4),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "lcd0"), /* D6 */
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SUNXI_FUNCTION(0x4, "gmac0"), /* RXCK */
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SUNXI_FUNCTION(0x7, "io_disabled")),
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SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 5),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "lcd0"), /* D7 */
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SUNXI_FUNCTION(0x4, "gmac0"), /* RXCTL */
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SUNXI_FUNCTION(0x7, "io_disabled")),
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SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 6),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "lcd0"), /* D10 */
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SUNXI_FUNCTION(0x4, "gmac0"), /* NULL */
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SUNXI_FUNCTION(0x7, "io_disabled")),
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SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 7),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "lcd0"), /* D11 */
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SUNXI_FUNCTION(0x4, "gmac0"), /* TXD3 */
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SUNXI_FUNCTION(0x7, "io_disabled")),
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SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 8),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "lcd0"), /* D12 */
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SUNXI_FUNCTION(0x4, "gmac0"), /* TXD2 */
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SUNXI_FUNCTION(0x7, "io_disabled")),
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SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 9),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "lcd0"), /* D13 */
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SUNXI_FUNCTION(0x4, "gmac0"), /* TXD1 */
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SUNXI_FUNCTION(0x7, "io_disabled")),
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SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 10),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "lcd0"), /* D14 */
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SUNXI_FUNCTION(0x4, "gmac0"), /* TXD0 */
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SUNXI_FUNCTION(0x7, "io_disabled")),
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SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 11),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "lcd0"), /* D15 */
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SUNXI_FUNCTION(0x4, "gmac0"), /* NULL */
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SUNXI_FUNCTION(0x7, "io_disabled")),
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SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 12),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "lcd0"), /* D18 */
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SUNXI_FUNCTION(0x3, "lvds"), /* VP0 */
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SUNXI_FUNCTION(0x4, "gmac0"), /* TXCK */
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SUNXI_FUNCTION(0x7, "io_disabled")),
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SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 13),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "lcd0"), /* D19 */
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SUNXI_FUNCTION(0x3, "lvds"), /* VN0 */
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SUNXI_FUNCTION(0x4, "gmac0"), /* TXCTL */
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SUNXI_FUNCTION(0x7, "io_disabled")),
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SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 14),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "lcd0"), /* D20 */
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SUNXI_FUNCTION(0x3, "lvds"), /* VP1 */
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SUNXI_FUNCTION(0x4, "gmac0"), /* NULL */
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SUNXI_FUNCTION(0x7, "io_disabled")),
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SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 15),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "lcd0"), /* D21 */
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SUNXI_FUNCTION(0x3, "lvds"), /* VN1 */
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SUNXI_FUNCTION(0x4, "gmac0"), /* CLKIN */
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SUNXI_FUNCTION(0x7, "io_disabled")),
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SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 16),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "lcd0"), /* D22 */
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SUNXI_FUNCTION(0x3, "lvds"), /* VP2 */
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SUNXI_FUNCTION(0x4, "gmac0"), /* MDC */
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SUNXI_FUNCTION(0x7, "io_disabled")),
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SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 17),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "lcd0"), /* D23 */
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SUNXI_FUNCTION(0x3, "lvds"), /* VN2 */
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SUNXI_FUNCTION(0x4, "gmac0"), /* MDIO */
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SUNXI_FUNCTION(0x7, "io_disabled")),
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SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 18),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "lcd0"), /* CLK */
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SUNXI_FUNCTION(0x3, "lvds"), /* VPC */
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SUNXI_FUNCTION(0x7, "io_disabled")),
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SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 19),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "lcd0"), /* DE */
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SUNXI_FUNCTION(0x3, "lvds"), /* VNC */
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SUNXI_FUNCTION(0x7, "io_disabled")),
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SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 20),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "lcd0"), /* HSYNC */
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SUNXI_FUNCTION(0x3, "lvds"), /* VP3 */
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SUNXI_FUNCTION(0x7, "io_disabled")),
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SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 21),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "lcd0"), /* VSYNC */
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SUNXI_FUNCTION(0x3, "lvds"), /* VN3 */
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SUNXI_FUNCTION(0x7, "io_disabled")),
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/* HOLE */
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SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 0),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "csi1"), /* VSYNC */
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SUNXI_FUNCTION(0x3, "lcd0"), /* CLK */
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SUNXI_FUNCTION(0x7, "io_disabled")),
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SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 1),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "csi1"), /* MCLK */
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SUNXI_FUNCTION(0x3, "lcd0"), /* DE */
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SUNXI_FUNCTION(0x7, "io_disabled")),
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SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 2),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "csi1"), /* HSYNC */
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SUNXI_FUNCTION(0x3, "lcd0"), /* HSYNC */
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SUNXI_FUNCTION(0x7, "io_disabled")),
|
|
SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 3),
|
|
SUNXI_FUNCTION(0x0, "gpio_in"),
|
|
SUNXI_FUNCTION(0x1, "gpio_out"),
|
|
SUNXI_FUNCTION(0x2, "csi1"), /* VSYNC */
|
|
SUNXI_FUNCTION(0x3, "lcd0"), /* VSYNC */
|
|
SUNXI_FUNCTION(0x7, "io_disabled")),
|
|
SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 4),
|
|
SUNXI_FUNCTION(0x0, "gpio_in"),
|
|
SUNXI_FUNCTION(0x1, "gpio_out"),
|
|
SUNXI_FUNCTION(0x2, "csi1"), /* D0 */
|
|
SUNXI_FUNCTION(0x3, "lcd0"), /* D2 */
|
|
SUNXI_FUNCTION(0x7, "io_disabled")),
|
|
SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 5),
|
|
SUNXI_FUNCTION(0x0, "gpio_in"),
|
|
SUNXI_FUNCTION(0x1, "gpio_out"),
|
|
SUNXI_FUNCTION(0x2, "csi1"), /* D1 */
|
|
SUNXI_FUNCTION(0x3, "lcd0"), /* D3 */
|
|
SUNXI_FUNCTION(0x7, "io_disabled")),
|
|
SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 6),
|
|
SUNXI_FUNCTION(0x0, "gpio_in"),
|
|
SUNXI_FUNCTION(0x1, "gpio_out"),
|
|
SUNXI_FUNCTION(0x2, "csi1"), /* D2 */
|
|
SUNXI_FUNCTION(0x3, "lcd0"), /* D4 */
|
|
SUNXI_FUNCTION(0x7, "io_disabled")),
|
|
SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 7),
|
|
SUNXI_FUNCTION(0x0, "gpio_in"),
|
|
SUNXI_FUNCTION(0x1, "gpio_out"),
|
|
SUNXI_FUNCTION(0x2, "csi1"), /* D3 */
|
|
SUNXI_FUNCTION(0x3, "lcd0"), /* D5 */
|
|
SUNXI_FUNCTION(0x7, "io_disabled")),
|
|
SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 8),
|
|
SUNXI_FUNCTION(0x0, "gpio_in"),
|
|
SUNXI_FUNCTION(0x1, "gpio_out"),
|
|
SUNXI_FUNCTION(0x2, "csi1"), /* D4 */
|
|
SUNXI_FUNCTION(0x3, "lcd0"), /* D6 */
|
|
SUNXI_FUNCTION(0x7, "io_disabled")),
|
|
SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 9),
|
|
SUNXI_FUNCTION(0x0, "gpio_in"),
|
|
SUNXI_FUNCTION(0x1, "gpio_out"),
|
|
SUNXI_FUNCTION(0x2, "csi1"), /* D5 */
|
|
SUNXI_FUNCTION(0x3, "lcd0"), /* D7 */
|
|
SUNXI_FUNCTION(0x7, "io_disabled")),
|
|
SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 10),
|
|
SUNXI_FUNCTION(0x0, "gpio_in"),
|
|
SUNXI_FUNCTION(0x1, "gpio_out"),
|
|
SUNXI_FUNCTION(0x2, "csi1"), /* D6 */
|
|
SUNXI_FUNCTION(0x3, "lcd0"), /* D10 */
|
|
SUNXI_FUNCTION(0x7, "io_disabled")),
|
|
SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 11),
|
|
SUNXI_FUNCTION(0x0, "gpio_in"),
|
|
SUNXI_FUNCTION(0x1, "gpio_out"),
|
|
SUNXI_FUNCTION(0x2, "csi1"), /* D7 */
|
|
SUNXI_FUNCTION(0x3, "lcd0"), /* D11 */
|
|
SUNXI_FUNCTION(0x7, "io_disabled")),
|
|
SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 12),
|
|
SUNXI_FUNCTION(0x0, "gpio_in"),
|
|
SUNXI_FUNCTION(0x1, "gpio_out"),
|
|
SUNXI_FUNCTION(0x2, "csi1"), /* D8 */
|
|
SUNXI_FUNCTION(0x3, "lcd0"), /* D12 */
|
|
SUNXI_FUNCTION(0x7, "io_disabled")),
|
|
SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 13),
|
|
SUNXI_FUNCTION(0x0, "gpio_in"),
|
|
SUNXI_FUNCTION(0x1, "gpio_out"),
|
|
SUNXI_FUNCTION(0x2, "csi1"), /* D9 */
|
|
SUNXI_FUNCTION(0x3, "lcd0"), /* D13 */
|
|
SUNXI_FUNCTION(0x7, "io_disabled")),
|
|
SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 14),
|
|
SUNXI_FUNCTION(0x0, "gpio_in"),
|
|
SUNXI_FUNCTION(0x1, "gpio_out"),
|
|
SUNXI_FUNCTION(0x2, "csi1"), /* D10 */
|
|
SUNXI_FUNCTION(0x3, "lcd0"), /* D14 */
|
|
SUNXI_FUNCTION(0x7, "io_disabled")),
|
|
SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 15),
|
|
SUNXI_FUNCTION(0x0, "gpio_in"),
|
|
SUNXI_FUNCTION(0x1, "gpio_out"),
|
|
SUNXI_FUNCTION(0x2, "csi1"), /* D11 */
|
|
SUNXI_FUNCTION(0x3, "lcd0"), /* D15 */
|
|
SUNXI_FUNCTION(0x7, "io_disabled")),
|
|
SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 16),
|
|
SUNXI_FUNCTION(0x0, "gpio_in"),
|
|
SUNXI_FUNCTION(0x1, "gpio_out"),
|
|
SUNXI_FUNCTION(0x2, "csi0"), /* D12 */
|
|
SUNXI_FUNCTION(0x3, "lcd0"), /* D18 */
|
|
SUNXI_FUNCTION(0x7, "io_disabled")),
|
|
SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 17),
|
|
SUNXI_FUNCTION(0x0, "gpio_in"),
|
|
SUNXI_FUNCTION(0x1, "gpio_out"),
|
|
SUNXI_FUNCTION(0x2, "csi0"), /* D13 */
|
|
SUNXI_FUNCTION(0x3, "lcd0"), /* D19 */
|
|
SUNXI_FUNCTION(0x7, "io_disabled")),
|
|
SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 18),
|
|
SUNXI_FUNCTION(0x0, "gpio_in"),
|
|
SUNXI_FUNCTION(0x1, "gpio_out"),
|
|
SUNXI_FUNCTION(0x2, "csi0"), /* D14 */
|
|
SUNXI_FUNCTION(0x3, "lcd0"), /* D20 */
|
|
SUNXI_FUNCTION(0x7, "io_disabled")),
|
|
SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 19),
|
|
SUNXI_FUNCTION(0x0, "gpio_in"),
|
|
SUNXI_FUNCTION(0x1, "gpio_out"),
|
|
SUNXI_FUNCTION(0x2, "csi0"), /* D15 */
|
|
SUNXI_FUNCTION(0x3, "lcd0"), /* D21 */
|
|
SUNXI_FUNCTION(0x7, "io_disabled")),
|
|
SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 20),
|
|
SUNXI_FUNCTION(0x0, "gpio_in"),
|
|
SUNXI_FUNCTION(0x1, "gpio_out"),
|
|
SUNXI_FUNCTION(0x2, "csi0"), /* FIELD */
|
|
SUNXI_FUNCTION(0x3, "csi0"), /* MIPI_MCLK */
|
|
SUNXI_FUNCTION(0x7, "io_disabled")),
|
|
SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 21),
|
|
SUNXI_FUNCTION(0x0, "gpio_in"),
|
|
SUNXI_FUNCTION(0x1, "gpio_out"),
|
|
SUNXI_FUNCTION(0x2, "csi1"), /* SCK */
|
|
SUNXI_FUNCTION(0x3, "twi1"), /* SCK */
|
|
SUNXI_FUNCTION(0x4, "uart1"), /* TX */
|
|
SUNXI_FUNCTION(0x7, "io_disabled")),
|
|
SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 22),
|
|
SUNXI_FUNCTION(0x0, "gpio_in"),
|
|
SUNXI_FUNCTION(0x1, "gpio_out"),
|
|
SUNXI_FUNCTION(0x2, "csi1"), /* SDA */
|
|
SUNXI_FUNCTION(0x3, "twi1"), /* SDA */
|
|
SUNXI_FUNCTION(0x4, "uart1"), /* RX */
|
|
SUNXI_FUNCTION(0x7, "io_disabled")),
|
|
SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 23),
|
|
SUNXI_FUNCTION(0x0, "gpio_in"),
|
|
SUNXI_FUNCTION(0x1, "gpio_out"),
|
|
SUNXI_FUNCTION(0x3, "lcd0"), /* D22 */
|
|
SUNXI_FUNCTION(0x4, "uart1"), /* RTS */
|
|
SUNXI_FUNCTION(0x7, "io_disabled")),
|
|
SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 24),
|
|
SUNXI_FUNCTION(0x0, "gpio_in"),
|
|
SUNXI_FUNCTION(0x1, "gpio_out"),
|
|
SUNXI_FUNCTION(0x3, "lcd0"), /* D23 */
|
|
SUNXI_FUNCTION(0x4, "uart1"), /* CTS */
|
|
SUNXI_FUNCTION(0x7, "io_disabled")),
|
|
|
|
/* HOLE */
|
|
SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 0),
|
|
SUNXI_FUNCTION(0x0, "gpio_in"),
|
|
SUNXI_FUNCTION(0x1, "gpio_out"),
|
|
SUNXI_FUNCTION(0x2, "sdc0"), /* D1 */
|
|
SUNXI_FUNCTION(0x3, "jtag0"), /* MSI */
|
|
SUNXI_FUNCTION(0x7, "io_disabled")),
|
|
SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 1),
|
|
SUNXI_FUNCTION(0x0, "gpio_in"),
|
|
SUNXI_FUNCTION(0x1, "gpio_out"),
|
|
SUNXI_FUNCTION(0x2, "sdc0"), /* D0 */
|
|
SUNXI_FUNCTION(0x3, "jtag0"), /* DI1 */
|
|
SUNXI_FUNCTION(0x7, "io_disabled")),
|
|
SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 2),
|
|
SUNXI_FUNCTION(0x0, "gpio_in"),
|
|
SUNXI_FUNCTION(0x1, "gpio_out"),
|
|
SUNXI_FUNCTION(0x2, "sdc0"), /* CLK */
|
|
SUNXI_FUNCTION(0x3, "uart0"), /* TX */
|
|
SUNXI_FUNCTION(0x7, "io_disabled")),
|
|
SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 3),
|
|
SUNXI_FUNCTION(0x0, "gpio_in"),
|
|
SUNXI_FUNCTION(0x1, "gpio_out"),
|
|
SUNXI_FUNCTION(0x2, "sdc0"), /* CMD */
|
|
SUNXI_FUNCTION(0x3, "jtag0"), /* DO1 */
|
|
SUNXI_FUNCTION(0x7, "io_disabled")),
|
|
SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 4),
|
|
SUNXI_FUNCTION(0x0, "gpio_in"),
|
|
SUNXI_FUNCTION(0x1, "gpio_out"),
|
|
SUNXI_FUNCTION(0x2, "sdc0"), /* D3 */
|
|
SUNXI_FUNCTION(0x3, "uart0"), /* RX */
|
|
SUNXI_FUNCTION(0x7, "io_disabled")),
|
|
SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 5),
|
|
SUNXI_FUNCTION(0x0, "gpio_in"),
|
|
SUNXI_FUNCTION(0x1, "gpio_out"),
|
|
SUNXI_FUNCTION(0x2, "sdc0"), /* D2 */
|
|
SUNXI_FUNCTION(0x3, "jtag0"), /* CK1 */
|
|
SUNXI_FUNCTION(0x7, "io_disabled")),
|
|
SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 6),
|
|
SUNXI_FUNCTION(0x0, "gpio_in"),
|
|
SUNXI_FUNCTION(0x1, "gpio_out"),
|
|
SUNXI_FUNCTION(0x7, "io_disabled")),
|
|
/* HOLE */
|
|
SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 0),
|
|
SUNXI_FUNCTION(0x0, "gpio_in"),
|
|
SUNXI_FUNCTION(0x1, "gpio_out"),
|
|
SUNXI_FUNCTION(0x2, "sdc1"), /* CLK */
|
|
SUNXI_FUNCTION(0x7, "io_disabled"),
|
|
SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 0)),
|
|
SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 1),
|
|
SUNXI_FUNCTION(0x0, "gpio_in"),
|
|
SUNXI_FUNCTION(0x1, "gpio_out"),
|
|
SUNXI_FUNCTION(0x2, "sdc1"), /* CMD */
|
|
SUNXI_FUNCTION(0x7, "io_disabled"),
|
|
SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 1)),
|
|
SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 2),
|
|
SUNXI_FUNCTION(0x0, "gpio_in"),
|
|
SUNXI_FUNCTION(0x1, "gpio_out"),
|
|
SUNXI_FUNCTION(0x2, "sdc1"), /* D0 */
|
|
SUNXI_FUNCTION(0x7, "io_disabled"),
|
|
SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 2)),
|
|
SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 3),
|
|
SUNXI_FUNCTION(0x0, "gpio_in"),
|
|
SUNXI_FUNCTION(0x1, "gpio_out"),
|
|
SUNXI_FUNCTION(0x2, "sdc1"), /* D1 */
|
|
SUNXI_FUNCTION(0x7, "io_disabled"),
|
|
SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 3)),
|
|
SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 4),
|
|
SUNXI_FUNCTION(0x0, "gpio_in"),
|
|
SUNXI_FUNCTION(0x1, "gpio_out"),
|
|
SUNXI_FUNCTION(0x2, "sdc1"), /* D2 */
|
|
SUNXI_FUNCTION(0x7, "io_disabled"),
|
|
SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 4)),
|
|
SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 5),
|
|
SUNXI_FUNCTION(0x0, "gpio_in"),
|
|
SUNXI_FUNCTION(0x1, "gpio_out"),
|
|
SUNXI_FUNCTION(0x2, "sdc1"), /* D3 */
|
|
SUNXI_FUNCTION(0x7, "io_disabled"),
|
|
SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 5)),
|
|
SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 6),
|
|
SUNXI_FUNCTION(0x0, "gpio_in"),
|
|
SUNXI_FUNCTION(0x1, "gpio_out"),
|
|
SUNXI_FUNCTION(0x2, "uart1"), /* TX */
|
|
SUNXI_FUNCTION(0x7, "io_disabled"),
|
|
SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 6)),
|
|
SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 7),
|
|
SUNXI_FUNCTION(0x0, "gpio_in"),
|
|
SUNXI_FUNCTION(0x1, "gpio_out"),
|
|
SUNXI_FUNCTION(0x2, "uart1"), /* RX */
|
|
SUNXI_FUNCTION(0x7, "io_disabled"),
|
|
SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 7)),
|
|
SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 8),
|
|
SUNXI_FUNCTION(0x0, "gpio_in"),
|
|
SUNXI_FUNCTION(0x1, "gpio_out"),
|
|
SUNXI_FUNCTION(0x2, "uart1"), /* RX */
|
|
SUNXI_FUNCTION(0x7, "io_disabled"),
|
|
SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 8)),
|
|
SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 9),
|
|
SUNXI_FUNCTION(0x0, "gpio_in"),
|
|
SUNXI_FUNCTION(0x1, "gpio_out"),
|
|
SUNXI_FUNCTION(0x2, "uart1"), /* RTS */
|
|
SUNXI_FUNCTION(0x7, "io_disabled"),
|
|
SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 9)),
|
|
SUNXI_PIN(SUNXI_PINCTRL_PIN(G,10),
|
|
SUNXI_FUNCTION(0x0, "gpio_in"),
|
|
SUNXI_FUNCTION(0x1, "gpio_out"),
|
|
SUNXI_FUNCTION(0x2, "tdm0"), /* SYNC */
|
|
SUNXI_FUNCTION(0x7, "io_disabled"),
|
|
SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 10)),
|
|
SUNXI_PIN(SUNXI_PINCTRL_PIN(G,11),
|
|
SUNXI_FUNCTION(0x0, "gpio_in"),
|
|
SUNXI_FUNCTION(0x1, "gpio_out"),
|
|
SUNXI_FUNCTION(0x2, "tdm0"), /* BCLK */
|
|
SUNXI_FUNCTION(0x7, "io_disabled"),
|
|
SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 11)),
|
|
SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 12),
|
|
SUNXI_FUNCTION(0x0, "gpio_in"),
|
|
SUNXI_FUNCTION(0x1, "gpio_out"),
|
|
SUNXI_FUNCTION(0x2, "tdm0"), /* DOUT */
|
|
SUNXI_FUNCTION(0x7, "io_disabled"),
|
|
SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 12)),
|
|
SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 13),
|
|
SUNXI_FUNCTION(0x0, "gpio_in"),
|
|
SUNXI_FUNCTION(0x1, "gpio_out"),
|
|
SUNXI_FUNCTION(0x2, "tdm0"), /* DIN */
|
|
SUNXI_FUNCTION(0x7, "io_disabled"),
|
|
SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 13)),
|
|
};
|
|
static const unsigned sun8iw8p1_irq_bank_base[] = {
|
|
SUNXI_PIO_BANK_BASE(PB_BASE, 0),
|
|
SUNXI_PIO_BANK_BASE(PG_BASE, 1),
|
|
};
|
|
static const struct sunxi_pinctrl_desc sun8iw8p1_pinctrl_data = {
|
|
.pins = sun8iw8p1_pins,
|
|
.npins = ARRAY_SIZE(sun8iw8p1_pins),
|
|
.pin_base = 0,
|
|
.irq_banks = 2,
|
|
.irq_bank_base = sun8iw8p1_irq_bank_base,
|
|
};
|
|
|
|
static int sun8iw8p1_pinctrl_probe(struct platform_device *pdev)
|
|
{
|
|
return sunxi_pinctrl_init(pdev,
|
|
&sun8iw8p1_pinctrl_data);
|
|
}
|
|
|
|
static struct of_device_id sun8iw8p1_pinctrl_match[] = {
|
|
{ .compatible = "allwinner,sun8iw8p1-pinctrl", },
|
|
{}
|
|
};
|
|
MODULE_DEVICE_TABLE(of, sun8iw8p1_pinctrl_match);
|
|
|
|
static struct platform_driver sun8iw8p1_pinctrl_driver = {
|
|
.probe = sun8iw8p1_pinctrl_probe,
|
|
.driver = {
|
|
.name = SUNXI_PINCTRL_NAME,
|
|
.owner = THIS_MODULE,
|
|
.of_match_table = sun8iw8p1_pinctrl_match,
|
|
},
|
|
};
|
|
static int __init sun8iw8p1_pio_init(void)
|
|
{
|
|
int ret;
|
|
ret = platform_driver_register(&sun8iw8p1_pinctrl_driver);
|
|
if (IS_ERR_VALUE(ret)) {
|
|
pr_debug("register sun8iw8p1 pio controller failed\n");
|
|
return -EINVAL;
|
|
}
|
|
return 0;
|
|
}
|
|
postcore_initcall(sun8iw8p1_pio_init);
|
|
|
|
MODULE_AUTHOR("czy <chenzunyin@allwinnertech.com>");
|
|
MODULE_AUTHOR("Jackie Hwang <huangshr@allwinnertech.com>");
|
|
MODULE_AUTHOR("Chen-Yu Tsai <wens@csie.org>");
|
|
MODULE_AUTHOR("Boris Brezillon <boris.brezillon@free-electrons.com");
|
|
MODULE_AUTHOR("Maxime Ripard <maxime.ripard@free-electrons.com");
|
|
MODULE_DESCRIPTION("Allwinner sun8iw8p1 PIO pinctrl driver");
|
|
MODULE_LICENSE("GPL");
|