336 lines
12 KiB
C
336 lines
12 KiB
C
/*
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* Copyright (c) 2013, ARM Limited and Contributors. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* Redistributions of source code must retain the above copyright notice, this
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* list of conditions and the following disclaimer.
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*
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* Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* Neither the name of ARM nor the names of its contributors may be used
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* to endorse or promote products derived from this software without specific
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* prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <assert.h>
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#include <arch_helpers.h>
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#include <debug.h>
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#include <errno.h>
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#include <platform.h>
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#include <platform_def.h>
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#include <psci.h>
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#include <mmio.h>
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#include <bakery_lock.h>
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#include "sunxi_def.h"
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#include "sunxi_private.h"
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#include "scpi.h"
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#include "sunxi_cpu_ops.h"
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#include <arisc.h>
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#include <cci400.h>
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#include <console.h>
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#include <psci.h>
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bakery_lock_t plat_console_lock __attribute__ ((section("tzfw_coherent_mem")));
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/*******************************************************************************
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* Private Sunxi function to program the mailbox for a cpu before it is released
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* from reset.
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******************************************************************************/
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/*******************************************************************************
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* Private Sunxi function which is used to determine if any platform actions
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* should be performed for the specified affinity instance given its
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* state. Nothing needs to be done if the 'state' is not off or if this is not
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* the highest affinity level which will enter the 'state'.
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******************************************************************************/
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static int32_t sunxi_do_plat_actions(uint32_t afflvl, uint32_t state)
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{
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uint32_t max_phys_off_afflvl;
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assert(afflvl <= MPIDR_MAX_AFFLVL);
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if (state != PSCI_STATE_OFF)
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return -EAGAIN;
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/*
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* Find the highest affinity level which will be suspended and postpone
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* all the platform specific actions until that level is hit.
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*/
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max_phys_off_afflvl = psci_get_max_phys_off_afflvl();
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assert(max_phys_off_afflvl != PSCI_INVALID_DATA);
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assert(psci_get_suspend_afflvl() >= max_phys_off_afflvl);
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if (afflvl != max_phys_off_afflvl)
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return -EAGAIN;
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return 0;
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}
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/*******************************************************************************
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* Sunxi handler called when an affinity instance is about to be turned on. The
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* level and mpidr determine the affinity instance.
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******************************************************************************/
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int32_t sunxi_affinst_on(uint64_t mpidr,
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uint64_t sec_entrypoint,
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uint64_t ns_entrypoint,
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uint32_t afflvl,
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uint32_t state)
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{
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/*
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* SCP takes care of powering up higher affinity levels so we
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* only need to care about level 0
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*/
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if (afflvl != MPIDR_AFFLVL0)
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return PSCI_E_SUCCESS;
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//INFO("mpidr:0x%llx, sec_entrypoint:0x%lx, ns_entrypoint:0x%lx, afflvl:0x%x, state:0x%x\n",
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//mpidr, sec_entrypoint, ns_entrypoint, afflvl, state);
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arisc_cpu_op(mpidr&0xff, sec_entrypoint, arisc_power_on, arisc_power_on);
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return PSCI_E_SUCCESS;
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}
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/*******************************************************************************
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* Sunxi handler called when an affinity instance has just been powered on after
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* being turned off earlier. The level and mpidr determine the affinity
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* instance. The 'state' arg. allows the platform to decide whether the cluster
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* was turned off prior to wakeup and do what's necessary to setup it up
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* correctly.
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******************************************************************************/
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int32_t sunxi_affinst_on_finish(uint64_t mpidr, uint32_t afflvl, uint32_t state)
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{
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/* Determine if any platform actions need to be executed. */
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if (sunxi_do_plat_actions(afflvl, state) == -EAGAIN)
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return PSCI_E_SUCCESS;
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/*
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* Perform the common cluster specific operations i.e enable coherency
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* if this cluster was off.
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*/
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if (afflvl != MPIDR_AFFLVL0)
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{
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//cci_enable_cluster_coherency(mpidr);
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}
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// set smp bit before cache enable
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platform_smp_init();
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/* Enable the gic cpu interface */
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gic_cpuif_setup(GICC_BASE);
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/* Sunxi todo: Is this setup only needed after a cold boot? */
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gic_pcpu_distif_setup(GICD_BASE);
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return PSCI_E_SUCCESS;
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}
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/*******************************************************************************
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* sunxi handler called when an affinity instance is about to enter standby.
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******************************************************************************/
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int sunxi_affinst_standby(unsigned int power_state)
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{
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unsigned int target_afflvl;
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uint64_t scr = 0;
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/* Sanity check the requested state */
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target_afflvl = psci_get_pstate_afflvl(power_state);
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/*
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* * It's possible to enter standby only on affinity level 0 i.e. a cpu
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* * on the FVP. Ignore any other affinity level.
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* */
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if (target_afflvl != MPIDR_AFFLVL0)
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return PSCI_E_INVALID_PARAMS;
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scr = read_scr_el3();
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/* enable physical IRQ bit for NS world to wakeup the CPU */
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write_scr_el3(scr | SCR_IRQ_BIT);
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isb();
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/*
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* * Enter standby state
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* * dsb is good practice before using wfi to enter low power states
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* */
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dsb();
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wfi();
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/*
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* * Restore SCR to the original value, sync of scr_el3 is done
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* * by eret while el3_exit to save some execution cycles.
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* * */
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write_scr_el3(scr);
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return PSCI_E_SUCCESS;
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}
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/*******************************************************************************
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* Common function called while turning a cpu off or suspending it. It is called
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* from sunxi_off() or sunxi_suspend() when these functions in turn are called for
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* the highest affinity level which will be powered down. It performs the
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* actions common to the OFF and SUSPEND calls.
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******************************************************************************/
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static int32_t sunxi_power_down_common(uint32_t afflvl, uint64_t mpidr, uint64_t sec_entrypoint)
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{
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uint32_t cluster_state = arisc_power_on;
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/* Prevent interrupts from spuriously waking up this cpu */
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gic_cpuif_deactivate(GICC_BASE);
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/* Cluster is to be turned off, so disable coherency */
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if (afflvl > MPIDR_AFFLVL0) {
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//cci_disable_cluster_coherency(read_mpidr_el1());
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cluster_state = arisc_power_off;
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}
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//INFO("afflvl:0x%x, mpidr:0x%lx, sec_entrypoint: %lx\n",
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//afflvl, mpidr, sec_entrypoint);
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arisc_cpu_op(mpidr&0xff, sec_entrypoint, scpi_power_off, cluster_state);
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return PSCI_E_SUCCESS;
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}
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/*******************************************************************************
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* Handler called when an affinity instance is about to be turned off. The
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* level and mpidr determine the affinity instance. The 'state' arg. allows the
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* platform to decide whether the cluster is being turned off and take
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* appropriate actions.
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*
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* CAUTION: There is no guarantee that caches will remain turned on across calls
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* to this function as each affinity level is dealt with. So do not write & read
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* global variables across calls. It will be wise to do flush a write to the
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* global to prevent unpredictable results.
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******************************************************************************/
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static int32_t sunxi_affinst_off(uint64_t mpidr, uint32_t afflvl, uint32_t state)
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{
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/* Determine if any platform actions need to be executed */
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if (sunxi_do_plat_actions(afflvl, state) == -EAGAIN)
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return PSCI_E_SUCCESS;
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return sunxi_power_down_common(afflvl, mpidr, 0);
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}
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/*******************************************************************************
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* Handler called when an affinity instance is about to be suspended. The
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* level and mpidr determine the affinity instance. The 'state' arg. allows the
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* platform to decide whether the cluster is being turned off and take apt
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* actions. The 'sec_entrypoint' determines the address in BL3-1 from where
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* execution should resume.
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*
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* CAUTION: There is no guarantee that caches will remain turned on across calls
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* to this function as each affinity level is dealt with. So do not write & read
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* global variables across calls. It will be wise to do flush a write to the
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* global to prevent unpredictable results.
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******************************************************************************/
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static int32_t sunxi_affinst_suspend(uint64_t mpidr,
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uint64_t sec_entrypoint,
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uint64_t ns_entrypoint,
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uint32_t afflvl,
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uint32_t state)
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{
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/* Determine if any platform actions need to be executed */
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if (sunxi_do_plat_actions(afflvl, state) == -EAGAIN)
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return PSCI_E_SUCCESS;
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if (afflvl == psci_get_suspend_afflvl())
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console_exit();
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return sunxi_power_down_common(afflvl, mpidr, sec_entrypoint);
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}
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/*******************************************************************************
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* Sunxi handler called when an affinity instance has just been powered on after
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* having been suspended earlier. The level and mpidr determine the affinity
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* instance.
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* TODO: At the moment we reuse the on finisher and reinitialize the secure
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* context. Need to implement a separate suspend finisher.
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******************************************************************************/
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static int32_t sunxi_affinst_suspend_finish(uint64_t mpidr,
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uint32_t afflvl,
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uint32_t state)
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{
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if ((afflvl == psci_get_suspend_afflvl()) && ((mpidr & 0xff) == 0x0)) {
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gic_setup();
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console_init(SUNXI_UART0_BASE, UART0_CLK_IN_HZ, UART0_BAUDRATE);
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arisc_cpux_ready_notify();
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}
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return sunxi_affinst_on_finish(mpidr, afflvl, state);
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}
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/*******************************************************************************
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* Sunxi handlers to shutdown/reboot the system
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******************************************************************************/
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static void __dead2 sunxi_system_off(void)
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{
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uint32_t response;
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/* Send the power down request to the SCP */
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response = arisc_system_op(arisc_system_shutdown);
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if (response != SCP_OK) {
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ERROR("Sunxi System Off: SCP error %u.\n", response);
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panic();
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}
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wfi();
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ERROR("Sunxi System Off: operation not handled.\n");
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panic();
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}
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static void __dead2 sunxi_system_reset(void)
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{
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uint32_t response;
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/* Send the system reset request to the SCP */
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response = arisc_system_op(scpi_system_reboot);
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if (response != SCP_OK) {
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ERROR("Sunxi System Reset: SCP error %u.\n", response);
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panic();
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}
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wfi();
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ERROR("Sunxi System Reset: operation not handled.\n");
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panic();
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}
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/*******************************************************************************
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* Export the platform handlers to enable psci to invoke them
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******************************************************************************/
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static const plat_pm_ops_t sunxi_ops = {
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.affinst_standby = sunxi_affinst_standby,
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.affinst_on = sunxi_affinst_on,
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.affinst_on_finish = sunxi_affinst_on_finish,
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.affinst_off = sunxi_affinst_off,
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.affinst_suspend = sunxi_affinst_suspend,
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.affinst_suspend_finish = sunxi_affinst_suspend_finish,
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.system_off = sunxi_system_off,
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.system_reset = sunxi_system_reset
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};
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/*******************************************************************************
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* Export the platform specific power ops.
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******************************************************************************/
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int32_t platform_setup_pm(const plat_pm_ops_t **plat_ops)
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{
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*plat_ops = &sunxi_ops;
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bakery_lock_init(&plat_console_lock);
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return 0;
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}
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