/* * Allwinner Technology CO., Ltd. sun50iw1p1 perf1 sata board. */ /dts-v1/; /memreserve/ 0x58000000 0x08000000; /* ion carvout heap revserve : [0x18000000~0x20000000], size = 128M */ #include "sun50iw1p1.dtsi" /{ soc@01c00000 { twi0: twi@0x01c2ac00{ status = "okay"; }; twi1: twi@0x01c2b000{ status = "okay"; }; }; gpu_mali400_0: gpu@0x01c40000 { compatible = "arm,mali-400", "arm,mali-utgard"; reg = <0x0 0x01c40000 0x0 0x10000>; interrupts = , , , , , ; interrupt-names = "IRQGP", "IRQGPMMU", "IRQPP0", "IRQPPMMU0", "IRQPP1", "IRQPPMMU1"; clocks = <&clk_pll_gpu>, <&clk_gpu>; }; wlan:wlan { compatible = "allwinner,sunxi-wlan"; clocks = <&clk_losc_out>; wlan_power = "vcc-wifi"; wlan_io_regulator = "vcc-wifi-io"; wlan_busnum = <1>; wlan_regon = <&r_pio PL 2 1 1 1 0>; wlan_hostwake = <&r_pio PL 3 6 0 0 0>; status = "okay"; }; bt:bt { compatible = "allwinner,sunxi-bt"; clocks = <&clk_losc_out>; bt_power = "vcc-wifi"; bt_io_regulator = "vcc-wifi-io"; bt_rst_n = <&r_pio PL 4 1 1 1 0>; status = "okay"; }; btlpm:btlpm { compatible = "allwinner,sunxi-btlpm"; uart_index = <1>; bt_wake = <&r_pio PL 6 1 1 1 1>; bt_hostwake = <&r_pio PL 5 6 0 0 0>; status = "okay"; }; };