/* * Allwinner sun50iw6p1 SoCs pinctrl driver. * * Copyright(c) 2012-2016 Allwinnertech Co., Ltd. * Author: WimHuang * * This file is licensed under the terms of the GNU General Public * License version 2. This program is licensed "as is" without any * warranty of any kind, whether express or implied. */ #include #include #include #include #include #include "pinctrl-sunxi.h" static const struct sunxi_desc_pin sun50iw6p1_pins[] = { SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 0), SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), SUNXI_FUNCTION(0x2, "gmac0"), /* RXD1 */ SUNXI_FUNCTION(0x7, "io_disabled")), SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 1), SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), SUNXI_FUNCTION(0x2, "gmac0"), /* RXD0 */ SUNXI_FUNCTION(0x7, "io_disabled")), SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 2), SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), SUNXI_FUNCTION(0x2, "gmac0"), /* CRTS_DV */ SUNXI_FUNCTION(0x7, "io_disabled")), SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 3), SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), SUNXI_FUNCTION(0x2, "gmac0"), /* RXER */ SUNXI_FUNCTION(0x7, "io_disabled")), SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 4), SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), SUNXI_FUNCTION(0x2, "gmac0"), /* TXD1*/ SUNXI_FUNCTION(0x7, "io_disabled")), SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 5), SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), SUNXI_FUNCTION(0x2, "gmac0"), /* TXD0 */ SUNXI_FUNCTION(0x7, "io_disabled")), SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 6), SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), SUNXI_FUNCTION(0x2, "gmac0"), /* TXCK */ SUNXI_FUNCTION(0x7, "io_disabled")), SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 7), SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), SUNXI_FUNCTION(0x2, "gmac0"), /* TXEN */ SUNXI_FUNCTION(0x7, "io_disabled")), SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 8), SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), SUNXI_FUNCTION(0x2, "gmac0"), /* MDC */ SUNXI_FUNCTION(0x7, "io_disabled")), SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 9), SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), SUNXI_FUNCTION(0x2, "gmac0"), /* MDIO */ SUNXI_FUNCTION(0x7, "io_disabled")), /* HOLE */ SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 0), SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), SUNXI_FUNCTION(0x2, "ac200"), /* CLK */ SUNXI_FUNCTION(0x7, "io_disabled"), SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 0)), SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 1), SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), SUNXI_FUNCTION(0x2, "ac200"), /* DE */ SUNXI_FUNCTION(0x7, "io_disabled"), SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 1)), SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 2), SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), SUNXI_FUNCTION(0x2, "ac200"), /* HSYNC */ SUNXI_FUNCTION(0x7, "io_disabled"), SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 2)), SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 3), SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), SUNXI_FUNCTION(0x2, "ac200"), /* VSYNC */ SUNXI_FUNCTION(0x7, "io_disabled"), SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 3)), SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 4), SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), SUNXI_FUNCTION(0x2, "ac200"), /* DO0 */ SUNXI_FUNCTION(0x7, "io_disabled"), SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 4)), SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 5), SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), SUNXI_FUNCTION(0x2, "ac200"), /* DO1 */ SUNXI_FUNCTION(0x7, "io_disabled"), SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 5)), SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 6), SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), SUNXI_FUNCTION(0x2, "ac200"), /* DO2 */ SUNXI_FUNCTION(0x7, "io_disabled"), SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 6)), SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 7), SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), SUNXI_FUNCTION(0x2, "ac200"), /* DO3 */ SUNXI_FUNCTION(0x7, "io_disabled"), SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 7)), SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 8), SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), SUNXI_FUNCTION(0x2, "ac200"), /* DO4 */ SUNXI_FUNCTION(0x7, "io_disabled"), SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 8)), SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 9), SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), SUNXI_FUNCTION(0x2, "ac200"), /* DO5 */ SUNXI_FUNCTION(0x7, "io_disabled"), SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 9)), SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 10), SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), SUNXI_FUNCTION(0x2, "ac200"), /* DO6 */ SUNXI_FUNCTION(0x7, "io_disabled"), SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 10)), SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 11), SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), SUNXI_FUNCTION(0x2, "ac200"), /* DO7 */ SUNXI_FUNCTION(0x7, "io_disabled"), SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 11)), SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 12), SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), SUNXI_FUNCTION(0x2, "pcm3"), /* SYNC */ SUNXI_FUNCTION(0x4, "h_pcm3"), /* SYNC */ SUNXI_FUNCTION(0x7, "io_disabled"), SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 12)), SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 13), SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), SUNXI_FUNCTION(0x2, "pcm3"), /* CLK */ SUNXI_FUNCTION(0x4, "h_pcm3"), /* CLK */ SUNXI_FUNCTION(0x7, "io_disabled"), SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 13)), SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 14), SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), SUNXI_FUNCTION(0x2, "pcm3"), /* DOUT */ SUNXI_FUNCTION(0x4, "h_pcm3"), /* DOUT */ SUNXI_FUNCTION(0x7, "io_disabled"), SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 14)), SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 15), SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), SUNXI_FUNCTION(0x2, "pcm3"), /* DIN */ SUNXI_FUNCTION(0x4, "h_pcm3"), /* DIN */ SUNXI_FUNCTION(0x7, "io_disabled"), SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 15)), SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 16), SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), SUNXI_FUNCTION(0x2, "pcm3"), /* MCLK */ SUNXI_FUNCTION(0x4, "h_pcm3"), /* MCLK */ SUNXI_FUNCTION(0x7, "io_disabled"), SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 16)), SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 17), SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), SUNXI_FUNCTION(0x2, "twi3"), /* SCK */ SUNXI_FUNCTION(0x7, "io_disabled"), SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 17)), SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 18), SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), SUNXI_FUNCTION(0x2, "twi3"), /* SDA */ SUNXI_FUNCTION(0x7, "io_disabled"), SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 18)), SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 19), SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), SUNXI_FUNCTION(0x2, "pwm1"), /* PMW1 */ SUNXI_FUNCTION(0x7, "io_disabled"), SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 19)), SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 20), SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), SUNXI_FUNCTION(0x7, "io_disabled"), SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 20)), /* HOLE */ SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 0), SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), SUNXI_FUNCTION(0x2, "nand0"), /* WE */ SUNXI_FUNCTION(0x4, "spi0"), /* CLK */ SUNXI_FUNCTION(0x7, "io_disabled")), SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 1), SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), SUNXI_FUNCTION(0x2, "nand0"), /* ALE */ SUNXI_FUNCTION(0x3, "sdc2"), /* DS */ SUNXI_FUNCTION(0x7, "io_disabled")), SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 2), SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), SUNXI_FUNCTION(0x2, "nand0"), /* CLE */ SUNXI_FUNCTION(0x4, "spi0"), /* MOSI */ SUNXI_FUNCTION(0x7, "io_disabled")), SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 3), SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), SUNXI_FUNCTION(0x2, "nand0"), /* CE0 */ SUNXI_FUNCTION(0x4, "spi0"), /* MISO */ SUNXI_FUNCTION(0x7, "io_disabled")), SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 4), SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), SUNXI_FUNCTION(0x2, "nand0"), /* RE */ SUNXI_FUNCTION(0x3, "sdc2"), /* CLK */ SUNXI_FUNCTION(0x7, "io_disabled")), SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 5), SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), SUNXI_FUNCTION(0x2, "nand0"), /* RB0 */ SUNXI_FUNCTION(0x3, "sdc2"), /* CMD */ SUNXI_FUNCTION(0x4, "spi0"), /* CS */ SUNXI_FUNCTION(0x7, "io_disabled")), SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 6), SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), SUNXI_FUNCTION(0x2, "nand0"), /* DQ0 */ SUNXI_FUNCTION(0x3, "sdc2"), /* D0 */ SUNXI_FUNCTION(0x4, "spi0"), /* HOLD */ SUNXI_FUNCTION(0x7, "io_disabled")), SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 7), SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), SUNXI_FUNCTION(0x2, "nand0"), /* DQ1 */ SUNXI_FUNCTION(0x3, "sdc2"), /* D1 */ SUNXI_FUNCTION(0x4, "spi0"), /* WP */ SUNXI_FUNCTION(0x7, "io_disabled")), SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 8), SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), SUNXI_FUNCTION(0x2, "nand0"), /* DQ2 */ SUNXI_FUNCTION(0x3, "sdc2"), /* D2 */ SUNXI_FUNCTION(0x7, "io_disabled")), SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 9), SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), SUNXI_FUNCTION(0x2, "nand0"), /* DQ3 */ SUNXI_FUNCTION(0x3, "sdc2"), /* D3 */ SUNXI_FUNCTION(0x7, "io_disabled")), SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 10), SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), SUNXI_FUNCTION(0x2, "nand0"), /* DQ4 */ SUNXI_FUNCTION(0x3, "sdc2"), /* D4 */ SUNXI_FUNCTION(0x7, "io_disabled")), SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 11), SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), SUNXI_FUNCTION(0x2, "nand0"), /* DQ5 */ SUNXI_FUNCTION(0x3, "sdc2"), /* D5 */ SUNXI_FUNCTION(0x7, "io_disabled")), SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 12), SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), SUNXI_FUNCTION(0x2, "nand0"), /* DQ6 */ SUNXI_FUNCTION(0x3, "sdc2"), /* D6 */ SUNXI_FUNCTION(0x7, "io_disabled")), SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 13), SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), SUNXI_FUNCTION(0x2, "nand0"), /* DQ7 */ SUNXI_FUNCTION(0x3, "sdc2"), /* D7 */ SUNXI_FUNCTION(0x7, "io_disabled")), SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 14), SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), SUNXI_FUNCTION(0x2, "nand0"), /* DQS */ SUNXI_FUNCTION(0x3, "sdc2"), /* RST */ SUNXI_FUNCTION(0x7, "io_disabled")), SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 15), SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), SUNXI_FUNCTION(0x2, "nand0"), /* CE1 */ SUNXI_FUNCTION(0x7, "io_disabled")), SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 16), SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), SUNXI_FUNCTION(0x2, "nand0"), /* RB1 */ SUNXI_FUNCTION(0x7, "io_disabled")), /* HOLE */ SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 0), SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), SUNXI_FUNCTION(0x2, "lcd0"), /* D2 */ SUNXI_FUNCTION(0x3, "ts0"), /* CLK */ SUNXI_FUNCTION(0x4, "csi0"), /* PCLK */ SUNXI_FUNCTION(0x5, "gmac0"), /* RXD3 */ SUNXI_FUNCTION(0x7, "io_disabled")), SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 1), SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), SUNXI_FUNCTION(0x2, "lcd0"), /* D3 */ SUNXI_FUNCTION(0x3, "ts0"), /* CLK */ SUNXI_FUNCTION(0x4, "csi0"), /* MCLK */ SUNXI_FUNCTION(0x5, "gmac0"), /* RXD2 */ SUNXI_FUNCTION(0x7, "io_disabled")), SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 2), SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), SUNXI_FUNCTION(0x2, "lcd0"), /* D4 */ SUNXI_FUNCTION(0x3, "ts0"), /* SYNC */ SUNXI_FUNCTION(0x4, "csi0"), /* HSYNC */ SUNXI_FUNCTION(0x5, "gmac0"), /* RXD1 */ SUNXI_FUNCTION(0x7, "io_disabled")), SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 3), SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), SUNXI_FUNCTION(0x2, "lcd0"), /* D5 */ SUNXI_FUNCTION(0x3, "ts0"), /* DVLD */ SUNXI_FUNCTION(0x4, "csi0"), /* VSYNC */ SUNXI_FUNCTION(0x5, "gmac0"), /* RXD0 */ SUNXI_FUNCTION(0x7, "io_disabled")), SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 4), SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), SUNXI_FUNCTION(0x2, "lcd0"), /* D6 */ SUNXI_FUNCTION(0x3, "ts0"), /* D0 */ SUNXI_FUNCTION(0x4, "csi0"), /* D0 */ SUNXI_FUNCTION(0x5, "gmac0"), /* RXCK */ SUNXI_FUNCTION(0x7, "io_disabled")), SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 5), SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), SUNXI_FUNCTION(0x2, "lcd0"), /* D7 */ SUNXI_FUNCTION(0x3, "ts0"), /* D1 */ SUNXI_FUNCTION(0x4, "csi0"), /* D1 */ SUNXI_FUNCTION(0x5, "gmac0"), /* RXCTL */ SUNXI_FUNCTION(0x7, "io_disabled")), SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 6), SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), SUNXI_FUNCTION(0x2, "lcd0"), /* D10 */ SUNXI_FUNCTION(0x3, "ts0"), /* D2 */ SUNXI_FUNCTION(0x4, "csi0"), /* D2 */ SUNXI_FUNCTION(0x5, "gmac0"), /* NULL */ SUNXI_FUNCTION(0x7, "io_disabled")), SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 7), SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), SUNXI_FUNCTION(0x2, "lcd0"), /* D11 */ SUNXI_FUNCTION(0x3, "ts0"), /* D3 */ SUNXI_FUNCTION(0x4, "csi0"), /* D3 */ SUNXI_FUNCTION(0x5, "gmac0"), /* TXD3 */ SUNXI_FUNCTION(0x7, "io_disabled")), SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 8), SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), SUNXI_FUNCTION(0x2, "lcd0"), /* D10 */ SUNXI_FUNCTION(0x3, "ts0"), /* D4 */ SUNXI_FUNCTION(0x4, "csi0"), /* D12 */ SUNXI_FUNCTION(0x5, "gmac0"), /* TXD2 */ SUNXI_FUNCTION(0x7, "io_disabled")), SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 9), SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), SUNXI_FUNCTION(0x2, "lcd0"), /* D13 */ SUNXI_FUNCTION(0x3, "ts0"), /* D5 */ SUNXI_FUNCTION(0x4, "csi0"), /* D5 */ SUNXI_FUNCTION(0x5, "gmac0"), /* TXD1 */ SUNXI_FUNCTION(0x7, "io_disabled")), SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 10), SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), SUNXI_FUNCTION(0x2, "lcd0"), /* D14 */ SUNXI_FUNCTION(0x3, "ts0"), /* D6 */ SUNXI_FUNCTION(0x4, "csi0"), /* D6 */ SUNXI_FUNCTION(0x5, "gmac0"), /* TXD0 */ SUNXI_FUNCTION(0x7, "io_disabled")), SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 11), SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), SUNXI_FUNCTION(0x2, "lcd0"), /* D15 */ SUNXI_FUNCTION(0x3, "ts0"), /* D7 */ SUNXI_FUNCTION(0x4, "csi0"), /* D7 */ SUNXI_FUNCTION(0x5, "gmac0"), /* TXCK */ SUNXI_FUNCTION(0x7, "io_disabled")), SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 12), SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), SUNXI_FUNCTION(0x2, "lcd0"), /* D18 */ SUNXI_FUNCTION(0x3, "ts1"), /* CLK */ SUNXI_FUNCTION(0x4, "csi0"), /* SCK */ SUNXI_FUNCTION(0x5, "gmac0"), /* TXCTL */ SUNXI_FUNCTION(0x7, "io_disabled")), SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 13), SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), SUNXI_FUNCTION(0x2, "lcd0"), /* D19 */ SUNXI_FUNCTION(0x3, "ts1"), /* ERR */ SUNXI_FUNCTION(0x4, "csi0"), /* SDA */ SUNXI_FUNCTION(0x5, "gmac0"), /* CLKIN */ SUNXI_FUNCTION(0x7, "io_disabled")), SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 14), SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), SUNXI_FUNCTION(0x2, "lcd0"), /* D20 */ SUNXI_FUNCTION(0x3, "ts1"), /* SYNC */ SUNXI_FUNCTION(0x4, "dmic0"), /* CLK */ SUNXI_FUNCTION(0x5, "csi0"), /* D8 */ SUNXI_FUNCTION(0x7, "io_disabled")), SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 15), SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), SUNXI_FUNCTION(0x2, "lcd0"), /* D21 */ SUNXI_FUNCTION(0x3, "ts1"), /* DVLD */ SUNXI_FUNCTION(0x4, "dmic0"), /* DATA0 */ SUNXI_FUNCTION(0x5, "csi0"), /* D9 */ SUNXI_FUNCTION(0x7, "io_disabled")), SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 16), SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), SUNXI_FUNCTION(0x2, "lcd0"), /* D22 */ SUNXI_FUNCTION(0x3, "ts1"), /* D0 */ SUNXI_FUNCTION(0x4, "dmic0"), /* DATA1 */ SUNXI_FUNCTION(0x7, "io_disabled")), SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 17), SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), SUNXI_FUNCTION(0x2, "lcd0"), /* D23 */ SUNXI_FUNCTION(0x3, "ts2"), /* CLK */ SUNXI_FUNCTION(0x4, "dmic0"), /* DATA2 */ SUNXI_FUNCTION(0x5, "twi2"), /* CLK */ SUNXI_FUNCTION(0x7, "io_disabled")), SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 18), SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), SUNXI_FUNCTION(0x2, "lcd0"), /* CLK */ SUNXI_FUNCTION(0x3, "ts2"), /* ERR */ SUNXI_FUNCTION(0x4, "dmic0"), /* DATA3 */ SUNXI_FUNCTION(0x5, "twi2"), /* SDA */ SUNXI_FUNCTION(0x7, "io_disabled")), SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 19), SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), SUNXI_FUNCTION(0x2, "lcd0"), /* DE */ SUNXI_FUNCTION(0x3, "ts2"), /* SYNC */ SUNXI_FUNCTION(0x4, "uart2"), /* TX*/ SUNXI_FUNCTION(0x5, "mdc0"), /* MDC0 */ SUNXI_FUNCTION(0x7, "io_disabled")), SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 20), SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), SUNXI_FUNCTION(0x2, "lcd0"), /* HSYNC */ SUNXI_FUNCTION(0x3, "ts2"), /* DVLD */ SUNXI_FUNCTION(0x4, "uart2"), /* RX */ SUNXI_FUNCTION(0x5, "mdio0"), /* MDIO */ SUNXI_FUNCTION(0x7, "io_disabled")), SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 21), SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), SUNXI_FUNCTION(0x2, "lcd0"), /* VSYNC */ SUNXI_FUNCTION(0x3, "ts2"), /* D0 */ SUNXI_FUNCTION(0x4, "uart2"), /* RTS */ SUNXI_FUNCTION(0x5, "twi0"), /* SCK */ SUNXI_FUNCTION(0x7, "io_disabled")), SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 22), SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), SUNXI_FUNCTION(0x2, "pwm0"), /* PWM0 */ SUNXI_FUNCTION(0x3, "ts3"), /* CLK */ SUNXI_FUNCTION(0x4, "uart2"), /* CTS */ SUNXI_FUNCTION(0x5, "twi0"), /* SDA */ SUNXI_FUNCTION(0x7, "io_disabled")), SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 23), SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), SUNXI_FUNCTION(0x2, "twi2"), /* SCK */ SUNXI_FUNCTION(0x3, "ts3"), /* ERR */ SUNXI_FUNCTION(0x4, "uart3"), /* TX */ SUNXI_FUNCTION(0x5, "jtag0"), /* MS */ SUNXI_FUNCTION(0x7, "io_disabled")), SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 24), SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), SUNXI_FUNCTION(0x2, "twi2"), /* SDA */ SUNXI_FUNCTION(0x3, "ts3"), /* SYNC */ SUNXI_FUNCTION(0x4, "uart3"), /* RX */ SUNXI_FUNCTION(0x5, "jtag0"), /* CK */ SUNXI_FUNCTION(0x7, "io_disabled")), SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 25), SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), SUNXI_FUNCTION(0x2, "twi0"), /* SCK */ SUNXI_FUNCTION(0x3, "ts3"), /* DVLD */ SUNXI_FUNCTION(0x4, "uart3"), /* RTS */ SUNXI_FUNCTION(0x5, "jtag0"), /* D0 */ SUNXI_FUNCTION(0x7, "io_disabled")), SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 26), SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), SUNXI_FUNCTION(0x2, "twi0"), /* SDA */ SUNXI_FUNCTION(0x3, "ts3"), /* D0 */ SUNXI_FUNCTION(0x4, "uart3"), /* CTS */ SUNXI_FUNCTION(0x5, "jtag0"), /* DI */ SUNXI_FUNCTION(0x7, "io_disabled")), /* HOLE */ SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 0), SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), SUNXI_FUNCTION(0x2, "sdc0"), /* D1 */ SUNXI_FUNCTION(0x3, "jtag0"), /* MS1 */ SUNXI_FUNCTION(0x7, "io_disabled"), SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 0)), SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 1), SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), SUNXI_FUNCTION(0x2, "sdc0"), /* D0 */ SUNXI_FUNCTION(0x3, "jtag0"), /* DI1 */ SUNXI_FUNCTION(0x7, "io_disabled"), SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 1)), SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 2), SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), SUNXI_FUNCTION(0x2, "sdc0"), /* CLK */ SUNXI_FUNCTION(0x3, "uart0"), /* TX */ SUNXI_FUNCTION(0x7, "io_disabled"), SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 2)), SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 3), SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), SUNXI_FUNCTION(0x2, "sdc0"), /* CMD */ SUNXI_FUNCTION(0x3, "jtag0"), /* DO1 */ SUNXI_FUNCTION(0x7, "io_disabled"), SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 3)), SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 4), SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), SUNXI_FUNCTION(0x2, "sdc0"), /* D3 */ SUNXI_FUNCTION(0x3, "uart0"), /* RX */ SUNXI_FUNCTION(0x7, "io_disabled"), SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 4)), SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 5), SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), SUNXI_FUNCTION(0x2, "sdc0"), /* D2 */ SUNXI_FUNCTION(0x3, "jtag0"), /* CK1 */ SUNXI_FUNCTION(0x7, "io_disabled"), SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 5)), SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 6), SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), SUNXI_FUNCTION(0x7, "io_disabled"), SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 6)), /* HOLE */ SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 0), SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), SUNXI_FUNCTION(0x2, "sdc1"), /* CLK */ SUNXI_FUNCTION(0x7, "io_disabled"), SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 0)), SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 1), SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), SUNXI_FUNCTION(0x2, "sdc1"), /* CMD */ SUNXI_FUNCTION(0x7, "io_disabled"), SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 1)), SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 2), SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), SUNXI_FUNCTION(0x2, "sdc1"), /* D0 */ SUNXI_FUNCTION(0x7, "io_disabled"), SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 2)), SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 3), SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), SUNXI_FUNCTION(0x2, "sdc1"), /* D1 */ SUNXI_FUNCTION(0x7, "io_disabled"), SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 3)), SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 4), SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), SUNXI_FUNCTION(0x2, "sdc1"), /* D2 */ SUNXI_FUNCTION(0x7, "io_disabled"), SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 4)), SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 5), SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), SUNXI_FUNCTION(0x2, "sdc1"), /* D3 */ SUNXI_FUNCTION(0x7, "io_disabled"), SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 5)), SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 6), SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), SUNXI_FUNCTION(0x2, "uart1"), /* TX */ SUNXI_FUNCTION(0x7, "io_disabled"), SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 6)), SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 7), SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), SUNXI_FUNCTION(0x2, "uart1"), /* RX */ SUNXI_FUNCTION(0x7, "io_disabled"), SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 7)), SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 8), SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), SUNXI_FUNCTION(0x2, "uart1"), /* RTS */ SUNXI_FUNCTION(0x3, "pll0"), /* STA_DB */ SUNXI_FUNCTION(0x4, "sim0"), /* VPPEN */ SUNXI_FUNCTION(0x7, "io_disabled"), SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 8)), SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 9), SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), SUNXI_FUNCTION(0x2, "uart1"), /* CTS */ SUNXI_FUNCTION(0x3, "pll0"), /* TEST_GPIO */ SUNXI_FUNCTION(0x4, "sim0"), /* VPPPP */ SUNXI_FUNCTION(0x7, "io_disabled"), SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 9)), SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 10), SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), SUNXI_FUNCTION(0x2, "pcm2"), /* SYNC */ SUNXI_FUNCTION(0x3, "h_pcm2"), /* SYNC */ SUNXI_FUNCTION(0x4, "sim0"), /* PWREN */ SUNXI_FUNCTION(0x7, "io_disabled"), SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 10)), SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 11), SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), SUNXI_FUNCTION(0x2, "pcm2"), /* CLK */ SUNXI_FUNCTION(0x3, "h_pcm2"), /* CLK */ SUNXI_FUNCTION(0x4, "sim0"), /* CLK */ SUNXI_FUNCTION(0x5, "bist0"), /* RESULT0 */ SUNXI_FUNCTION(0x7, "io_disabled"), SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 11)), SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 12), SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), SUNXI_FUNCTION(0x2, "pcm2"), /* DOUT */ SUNXI_FUNCTION(0x3, "h_pcm2"), /* DOUT */ SUNXI_FUNCTION(0x4, "sim0"), /* DATA */ SUNXI_FUNCTION(0x5, "bist0"), /* RESULT1 */ SUNXI_FUNCTION(0x7, "io_disabled"), SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 12)), SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 13), SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), SUNXI_FUNCTION(0x2, "pcm2"), /* DIN */ SUNXI_FUNCTION(0x3, "h_pcm2"), /* DIN */ SUNXI_FUNCTION(0x4, "sim0"), /* RST */ SUNXI_FUNCTION(0x5, "bist0"), /* RESULT2 */ SUNXI_FUNCTION(0x7, "io_disabled"), SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 13)), SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 14), SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), SUNXI_FUNCTION(0x2, "pcm2"), /* MCLK */ SUNXI_FUNCTION(0x3, "h_pcm2"), /* MCLK */ SUNXI_FUNCTION(0x4, "sim0"), /* DET */ SUNXI_FUNCTION(0x5, "bist0"), /* RESULT3 */ SUNXI_FUNCTION(0x7, "io_disabled"), SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 14)), /* HOLE */ SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 0), SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), SUNXI_FUNCTION(0x2, "uart0"), /* TX */ SUNXI_FUNCTION(0x3, "pcm0"), /* SYNC */ SUNXI_FUNCTION(0x4, "h_pcm0"), /* SYNC */ SUNXI_FUNCTION(0x5, "sim1"), /* VPPEN */ SUNXI_FUNCTION(0x7, "io_disabled"), SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 0)), SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 1), SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), SUNXI_FUNCTION(0x2, "uart0"), /* RX */ SUNXI_FUNCTION(0x3, "pcm0"), /* CLK */ SUNXI_FUNCTION(0x4, "h_pcm0"), /* CLK */ SUNXI_FUNCTION(0x5, "sim1"), /* VPPPP */ SUNXI_FUNCTION(0x7, "io_disabled"), SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 1)), SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 2), SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), SUNXI_FUNCTION(0x2, "ir0"), /* TX */ SUNXI_FUNCTION(0x3, "pcm0"), /* DOUT */ SUNXI_FUNCTION(0x4, "h_pcm0"), /* DOUT */ SUNXI_FUNCTION(0x5, "sim1"), /* PWREN */ SUNXI_FUNCTION(0x7, "io_disabled"), SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 2)), SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 3), SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), SUNXI_FUNCTION(0x2, "spi1"), /* CS */ SUNXI_FUNCTION(0x3, "pcm0"), /* DIN */ SUNXI_FUNCTION(0x4, "h_pcm0"), /* DIN */ SUNXI_FUNCTION(0x5, "sim1"), /* CLK */ SUNXI_FUNCTION(0x7, "io_disabled"), SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 3)), SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 4), SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), SUNXI_FUNCTION(0x2, "spi1"), /* CLK */ SUNXI_FUNCTION(0x3, "pcm0"), /* MCLK */ SUNXI_FUNCTION(0x4, "h_pcm0"), /* MCLK */ SUNXI_FUNCTION(0x5, "sim1"), /* DATA */ SUNXI_FUNCTION(0x7, "io_disabled"), SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 4)), SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 5), SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), SUNXI_FUNCTION(0x2, "spi1"), /* MOSI */ SUNXI_FUNCTION(0x3, "spdif0"), /* MCLK */ SUNXI_FUNCTION(0x4, "twi1"), /* CLK */ SUNXI_FUNCTION(0x5, "sim1"), /* RST */ SUNXI_FUNCTION(0x7, "io_disabled"), SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 5)), SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 6), SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), SUNXI_FUNCTION(0x2, "spi1"), /* MISO */ SUNXI_FUNCTION(0x3, "spdif0"), /* IN */ SUNXI_FUNCTION(0x4, "twi1"), /* SDA */ SUNXI_FUNCTION(0x5, "sim1"), /* DET */ SUNXI_FUNCTION(0x7, "io_disabled"), SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 6)), SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 7), SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), SUNXI_FUNCTION(0x3, "spdif0"), /* OUT */ SUNXI_FUNCTION(0x7, "io_disabled"), SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 7)), SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 8), SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), SUNXI_FUNCTION(0x2, "ddc"), /* HSCL*/ SUNXI_FUNCTION(0x7, "io_disabled"), SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 8)), SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 9), SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), SUNXI_FUNCTION(0x2, "ddc"), /* HSDA */ SUNXI_FUNCTION(0x5, "vdevice"), /* virtual */ SUNXI_FUNCTION(0x7, "io_disabled"), SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 9)), SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 10), SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), SUNXI_FUNCTION(0x2, "hcec0"), /* HCEC*/ SUNXI_FUNCTION(0x5, "vdevice"), /* virtual */ SUNXI_FUNCTION(0x7, "io_disabled"), SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 10)), }; static const unsigned sun50iw6p1_irq_bank_base[] = { SUNXI_PIO_BANK_BASE(PB_BASE, 0), SUNXI_PIO_BANK_BASE(PF_BASE, 1), SUNXI_PIO_BANK_BASE(PG_BASE, 2), SUNXI_PIO_BANK_BASE(PH_BASE, 3), }; static const struct sunxi_pinctrl_desc sun50iw6p1_pinctrl_data = { .pins = sun50iw6p1_pins, .npins = ARRAY_SIZE(sun50iw6p1_pins), .pin_base = 0, .irq_banks = 4, .irq_bank_base = sun50iw6p1_irq_bank_base, }; static int sun50iw6p1_pinctrl_probe(struct platform_device *pdev) { return sunxi_pinctrl_init(pdev, &sun50iw6p1_pinctrl_data); } static struct of_device_id sun50iw6p1_pinctrl_match[] = { { .compatible = "allwinner,sun50iw6p1-pinctrl", }, {} }; MODULE_DEVICE_TABLE(of, sun50iw6p1_pinctrl_match); static struct platform_driver sun50iw6p1_pinctrl_driver = { .probe = sun50iw6p1_pinctrl_probe, .driver = { .name = "sun50iw6p1-pinctrl", .owner = THIS_MODULE, .of_match_table = sun50iw6p1_pinctrl_match, }, }; static int __init sun50iw6p1_pio_init(void) { int ret; ret = platform_driver_register(&sun50iw6p1_pinctrl_driver); if (ret) { pr_err("register sun50iw6p1 pio controller failed\n"); return -EINVAL; } return 0; } postcore_initcall(sun50iw6p1_pio_init); MODULE_AUTHOR("WimHuang"); MODULE_DESCRIPTION("Allwinner sun50iw6p1 pio pinctrl driver"); MODULE_LICENSE("GPL");