/* * Allwinner Technology CO., Ltd. sun8iw12p1 fpga board. * * fpga board support. */ /dts-v1/; #include "sun8iw15p1.dtsi" /{ opp_dvfs_table:opp_dvfs_table { cluster_num = <1>; opp_table_count = <1>; cpu_opp_l_table0: opp_l_table0 { /* compatible = "operating-points-v2"; */ compatible = "allwinner,opp_l_table0"; opp_count = <5>; opp-shared; opp00 { opp-hz = /bits/ 64 <480000000>; opp-microvolt = <880000>; axi-bus-divide-ratio = <3>; clock-latency-ns = <2000000>; }; opp01 { opp-hz = /bits/ 64 <720000000>; opp-microvolt = <880000>; axi-bus-divide-ratio = <3>; clock-latency-ns = <2000000>; }; opp02 { opp-hz = /bits/ 64 <816000000>; opp-microvolt = <880000>; axi-bus-divide-ratio = <3>; clock-latency-ns = <2000000>; }; opp03 { opp-hz = /bits/ 64 <1008000000>; opp-microvolt = <880000>; axi-bus-divide-ratio = <3>; clock-latency-ns = <2000000>; }; opp04 { opp-hz = /bits/ 64 <1200000000>; opp-microvolt = <940000>; axi-bus-divide-ratio = <3>; clock-latency-ns = <2000000>; }; opp05 { opp-hz = /bits/ 64 <1416000000>; opp-microvolt = <1000000>; axi-bus-divide-ratio = <3>; clock-latency-ns = <2000000>; }; opp06 { opp-hz = /bits/ 64 <1512000000>; opp-microvolt = <1040000>; axi-bus-divide-ratio = <3>; clock-latency-ns = <2000000>; }; opp07 { opp-hz = /bits/ 64 <1608000000>; opp-microvolt = <1160000>; axi-bus-divide-ratio = <3>; clock-latency-ns = <2000000>; }; opp08 { opp-hz = /bits/ 64 <1800000000>; opp-microvolt = <1160000>; axi-bus-divide-ratio = <3>; clock-latency-ns = <2000000>; }; }; }; soc@03000000 { wlan:wlan { compatible = "allwinner,sunxi-wlan"; clocks = <&clk_losc_out>; wlan_power = "vcc-wifi"; wlan_io_regulator = "vcc-wifi-io"; wlan_busnum = <1>; wlan_regon = <&r_pio PL 5 1 1 1 0>; wlan_hostwake = <&r_pio PL 6 6 0 0 0>; status = "okay"; }; bt:bt { compatible = "allwinner,sunxi-bt"; clocks = <&clk_losc_out>; bt_power = "vcc-wifi"; bt_io_regulator = "vcc-wifi-io"; bt_rst_n = <&r_pio PL 2 1 1 1 0>; status = "okay"; }; btlpm:btlpm { compatible = "allwinner,sunxi-btlpm"; uart_index = <1>; bt_wake = <&r_pio PL 7 1 1 1 1>; bt_hostwake = <&r_pio PL 4 6 0 0 0>; status = "okay"; }; pmu0: pmu0@0{ interrupts = ; status = "okay"; powerkey0: powerkey@0{ status = "okay"; }; regulator0: regulator@0{ status = "okay"; }; axp_gpio0: axp_gpio@0{ gpio-controller; #size-cells = <0>; #gpio-cells = <6>; status = "okay"; }; }; pmu1: pmu1@0{ interrupts = ; status = "okay"; device_type = "pmu1"; charger0: charger@0{ status = "okay"; }; }; oases_pmem { compatible = "oases_pmem"; status = "okay"; oases,pmem_phys = <0x48166000>; oases,pmem_size = <0x1000>; }; }; };