2018-07-13 01:31:50 +00:00
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/*
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* drivers/power/axp/axp22x/axp22x-gpio.c
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* (C) Copyright 2010-2016
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* Allwinner Technology Co., Ltd. <www.allwinnertech.com>
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* Pannan <pannan@allwinnertech.com>
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*
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* gpio driver of axp22x
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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*/
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#include <linux/io.h>
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#include <linux/clk.h>
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#include <linux/gpio.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include <linux/of_device.h>
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#include <linux/pinctrl/consumer.h>
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#include <linux/pinctrl/machine.h>
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#include <linux/pinctrl/pinctrl.h>
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#include <linux/pinctrl/pinconf-generic.h>
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#include <linux/pinctrl/pinmux.h>
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#include <linux/platform_device.h>
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#include <linux/slab.h>
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#include <linux/sunxi-gpio.h>
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#include <linux/mfd/core.h>
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#include <linux/seq_file.h>
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#include <linux/i2c.h>
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2018-12-13 10:48:25 +00:00
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#include "../../../../pinctrl/core.h"
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2018-07-13 01:31:50 +00:00
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#include "../axp-core.h"
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#include "../axp-gpio.h"
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#include "axp22x-gpio.h"
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static struct axp_gpio_irqchip *axp22x_gpio_irqchip;
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static int axp22x_pmu_num;
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static int axp22x_gpio_get_data(struct axp_dev *axp_dev, int gpio)
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{
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u8 ret;
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struct axp_regmap *map;
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map = axp_dev->regmap;
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if (NULL == map) {
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pr_err("%s: axp regmap is null\n", __func__);
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return -ENXIO;
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}
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switch (gpio) {
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case 0:
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axp_regmap_read(map, AXP_GPIO01_STATE, &ret); ret &= 0x1; break;
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case 1:
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axp_regmap_read(map, AXP_GPIO01_STATE, &ret); ret &= 0x2; break;
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default:
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pr_err("This IO is not an input\n");
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return -ENXIO;
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}
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return ret;
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}
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static int axp22x_gpio_set_data(struct axp_dev *axp_dev, int gpio, int value)
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{
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struct axp_regmap *map;
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if ((0 <= gpio) && (1 >= gpio)) {
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map = axp_dev->regmap;
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if (NULL == map) {
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pr_err("%s: %d axp regmap is null\n",
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__func__, __LINE__);
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return -ENXIO;
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}
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} else {
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return -ENXIO;
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}
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if (value) {
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/* high */
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switch (gpio) {
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case 0:
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return axp_regmap_update_sync(map,
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AXP_GPIO0_CFG, 0x01, 0x07);
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case 1:
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return axp_regmap_update_sync(map,
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AXP_GPIO1_CFG, 0x01, 0x07);
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default:
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break;
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}
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} else {
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/* low */
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switch (gpio) {
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case 0:
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return axp_regmap_update_sync(map,
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AXP_GPIO0_CFG, 0x0, 0x07);
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case 1:
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return axp_regmap_update_sync(map,
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AXP_GPIO1_CFG, 0x0, 0x07);
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default:
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break;
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}
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}
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return -ENXIO;
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}
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static int axp22x_pmx_set(struct axp_dev *axp_dev, int gpio, int mux)
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{
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struct axp_regmap *map;
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map = axp_dev->regmap;
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if (NULL == map) {
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pr_err("%s: %d axp regmap is null\n", __func__, __LINE__);
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return -ENXIO;
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}
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if (mux == 1) {
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/* output */
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switch (gpio) {
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case 0:
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return axp_regmap_clr_bits_sync(map,
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AXP_GPIO0_CFG, 0x06);
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case 1:
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return axp_regmap_clr_bits_sync(map,
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AXP_GPIO1_CFG, 0x06);
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default:
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return -ENXIO;
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}
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} else if (mux == 0) {
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/* input */
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switch (gpio) {
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case 0:
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axp_regmap_clr_bits_sync(map,
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AXP_GPIO0_CFG, 0x05);
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return axp_regmap_set_bits_sync(map,
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AXP_GPIO0_CFG, 0x02);
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case 1:
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axp_regmap_clr_bits_sync(map,
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AXP_GPIO1_CFG, 0x05);
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return axp_regmap_set_bits_sync(map,
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AXP_GPIO1_CFG, 0x02);
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default:
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pr_err("This IO can not config as input!");
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return -ENXIO;
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}
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}
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return -ENXIO;
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}
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static int axp22x_pmx_get(struct axp_dev *axp_dev, int gpio)
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{
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u8 ret;
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struct axp_regmap *map;
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map = axp_dev->regmap;
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if (NULL == map) {
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pr_err("%s: %d axp regmap is null\n",
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__func__, __LINE__);
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return -ENXIO;
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}
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switch (gpio) {
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case 0:
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axp_regmap_read(map, AXP_GPIO0_CFG, &ret); break;
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case 1:
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axp_regmap_read(map, AXP_GPIO1_CFG, &ret); break;
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default:
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return -ENXIO;
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}
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if (0 == (ret & 0x06))
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return 1;
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else if (0x02 == (ret & 0x07))
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return 0;
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else
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return -ENXIO;
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return -ENXIO;
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}
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static const struct axp_desc_pin axp22x_pins[] = {
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AXP_PIN_DESC(AXP_PINCTRL_GPIO(0),
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AXP_FUNCTION(0x0, "gpio_in"),
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AXP_FUNCTION(0x1, "gpio_out"),
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AXP_FUNCTION_IRQ(1)),
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AXP_PIN_DESC(AXP_PINCTRL_GPIO(1),
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AXP_FUNCTION(0x0, "gpio_in"),
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AXP_FUNCTION(0x1, "gpio_out"),
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AXP_FUNCTION_IRQ(1)),
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};
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static struct axp_pinctrl_desc axp22x_pinctrl_pins_desc = {
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.pins = axp22x_pins,
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.npins = ARRAY_SIZE(axp22x_pins),
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};
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static struct axp_gpio_ops axp22x_gpio_ops = {
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.gpio_get_data = axp22x_gpio_get_data,
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.gpio_set_data = axp22x_gpio_set_data,
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.pmx_set = axp22x_pmx_set,
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.pmx_get = axp22x_pmx_get,
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};
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static int axp22x_gpio_irq_request(int gpio_no,
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u32 (*handler)(int, void *), void *data)
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{
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int gpio = gpio_no - AXP_PIN_BASE;
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if (!axp_gpio_irq_valid(&axp22x_pinctrl_pins_desc, gpio)) {
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pr_err("axp gpio%d irq is not valid\n", gpio);
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return -1;
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}
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axp22x_gpio_irqchip[gpio].gpio_no = gpio;
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axp22x_gpio_irqchip[gpio].handler = handler;
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axp22x_gpio_irqchip[gpio].data = data;
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return 0;
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}
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static int axp22x_gpio_irq_free(int gpio_no)
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{
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int gpio = gpio_no - AXP_PIN_BASE;
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if (!axp_gpio_irq_valid(&axp22x_pinctrl_pins_desc, gpio)) {
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pr_err("axp gpio%d irq is not valid\n", gpio);
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return -1;
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}
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axp22x_gpio_irqchip[gpio].gpio_no = 0;
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axp22x_gpio_irqchip[gpio].handler = NULL;
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axp22x_gpio_irqchip[gpio].data = NULL;
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return 0;
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}
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static int axp22x_gpio_irq_ack(int gpio_no)
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{
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struct axp_dev *cur_axp_dev = get_pmu_cur_dev(axp22x_pmu_num);
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struct axp_regmap *map = cur_axp_dev->regmap;
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int gpio = gpio_no - AXP_PIN_BASE;
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if (!axp_gpio_irq_valid(&axp22x_pinctrl_pins_desc, gpio)) {
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pr_err("axp gpio%d irq is not valid\n", gpio);
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return -1;
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}
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axp_regmap_write(map, AXP_GPIO01_INTSTA, 0x1 << gpio);
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return 0;
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}
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static int axp22x_gpio_irq_enable(int gpio_no)
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{
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struct axp_dev *cur_axp_dev = get_pmu_cur_dev(axp22x_pmu_num);
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struct axp_regmap *map = cur_axp_dev->regmap;
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int gpio = gpio_no - AXP_PIN_BASE;
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u8 regval;
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if (!axp_gpio_irq_valid(&axp22x_pinctrl_pins_desc, gpio)) {
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pr_err("axp gpio%d irq is not valid\n", gpio);
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return -1;
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}
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axp_regmap_read(map, AXP_GPIO01_INTEN, ®val);
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regval |= (0x1 << gpio);
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axp_regmap_write(map, AXP_GPIO01_INTEN, regval);
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return 0;
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};
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static int axp22x_gpio_irq_disable(int gpio_no)
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{
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struct axp_dev *cur_axp_dev = get_pmu_cur_dev(axp22x_pmu_num);
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struct axp_regmap *map = cur_axp_dev->regmap;
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int gpio = gpio_no - AXP_PIN_BASE;
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u8 regval;
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if (!axp_gpio_irq_valid(&axp22x_pinctrl_pins_desc, gpio)) {
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pr_err("axp gpio%d irq is not valid\n", gpio);
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return -1;
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}
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axp_regmap_read(map, AXP_GPIO01_INTEN, ®val);
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regval &= ~(0x1 << gpio);
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axp_regmap_write(map, AXP_GPIO01_INTEN, regval);
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return 0;
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};
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static int axp22x_gpio_set_type(int gpio_no, unsigned long type)
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{
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struct axp_dev *cur_axp_dev = get_pmu_cur_dev(axp22x_pmu_num);
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struct axp_regmap *map = cur_axp_dev->regmap;
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int gpio = gpio_no - AXP_PIN_BASE;
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int reg = 0;
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u8 regval, mode = 0;
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if (!axp_gpio_irq_valid(&axp22x_pinctrl_pins_desc, gpio)) {
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pr_err("axp gpio%d irq is not valid\n", gpio);
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return -1;
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}
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switch (type) {
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case AXP_GPIO_IRQF_TRIGGER_RISING:
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mode = AXP_GPIO_IRQ_EDGE_RISING;
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break;
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case AXP_GPIO_IRQF_TRIGGER_FALLING:
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mode = AXP_GPIO_IRQ_EDGE_FALLING;
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break;
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case AXP_GPIO_IRQF_TRIGGER_RISING | AXP_GPIO_IRQF_TRIGGER_FALLING:
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mode = AXP_GPIO_IRQ_EDGE_RISING | AXP_GPIO_IRQ_EDGE_FALLING;
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break;
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default:
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return -EINVAL;
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}
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if (gpio == 0)
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reg = AXP_GPIO0_CFG;
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else if (gpio == 1)
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reg = AXP_GPIO1_CFG;
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axp_regmap_read(map, reg, ®val);
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regval &= ~AXP_GPIO_EDGE_TRIG_MASK;
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regval |= mode;
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regval &= ~AXP_GPIO_INPUT_TRIG_MASK;
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regval |= 0x2; /* digital input */
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axp_regmap_write(map, reg, regval);
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return 0;
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};
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struct axp_gpio_irq_ops axp22x_gpio_irq_ops = {
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.irq_request = axp22x_gpio_irq_request,
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.irq_free = axp22x_gpio_irq_free,
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.irq_ack = axp22x_gpio_irq_ack,
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.irq_enable = axp22x_gpio_irq_enable,
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.irq_disable = axp22x_gpio_irq_disable,
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.irq_set_type = axp22x_gpio_set_type,
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};
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static irqreturn_t axp22x_gpio_isr(int irq, void *data)
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{
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int gpio = 0;
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switch (irq) {
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case AXP22X_IRQ_GPIO0:
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gpio = 0;
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break;
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case AXP22X_IRQ_GPIO1:
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gpio = 1;
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break;
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default:
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return IRQ_NONE;
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}
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AXP_DEBUG(AXP_INT, axp22x_pmu_num, "gpio%d input edge\n", gpio);
|
|
|
|
|
|
|
|
if (axp22x_gpio_irqchip[gpio].handler != NULL) {
|
|
|
|
axp22x_gpio_irqchip[gpio].handler(gpio + AXP_PIN_BASE,
|
|
|
|
axp22x_gpio_irqchip[gpio].data);
|
|
|
|
axp22x_gpio_irq_ack(gpio + AXP_PIN_BASE);
|
|
|
|
}
|
|
|
|
|
|
|
|
return IRQ_HANDLED;
|
|
|
|
}
|
|
|
|
|
|
|
|
static struct axp_interrupts axp22x_gpio_irq[] = {
|
|
|
|
{"gpio0", axp22x_gpio_isr},
|
|
|
|
{"gpio1", axp22x_gpio_isr},
|
|
|
|
};
|
|
|
|
|
|
|
|
static int axp22x_gpio_probe(struct platform_device *pdev)
|
|
|
|
{
|
|
|
|
struct axp_dev *axp_dev = dev_get_drvdata(pdev->dev.parent);
|
|
|
|
struct axp_pinctrl *axp22x_pin;
|
|
|
|
int ret, i, irq;
|
|
|
|
|
|
|
|
axp22x_pin = axp_pinctrl_register(&pdev->dev,
|
|
|
|
axp_dev, &axp22x_pinctrl_pins_desc, &axp22x_gpio_ops);
|
|
|
|
if (IS_ERR_OR_NULL(axp22x_pin))
|
|
|
|
goto fail;
|
|
|
|
|
|
|
|
for (i = 0; i < ARRAY_SIZE(axp22x_gpio_irq); i++) {
|
|
|
|
irq = platform_get_irq_byname(pdev, axp22x_gpio_irq[i].name);
|
|
|
|
if (irq < 0)
|
|
|
|
continue;
|
|
|
|
|
|
|
|
ret = axp_gpio_irq_register(axp_dev, irq,
|
|
|
|
axp22x_gpio_irq[i].isr, axp22x_pin);
|
|
|
|
if (ret != 0) {
|
|
|
|
dev_err(&pdev->dev, "failed to request %s IRQ %d: %d\n",
|
|
|
|
axp22x_gpio_irq[i].name, irq, ret);
|
|
|
|
goto out_irq;
|
|
|
|
}
|
|
|
|
|
|
|
|
dev_dbg(&pdev->dev, "Requested %s IRQ %d: %d\n",
|
|
|
|
axp22x_gpio_irq[i].name, irq, ret);
|
|
|
|
}
|
|
|
|
|
|
|
|
axp22x_gpio_irqchip = kzalloc(ARRAY_SIZE(axp22x_gpio_irq)
|
|
|
|
* sizeof(struct axp_gpio_irqchip), GFP_KERNEL);
|
|
|
|
if (IS_ERR_OR_NULL(axp22x_gpio_irqchip)) {
|
|
|
|
dev_err(&pdev->dev, "axp22x_gpio_irqchip: not enough memory\n");
|
|
|
|
i = ARRAY_SIZE(axp22x_gpio_irq);
|
|
|
|
goto out_irq;
|
|
|
|
}
|
|
|
|
|
|
|
|
axp22x_pmu_num = axp_dev->pmu_num;
|
|
|
|
axp_gpio_irq_ops_set(axp_dev->pmu_num, &axp22x_gpio_irq_ops);
|
|
|
|
|
|
|
|
platform_set_drvdata(pdev, axp22x_pin);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
out_irq:
|
|
|
|
for (i = i - 1; i >= 0; i--) {
|
|
|
|
irq = platform_get_irq_byname(pdev, axp22x_gpio_irq[i].name);
|
|
|
|
if (irq < 0)
|
|
|
|
continue;
|
|
|
|
axp_free_irq(axp_dev, irq);
|
|
|
|
}
|
|
|
|
fail:
|
|
|
|
return -1;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int axp22x_gpio_remove(struct platform_device *pdev)
|
|
|
|
{
|
|
|
|
struct axp_dev *axp_dev = dev_get_drvdata(pdev->dev.parent);
|
|
|
|
struct axp_pinctrl *axp22x_pin = platform_get_drvdata(pdev);
|
|
|
|
int i, irq;
|
|
|
|
|
|
|
|
kfree(axp22x_gpio_irqchip);
|
|
|
|
axp22x_gpio_irqchip = NULL;
|
|
|
|
|
|
|
|
for (i = 0; i < ARRAY_SIZE(axp22x_gpio_irq); i++) {
|
|
|
|
irq = platform_get_irq_byname(pdev, axp22x_gpio_irq[i].name);
|
|
|
|
if (irq < 0)
|
|
|
|
continue;
|
|
|
|
axp_free_irq(axp_dev, irq);
|
|
|
|
}
|
|
|
|
|
|
|
|
return axp_pinctrl_unregister(axp22x_pin);
|
|
|
|
}
|
|
|
|
|
|
|
|
static const struct of_device_id axp22x_gpio_dt_ids[] = {
|
|
|
|
{ .compatible = "axp221s-gpio", },
|
2018-12-13 10:48:25 +00:00
|
|
|
{ .compatible = "axp223-gpio", },
|
2018-07-13 01:31:50 +00:00
|
|
|
{ .compatible = "axp227-gpio", },
|
|
|
|
{ .compatible = "axp233-gpio", },
|
|
|
|
{},
|
|
|
|
};
|
|
|
|
MODULE_DEVICE_TABLE(of, axp22x_gpio_dt_ids);
|
|
|
|
|
|
|
|
static struct platform_driver axp22x_gpio_driver = {
|
|
|
|
.driver = {
|
|
|
|
.name = "axp22x-gpio",
|
|
|
|
.of_match_table = axp22x_gpio_dt_ids,
|
|
|
|
},
|
|
|
|
.probe = axp22x_gpio_probe,
|
|
|
|
.remove = axp22x_gpio_remove,
|
|
|
|
};
|
|
|
|
|
|
|
|
static int __init axp22x_gpio_initcall(void)
|
|
|
|
{
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
ret = platform_driver_register(&axp22x_gpio_driver);
|
|
|
|
if (IS_ERR_VALUE(ret)) {
|
|
|
|
pr_err("%s: failed, errno %d\n", __func__, ret);
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
fs_initcall(axp22x_gpio_initcall);
|
|
|
|
|
|
|
|
MODULE_DESCRIPTION("Gpio driver of axp22x");
|
|
|
|
MODULE_AUTHOR("pannan");
|
|
|
|
MODULE_LICENSE("GPL");
|