36 lines
1.7 KiB
Markdown
36 lines
1.7 KiB
Markdown
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ARM CPU Errata Workarounds
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==========================
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ARM Trusted Firmware exports a series of build flags which control the
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errata workarounds that are applied to each CPU by the reset handler. The
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errata details can be found in the CPU specifc errata documents published
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by ARM. The errata workarounds are implemented for a particular revision
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or a set of processor revisions. This check is done in the debug build.
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Each errata workaround is identified by its `ID` as specified in the processor's
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errata notice document. The format of the define used to enable/disable the
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errata is `ERRATA_<Processor name>_<ID>` where the `Processor name`
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is either `A57` for the `Cortex_A57` CPU or `A53` for `Cortex_A53` CPU.
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All workarounds are disabled by default. The platform is reponsible for
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enabling these workarounds according to its requirement by defining the
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errata workaround build flags in the platform specific makefile.
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In the current implementation, a platform which has more than 1 variant
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with different revisions of a processor has no runtime mechanism available
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for it to specify which errata workarounds should be enabled or not.
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The value of the build flags are 0 by default, that is, disabled. Any other
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value will enable it.
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For Cortex A57, following errata build flags are defined :
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* `ERRATA_A57_806969`: This applies errata 806969 workaround to cortex a57
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CPU. This needs to be enabled only for revision r0p0 of the CPU.
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* `ERRATA_A57_813420`: This applies errata 813420 workaround to cortex a57
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CPU. This needs to be enabled only for revision r0p0 of the CPU.
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_Copyright (c) 2014, ARM Limited and Contributors. All rights reserved._
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