712 lines
18 KiB
C
712 lines
18 KiB
C
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/*
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* Firmware I/O implementation for XRadio drivers
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*
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* Copyright (c) 2013
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* Xradio Technology Co., Ltd. <www.xradiotech.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/init.h>
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#include <linux/vmalloc.h>
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#include <linux/sched.h>
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#include <linux/firmware.h>
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#include "xradio.h"
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#include "fwio.h"
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#include "hwio.h"
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#include "sbus.h"
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#include "bh.h"
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/* Macroses are local. */
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#define APB_WRITE(reg, val) \
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do { \
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ret = xradio_apb_write_32(hw_priv, APB_ADDR(reg), (val)); \
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if (ret < 0) { \
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xradio_dbg(XRADIO_DBG_ERROR, \
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"%s: can't write %s at line %d.\n", \
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__func__, #reg, __LINE__); \
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goto error; \
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} \
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} while (0)
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#define APB_READ(reg, val) \
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do { \
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ret = xradio_apb_read_32(hw_priv, APB_ADDR(reg), &(val)); \
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if (ret < 0) { \
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xradio_dbg(XRADIO_DBG_ERROR, \
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"%s: can't read %s at line %d.\n", \
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__func__, #reg, __LINE__); \
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goto error; \
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} \
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} while (0)
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#define REG_WRITE(reg, val) \
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do { \
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ret = xradio_reg_write_32(hw_priv, (reg), (val)); \
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if (ret < 0) { \
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xradio_dbg(XRADIO_DBG_ERROR, \
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"%s: can't write %s at line %d.\n", \
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__func__, #reg, __LINE__); \
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goto error; \
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} \
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} while (0)
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#define REG_READ(reg, val) \
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do { \
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ret = xradio_reg_read_32(hw_priv, (reg), &(val)); \
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if (ret < 0) { \
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xradio_dbg(XRADIO_DBG_ERROR, \
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"%s: can't read %s at line %d.\n", \
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__func__, #reg, __LINE__); \
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goto error; \
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} \
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} while (0)
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static int xradio_get_hw_type(u32 config_reg_val, int *major_revision)
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{
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int hw_type = -1;
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u32 hif_type = (config_reg_val >> 24) & 0x4;
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/*u32 hif_vers = (config_reg_val >> 31) & 0x1;*/
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/* Check if we have XRADIO */
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if (hif_type == 0x4) {
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*major_revision = 0x4;
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hw_type = HIF_HW_TYPE_XRADIO;
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} else {
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/*hw type unknown.*/
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*major_revision = 0x0;
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}
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return hw_type;
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}
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/*
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* This function is called to Parse the SDD file
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* to extract some informations
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*/
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static int xradio_parse_sdd(struct xradio_common *hw_priv, u32 *dpll)
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{
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int ret = 0;
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const char *sdd_path = NULL;
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struct xradio_sdd *pElement = NULL;
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int parsedLength = 0;
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sta_printk(XRADIO_DBG_TRC, "%s\n", __func__);
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SYS_BUG(hw_priv->sdd != NULL);
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/* select and load sdd file depend on hardware version. */
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switch (hw_priv->hw_revision) {
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case XR819_HW_REV0:
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sdd_path = XR819_SDD_FILE;
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#ifdef CONFIG_XRADIO_ETF
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if (etf_is_connect())
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sdd_path = etf_get_sddpath();
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#endif
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break;
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default:
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xradio_dbg(XRADIO_DBG_ERROR,
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"%s: unknown hardware version.\n", __func__);
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return ret;
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}
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#ifdef USE_VFS_FIRMWARE
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hw_priv->sdd = xr_request_file(sdd_path);
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if (unlikely(!hw_priv->sdd)) {
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xradio_dbg(XRADIO_DBG_ERROR, "%s: can't load sdd file %s.\n",
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__func__, sdd_path);
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return -ENOENT;
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}
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#else
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ret = request_firmware(&hw_priv->sdd, sdd_path, hw_priv->pdev);
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if (unlikely(ret)) {
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xradio_dbg(XRADIO_DBG_ERROR, "%s: can't load sdd file %s.\n",
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__func__, sdd_path);
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return ret;
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}
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#endif
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/*parse SDD config.*/
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hw_priv->is_BT_Present = false;
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pElement = (struct xradio_sdd *)hw_priv->sdd->data;
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parsedLength += (FIELD_OFFSET(struct xradio_sdd, data) + \
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pElement->length);
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pElement = FIND_NEXT_ELT(pElement);
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while (parsedLength < hw_priv->sdd->size) {
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switch (pElement->id) {
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case SDD_PTA_CFG_ELT_ID:
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hw_priv->conf_listen_interval =
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(*((u16 *) pElement->data + 1) >> 7) & 0x1F;
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hw_priv->is_BT_Present = true;
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xradio_dbg(XRADIO_DBG_NIY,
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"PTA element found.Listen Interval %d\n",
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hw_priv->conf_listen_interval);
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break;
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case SDD_REFERENCE_FREQUENCY_ELT_ID:
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switch (*((uint16_t *) pElement->data)) {
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case 0x32C8:
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*dpll = 0x1D89D241;
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break;
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case 0x3E80:
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*dpll = 0x1E1;
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break;
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case 0x41A0:
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*dpll = 0x124931C1;
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break;
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case 0x4B00:
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*dpll = 0x191;
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break;
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case 0x5DC0:
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*dpll = 0x141;
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break;
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case 0x6590:
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*dpll = 0x0EC4F121;
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break;
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case 0x8340:
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*dpll = 0x92490E1;
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break;
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case 0x9600:
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*dpll = 0x100010C1;
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break;
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case 0x9C40:
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*dpll = 0xC1;
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break;
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case 0xBB80:
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*dpll = 0xA1;
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break;
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case 0xCB20:
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*dpll = 0x7627091;
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break;
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default:
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*dpll = DPLL_INIT_VAL_XRADIO;
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xradio_dbg(XRADIO_DBG_WARN,
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"Unknown Reference clock frequency."
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"Use default DPLL value=0x%08x.",
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DPLL_INIT_VAL_XRADIO);
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break;
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}
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xradio_dbg(XRADIO_DBG_NIY,
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"Reference clock=%uKHz, DPLL value=0x%08x.\n",
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*((uint16_t *) pElement->data), *dpll);
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default:
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break;
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}
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parsedLength += (FIELD_OFFSET(struct xradio_sdd, data) + \
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pElement->length);
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pElement = FIND_NEXT_ELT(pElement);
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}
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xradio_dbg(XRADIO_DBG_MSG, "sdd size=%zu parse len=%d.\n",
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hw_priv->sdd->size, parsedLength);
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if (hw_priv->is_BT_Present == false) {
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hw_priv->conf_listen_interval = 0;
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xradio_dbg(XRADIO_DBG_NIY, "PTA element NOT found.\n");
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}
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return ret;
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}
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static int xradio_firmware(struct xradio_common *hw_priv)
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{
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int ret, block, num_blocks;
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unsigned i;
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u32 val32;
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u32 put = 0, get = 0;
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u8 *buf = NULL;
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const char *fw_path;
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#ifdef USE_VFS_FIRMWARE
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const struct xr_file *firmware = NULL;
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#else
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const struct firmware *firmware = NULL;
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#endif
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xradio_dbg(XRADIO_DBG_TRC, "%s\n", __func__);
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switch (hw_priv->hw_revision) {
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case XR819_HW_REV0:
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fw_path = XR819_FIRMWARE;
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#ifdef CONFIG_XRADIO_ETF
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if (etf_is_connect())
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fw_path = etf_get_fwpath();
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#endif
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break;
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default:
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xradio_dbg(XRADIO_DBG_ERROR, "%s: invalid silicon revision %d.\n",
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__func__, hw_priv->hw_revision);
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return -EINVAL;
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}
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/* Initialize common registers */
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APB_WRITE(DOWNLOAD_IMAGE_SIZE_REG, DOWNLOAD_ARE_YOU_HERE);
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APB_WRITE(DOWNLOAD_PUT_REG, 0);
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APB_WRITE(DOWNLOAD_GET_REG, 0);
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APB_WRITE(DOWNLOAD_STATUS_REG, DOWNLOAD_PENDING);
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APB_WRITE(DOWNLOAD_FLAGS_REG, 0);
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/* Release CPU from RESET */
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REG_READ(HIF_CONFIG_REG_ID, val32);
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val32 &= ~HIF_CONFIG_CPU_RESET_BIT;
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REG_WRITE(HIF_CONFIG_REG_ID, val32);
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/* Enable Clock */
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val32 &= ~HIF_CONFIG_CPU_CLK_DIS_BIT;
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REG_WRITE(HIF_CONFIG_REG_ID, val32);
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/* Load a firmware file */
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#ifdef USE_VFS_FIRMWARE
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firmware = xr_fileopen(fw_path, O_RDONLY, 0);
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if (!firmware) {
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xradio_dbg(XRADIO_DBG_ERROR, "%s: can't load firmware file %s.\n",
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__func__, fw_path);
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ret = -1;
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goto error;
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}
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#else
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ret = request_firmware(&firmware, fw_path, hw_priv->pdev);
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if (ret) {
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xradio_dbg(XRADIO_DBG_ERROR, "%s: can't load firmware file %s.\n",
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__func__, fw_path);
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goto error;
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}
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SYS_BUG(!firmware->data);
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#endif
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buf = xr_kmalloc(DOWNLOAD_BLOCK_SIZE, true);
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if (!buf) {
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xradio_dbg(XRADIO_DBG_ERROR,
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"%s: can't allocate firmware buffer.\n", __func__);
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ret = -ENOMEM;
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goto error;
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}
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/* Check if the bootloader is ready */
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for (i = 0; i < 100; i++ /*= 1 + i / 2*/) {
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APB_READ(DOWNLOAD_IMAGE_SIZE_REG, val32);
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if (val32 == DOWNLOAD_I_AM_HERE)
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break;
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mdelay(10);
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} /* End of for loop */
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if (val32 != DOWNLOAD_I_AM_HERE) {
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xradio_dbg(XRADIO_DBG_ERROR, "%s: bootloader is not ready.\n",
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__func__);
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ret = -ETIMEDOUT;
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goto error;
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}
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/* Calculcate number of download blocks */
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num_blocks = (firmware->size - 1) / DOWNLOAD_BLOCK_SIZE + 1;
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/* Updating the length in Download Ctrl Area */
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val32 = firmware->size; /* Explicit cast from size_t to u32 */
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APB_WRITE(DOWNLOAD_IMAGE_SIZE_REG, val32);
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/*
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* DOWNLOAD_BLOCK_SIZE must be divided exactly by sdio blocksize,
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* otherwise it may cause bootloader error.
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*/
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val32 = hw_priv->sbus_ops->get_block_size(hw_priv->sbus_priv);
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if (val32 > DOWNLOAD_BLOCK_SIZE || DOWNLOAD_BLOCK_SIZE%val32) {
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xradio_dbg(XRADIO_DBG_WARN,
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"%s:change blocksize(%d->%d) during download fw.\n",
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__func__, val32, DOWNLOAD_BLOCK_SIZE>>1);
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hw_priv->sbus_ops->lock(hw_priv->sbus_priv);
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ret = hw_priv->sbus_ops->set_block_size(hw_priv->sbus_priv,
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DOWNLOAD_BLOCK_SIZE>>1);
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if (ret)
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xradio_dbg(XRADIO_DBG_ERROR,
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"%s: set blocksize error(%d).\n", __func__, ret);
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hw_priv->sbus_ops->unlock(hw_priv->sbus_priv);
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}
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/* Firmware downloading loop */
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for (block = 0; block < num_blocks; block++) {
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size_t tx_size;
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size_t block_size;
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/* check the download status */
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APB_READ(DOWNLOAD_STATUS_REG, val32);
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if (val32 != DOWNLOAD_PENDING) {
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xradio_dbg(XRADIO_DBG_ERROR,
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"%s: bootloader reported error %d.\n",
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__func__, val32);
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ret = -EIO;
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goto error;
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}
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/* calculate the block size */
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tx_size = block_size = min((size_t)(firmware->size - put),
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(size_t)DOWNLOAD_BLOCK_SIZE);
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#ifdef USE_VFS_FIRMWARE
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ret = xr_fileread(firmware, buf, block_size);
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if (ret < block_size) {
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xradio_dbg(XRADIO_DBG_ERROR, "%s: xr_fileread error %d.\n",
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__func__, ret);
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goto error;
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}
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#else
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memcpy(buf, &firmware->data[put], block_size);
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#endif
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if (block_size < DOWNLOAD_BLOCK_SIZE) {
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memset(&buf[block_size], 0, DOWNLOAD_BLOCK_SIZE - block_size);
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tx_size = DOWNLOAD_BLOCK_SIZE;
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}
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/* loop until put - get <= 24K */
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for (i = 0; i < 100; i++) {
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APB_READ(DOWNLOAD_GET_REG, get);
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if ((put - get) <= (DOWNLOAD_FIFO_SIZE - DOWNLOAD_BLOCK_SIZE))
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|
|
break;
|
||
|
|
mdelay(i);
|
||
|
|
}
|
||
|
|
|
||
|
|
if ((put - get) > (DOWNLOAD_FIFO_SIZE - DOWNLOAD_BLOCK_SIZE)) {
|
||
|
|
xradio_dbg(XRADIO_DBG_ERROR, "%s: Timeout waiting for FIFO.\n",
|
||
|
|
__func__);
|
||
|
|
ret = -ETIMEDOUT;
|
||
|
|
goto error;
|
||
|
|
}
|
||
|
|
|
||
|
|
/* send the block to sram */
|
||
|
|
ret = xradio_apb_write(hw_priv, APB_ADDR(DOWNLOAD_FIFO_OFFSET + \
|
||
|
|
(put & (DOWNLOAD_FIFO_SIZE - 1))),
|
||
|
|
buf, tx_size);
|
||
|
|
if (ret < 0) {
|
||
|
|
xradio_dbg(XRADIO_DBG_ERROR,
|
||
|
|
"%s: can't write block at line %d.\n",
|
||
|
|
__func__, __LINE__);
|
||
|
|
goto error;
|
||
|
|
}
|
||
|
|
|
||
|
|
/* update the put register */
|
||
|
|
put += block_size;
|
||
|
|
APB_WRITE(DOWNLOAD_PUT_REG, put);
|
||
|
|
} /* End of firmware download loop */
|
||
|
|
|
||
|
|
/* Wait for the download completion */
|
||
|
|
for (i = 0; i < 300; i += 1 + i / 2) {
|
||
|
|
APB_READ(DOWNLOAD_STATUS_REG, val32);
|
||
|
|
if (val32 != DOWNLOAD_PENDING)
|
||
|
|
break;
|
||
|
|
mdelay(i);
|
||
|
|
}
|
||
|
|
if (val32 != DOWNLOAD_SUCCESS) {
|
||
|
|
xradio_dbg(XRADIO_DBG_ERROR,
|
||
|
|
"%s: wait for download completion failed. " \
|
||
|
|
"Read: 0x%.8X\n", __func__, val32);
|
||
|
|
ret = -ETIMEDOUT;
|
||
|
|
goto error;
|
||
|
|
} else {
|
||
|
|
xradio_dbg(XRADIO_DBG_ALWY, "Firmware completed.\n");
|
||
|
|
ret = 0;
|
||
|
|
}
|
||
|
|
|
||
|
|
error:
|
||
|
|
if (buf)
|
||
|
|
kfree(buf);
|
||
|
|
if (firmware) {
|
||
|
|
#ifdef USE_VFS_FIRMWARE
|
||
|
|
xr_fileclose(firmware);
|
||
|
|
#else
|
||
|
|
release_firmware(firmware);
|
||
|
|
#endif
|
||
|
|
}
|
||
|
|
return ret;
|
||
|
|
}
|
||
|
|
|
||
|
|
static int xradio_bootloader(struct xradio_common *hw_priv)
|
||
|
|
{
|
||
|
|
int ret = -1;
|
||
|
|
u32 i = 0;
|
||
|
|
const char *bl_path = XR819_BOOTLOADER;
|
||
|
|
u32 addr = AHB_MEMORY_ADDRESS;
|
||
|
|
u32 *data = NULL;
|
||
|
|
#ifdef USE_VFS_FIRMWARE
|
||
|
|
const struct xr_file *bootloader = NULL;
|
||
|
|
#else
|
||
|
|
const struct firmware *bootloader = NULL;
|
||
|
|
#endif
|
||
|
|
xradio_dbg(XRADIO_DBG_TRC, "%s\n", __func__);
|
||
|
|
|
||
|
|
#ifdef USE_VFS_FIRMWARE
|
||
|
|
bootloader = xr_request_file(bl_path);
|
||
|
|
if (!bootloader) {
|
||
|
|
xradio_dbg(XRADIO_DBG_ERROR,
|
||
|
|
"%s: can't load bootloader file %s.\n",
|
||
|
|
__func__, bl_path);
|
||
|
|
goto error;
|
||
|
|
}
|
||
|
|
#else
|
||
|
|
/* Load a bootloader file */
|
||
|
|
ret = request_firmware(&bootloader, bl_path, hw_priv->pdev);
|
||
|
|
if (ret) {
|
||
|
|
xradio_dbg(XRADIO_DBG_ERROR,
|
||
|
|
"%s: can't load bootloader file %s.\n",
|
||
|
|
__func__, bl_path);
|
||
|
|
goto error;
|
||
|
|
}
|
||
|
|
#endif
|
||
|
|
|
||
|
|
xradio_dbg(XRADIO_DBG_NIY, "%s: bootloader size = %zu, loopcount = %zu\n",
|
||
|
|
__func__, bootloader->size, (bootloader->size) / 4);
|
||
|
|
|
||
|
|
/* Down bootloader. */
|
||
|
|
data = (u32 *) bootloader->data;
|
||
|
|
for (i = 0; i < (bootloader->size) / 4; i++) {
|
||
|
|
REG_WRITE(HIF_SRAM_BASE_ADDR_REG_ID, addr);
|
||
|
|
REG_WRITE(HIF_AHB_DPORT_REG_ID, data[i]);
|
||
|
|
if (i == 100 || i == 200 || i == 300 ||
|
||
|
|
i == 400 || i == 500 || i == 600)
|
||
|
|
xradio_dbg(XRADIO_DBG_NIY,
|
||
|
|
"%s: addr = 0x%x,data = 0x%x\n",
|
||
|
|
__func__, addr, data[i]);
|
||
|
|
addr += 4;
|
||
|
|
}
|
||
|
|
xradio_dbg(XRADIO_DBG_ALWY, "Bootloader complete\n");
|
||
|
|
|
||
|
|
error:
|
||
|
|
if (bootloader) {
|
||
|
|
#ifdef USE_VFS_FIRMWARE
|
||
|
|
xr_fileclose(bootloader);
|
||
|
|
#else
|
||
|
|
release_firmware(bootloader);
|
||
|
|
#endif
|
||
|
|
}
|
||
|
|
return ret;
|
||
|
|
}
|
||
|
|
|
||
|
|
int xradio_load_firmware(struct xradio_common *hw_priv)
|
||
|
|
{
|
||
|
|
int ret;
|
||
|
|
int i;
|
||
|
|
u32 val32;
|
||
|
|
u16 val16;
|
||
|
|
u32 dpll = 0;
|
||
|
|
int major_revision;
|
||
|
|
xradio_dbg(XRADIO_DBG_TRC, "%s\n", __func__);
|
||
|
|
|
||
|
|
SYS_BUG(!hw_priv);
|
||
|
|
|
||
|
|
/* Read CONFIG Register Value - We will read 32 bits */
|
||
|
|
ret = xradio_reg_read_32(hw_priv, HIF_CONFIG_REG_ID, &val32);
|
||
|
|
if (ret < 0) {
|
||
|
|
xradio_dbg(XRADIO_DBG_ERROR,
|
||
|
|
"%s: can't read config register, err=%d.\n",
|
||
|
|
__func__, ret);
|
||
|
|
return ret;
|
||
|
|
}
|
||
|
|
/*check hardware type and revision.*/
|
||
|
|
hw_priv->hw_type = xradio_get_hw_type(val32, &major_revision);
|
||
|
|
switch (hw_priv->hw_type) {
|
||
|
|
case HIF_HW_TYPE_XRADIO:
|
||
|
|
xradio_dbg(XRADIO_DBG_NIY, "%s: HW_TYPE_XRADIO detected.\n",
|
||
|
|
__func__);
|
||
|
|
break;
|
||
|
|
default:
|
||
|
|
xradio_dbg(XRADIO_DBG_ERROR, "%s: Unknown hardware: %d.\n",
|
||
|
|
__func__, hw_priv->hw_type);
|
||
|
|
return -ENOTSUPP;
|
||
|
|
}
|
||
|
|
if (major_revision == 4) {
|
||
|
|
hw_priv->hw_revision = XR819_HW_REV0;
|
||
|
|
xradio_dbg(XRADIO_DBG_ALWY, "XRADIO_HW_REV 1.0 detected.\n");
|
||
|
|
} else {
|
||
|
|
xradio_dbg(XRADIO_DBG_ERROR, "%s: Unsupported major revision %d.\n",
|
||
|
|
__func__, major_revision);
|
||
|
|
return -ENOTSUPP;
|
||
|
|
}
|
||
|
|
|
||
|
|
/*load sdd file, and get config from it.*/
|
||
|
|
ret = xradio_parse_sdd(hw_priv, &dpll);
|
||
|
|
if (ret < 0) {
|
||
|
|
return ret;
|
||
|
|
}
|
||
|
|
|
||
|
|
/*set dpll initial value and check.*/
|
||
|
|
ret = xradio_reg_write_32(hw_priv, HIF_TSET_GEN_R_W_REG_ID, dpll);
|
||
|
|
if (ret < 0) {
|
||
|
|
xradio_dbg(XRADIO_DBG_ERROR, "%s: can't write DPLL register.\n",
|
||
|
|
__func__);
|
||
|
|
goto out;
|
||
|
|
}
|
||
|
|
msleep(5);
|
||
|
|
ret = xradio_reg_read_32(hw_priv, HIF_TSET_GEN_R_W_REG_ID, &val32);
|
||
|
|
if (ret < 0) {
|
||
|
|
xradio_dbg(XRADIO_DBG_ERROR, "%s: can't read DPLL register.\n",
|
||
|
|
__func__);
|
||
|
|
goto out;
|
||
|
|
}
|
||
|
|
if (val32 != dpll) {
|
||
|
|
xradio_dbg(XRADIO_DBG_ERROR, "%s: unable to initialise " \
|
||
|
|
"DPLL register. Wrote 0x%.8X, read 0x%.8X.\n",
|
||
|
|
__func__, dpll, val32);
|
||
|
|
ret = -EIO;
|
||
|
|
goto out;
|
||
|
|
}
|
||
|
|
|
||
|
|
/* Set wakeup bit in device */
|
||
|
|
ret = xradio_reg_read_16(hw_priv, HIF_CONTROL_REG_ID, &val16);
|
||
|
|
if (ret < 0) {
|
||
|
|
xradio_dbg(XRADIO_DBG_ERROR,
|
||
|
|
"%s: set_wakeup: can't read control register.\n",
|
||
|
|
__func__);
|
||
|
|
goto out;
|
||
|
|
}
|
||
|
|
ret = xradio_reg_write_16(hw_priv, HIF_CONTROL_REG_ID,
|
||
|
|
val16 | HIF_CTRL_WUP_BIT);
|
||
|
|
if (ret < 0) {
|
||
|
|
xradio_dbg(XRADIO_DBG_ERROR,
|
||
|
|
"%s: set_wakeup: can't write control register.\n",
|
||
|
|
__func__);
|
||
|
|
goto out;
|
||
|
|
}
|
||
|
|
|
||
|
|
/* Wait for wakeup */
|
||
|
|
for (i = 0 ; i < 300 ; i += 1 + i / 2) {
|
||
|
|
ret = xradio_reg_read_16(hw_priv, HIF_CONTROL_REG_ID, &val16);
|
||
|
|
if (ret < 0) {
|
||
|
|
xradio_dbg(XRADIO_DBG_ERROR, "%s: Wait_for_wakeup: "
|
||
|
|
"can't read control register.\n", __func__);
|
||
|
|
goto out;
|
||
|
|
}
|
||
|
|
if (val16 & HIF_CTRL_RDY_BIT) {
|
||
|
|
break;
|
||
|
|
}
|
||
|
|
msleep(i);
|
||
|
|
}
|
||
|
|
if ((val16 & HIF_CTRL_RDY_BIT) == 0) {
|
||
|
|
xradio_dbg(XRADIO_DBG_ERROR, "%s: Wait for wakeup:"
|
||
|
|
"device is not responding.\n", __func__);
|
||
|
|
ret = -ETIMEDOUT;
|
||
|
|
goto out;
|
||
|
|
} else {
|
||
|
|
xradio_dbg(XRADIO_DBG_NIY, "WLAN device is ready.\n");
|
||
|
|
}
|
||
|
|
|
||
|
|
/* Checking for access mode and download firmware. */
|
||
|
|
ret = xradio_reg_read_32(hw_priv, HIF_CONFIG_REG_ID, &val32);
|
||
|
|
if (ret < 0) {
|
||
|
|
xradio_dbg(XRADIO_DBG_ERROR, "%s: check_access_mode: "
|
||
|
|
"can't read config register.\n", __func__);
|
||
|
|
goto out;
|
||
|
|
}
|
||
|
|
if (val32 & HIF_CONFIG_ACCESS_MODE_BIT) {
|
||
|
|
/* Down bootloader. */
|
||
|
|
ret = xradio_bootloader(hw_priv);
|
||
|
|
if (ret < 0) {
|
||
|
|
xradio_dbg(XRADIO_DBG_ERROR,
|
||
|
|
"%s: can't download bootloader.\n", __func__);
|
||
|
|
goto out;
|
||
|
|
}
|
||
|
|
/* Down firmware. */
|
||
|
|
ret = xradio_firmware(hw_priv);
|
||
|
|
if (ret < 0) {
|
||
|
|
xradio_dbg(XRADIO_DBG_ERROR,
|
||
|
|
"%s: can't download firmware.\n", __func__);
|
||
|
|
goto out;
|
||
|
|
}
|
||
|
|
} else {
|
||
|
|
xradio_dbg(XRADIO_DBG_WARN, "%s: check_access_mode: "
|
||
|
|
"device is already in QUEUE mode.\n", __func__);
|
||
|
|
/* TODO: verify this branch. Do we need something to do? */
|
||
|
|
}
|
||
|
|
|
||
|
|
/* Register Interrupt Handler */
|
||
|
|
ret = hw_priv->sbus_ops->irq_subscribe(hw_priv->sbus_priv,
|
||
|
|
(sbus_irq_handler)xradio_irq_handler,
|
||
|
|
hw_priv);
|
||
|
|
if (ret < 0) {
|
||
|
|
xradio_dbg(XRADIO_DBG_ERROR, "%s: can't register IRQ handler.\n",
|
||
|
|
__func__);
|
||
|
|
goto out;
|
||
|
|
}
|
||
|
|
|
||
|
|
if (HIF_HW_TYPE_XRADIO == hw_priv->hw_type) {
|
||
|
|
/* If device is XRADIO the IRQ enable/disable bits
|
||
|
|
* are in CONFIG register */
|
||
|
|
ret = xradio_reg_read_32(hw_priv, HIF_CONFIG_REG_ID, &val32);
|
||
|
|
if (ret < 0) {
|
||
|
|
xradio_dbg(XRADIO_DBG_ERROR, "%s: enable_irq: can't read " \
|
||
|
|
"config register.\n", __func__);
|
||
|
|
goto unsubscribe;
|
||
|
|
}
|
||
|
|
ret = xradio_reg_write_32(hw_priv, HIF_CONFIG_REG_ID,
|
||
|
|
val32 | HIF_CONF_IRQ_RDY_ENABLE);
|
||
|
|
if (ret < 0) {
|
||
|
|
xradio_dbg(XRADIO_DBG_ERROR, "%s: enable_irq: can't write " \
|
||
|
|
"config register.\n", __func__);
|
||
|
|
goto unsubscribe;
|
||
|
|
}
|
||
|
|
} else {
|
||
|
|
/* If device is XRADIO the IRQ enable/disable bits
|
||
|
|
* are in CONTROL register */
|
||
|
|
/* Enable device interrupts - Both DATA_RDY and WLAN_RDY */
|
||
|
|
ret = xradio_reg_read_16(hw_priv, HIF_CONFIG_REG_ID, &val16);
|
||
|
|
if (ret < 0) {
|
||
|
|
xradio_dbg(XRADIO_DBG_ERROR, "%s: enable_irq: can't read " \
|
||
|
|
"control register.\n", __func__);
|
||
|
|
goto unsubscribe;
|
||
|
|
}
|
||
|
|
ret = xradio_reg_write_16(hw_priv, HIF_CONFIG_REG_ID,
|
||
|
|
val16 | HIF_CTRL_IRQ_RDY_ENABLE);
|
||
|
|
if (ret < 0) {
|
||
|
|
xradio_dbg(XRADIO_DBG_ERROR, "%s: enable_irq: can't write " \
|
||
|
|
"control register.\n", __func__);
|
||
|
|
goto unsubscribe;
|
||
|
|
}
|
||
|
|
|
||
|
|
}
|
||
|
|
|
||
|
|
/* Configure device for MESSSAGE MODE */
|
||
|
|
ret = xradio_reg_read_32(hw_priv, HIF_CONFIG_REG_ID, &val32);
|
||
|
|
if (ret < 0) {
|
||
|
|
xradio_dbg(XRADIO_DBG_ERROR,
|
||
|
|
"%s: set_mode: can't read config register.\n",
|
||
|
|
__func__);
|
||
|
|
goto unsubscribe;
|
||
|
|
}
|
||
|
|
ret = xradio_reg_write_32(hw_priv, HIF_CONFIG_REG_ID,
|
||
|
|
val32 & ~HIF_CONFIG_ACCESS_MODE_BIT);
|
||
|
|
if (ret < 0) {
|
||
|
|
xradio_dbg(XRADIO_DBG_ERROR,
|
||
|
|
"%s: set_mode: can't write config register.\n",
|
||
|
|
__func__);
|
||
|
|
goto unsubscribe;
|
||
|
|
}
|
||
|
|
|
||
|
|
/* Unless we read the CONFIG Register we are
|
||
|
|
* not able to get an interrupt */
|
||
|
|
mdelay(10);
|
||
|
|
xradio_reg_read_32(hw_priv, HIF_CONFIG_REG_ID, &val32);
|
||
|
|
return 0;
|
||
|
|
|
||
|
|
unsubscribe:
|
||
|
|
hw_priv->sbus_ops->irq_unsubscribe(hw_priv->sbus_priv);
|
||
|
|
out:
|
||
|
|
if (hw_priv->sdd) {
|
||
|
|
#ifdef USE_VFS_FIRMWARE
|
||
|
|
xr_fileclose(hw_priv->sdd);
|
||
|
|
#else
|
||
|
|
release_firmware(hw_priv->sdd);
|
||
|
|
#endif
|
||
|
|
hw_priv->sdd = NULL;
|
||
|
|
}
|
||
|
|
return ret;
|
||
|
|
}
|
||
|
|
|
||
|
|
int xradio_dev_deinit(struct xradio_common *hw_priv)
|
||
|
|
{
|
||
|
|
hw_priv->sbus_ops->irq_unsubscribe(hw_priv->sbus_priv);
|
||
|
|
if (hw_priv->sdd) {
|
||
|
|
#ifdef USE_VFS_FIRMWARE
|
||
|
|
xr_fileclose(hw_priv->sdd);
|
||
|
|
#else
|
||
|
|
release_firmware(hw_priv->sdd);
|
||
|
|
#endif
|
||
|
|
hw_priv->sdd = NULL;
|
||
|
|
}
|
||
|
|
return 0;
|
||
|
|
}
|
||
|
|
|
||
|
|
#undef APB_WRITE
|
||
|
|
#undef APB_READ
|
||
|
|
#undef REG_WRITE
|
||
|
|
#undef REG_READ
|