472 lines
12 KiB
C
472 lines
12 KiB
C
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#include "nand_blk.h"
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#include "nand_dev.h"
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/*****************************************************************************/
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extern struct nand_blk_ops mytr;
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extern struct _nand_info *p_nand_info;
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extern int init_blklayer(void);
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extern int init_blklayer_for_dragonboard(void);
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extern void exit_blklayer(void);
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extern void set_cache_level(struct _nand_info *nand_info,
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unsigned short cache_level);
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extern void set_capacity_level(struct _nand_info *nand_info,
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unsigned short capacity_level);
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extern __u32 nand_wait_rb_mode(void);
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extern __u32 nand_wait_dma_mode(void);
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extern void do_nand_interrupt(unsigned int no);
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extern void print_nftl_zone(void *zone);
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extern int nand_before_shutdown(void *zone);
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extern int NAND_get_storagetype(void);
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extern int NAND_Get_Dragonboard_Flag(void);
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extern int nand_thread(void *arg);
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extern int NAND_CheckBoot(void);
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int test_mbr(uchar *data);
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extern int NAND_Print_DBG(const char *fmt, ...);
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extern __u32 NAND_GetMaxChannelCnt(void);
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#define BLK_ERR_MSG_ON
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static unsigned int channel0;
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void *NDFC0_BASE_ADDR;
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void *NDFC1_BASE_ADDR;
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struct device *ndfc_dev;
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struct platform_device *plat_dev_nand;
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__u32 exit_probe_flag;
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/*****************************************************************************
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*Name :
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*Description :
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*Parameter :
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*Return :
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*Note :
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*****************************************************************************/
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spinlock_t nand_int_lock;
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static irqreturn_t nand_interrupt(int irq, void *channel)
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{
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unsigned int no;
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unsigned long iflags;
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spin_lock_irqsave(&nand_int_lock, iflags);
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no = *((unsigned int *)channel);
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do_nand_interrupt(no);
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spin_unlock_irqrestore(&nand_int_lock, iflags);
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return IRQ_HANDLED;
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}
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#if 0
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/*****************************************************************************
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*Name :
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*Description :
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*Parameter :
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*Return :
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*Note :
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*****************************************************************************/
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static int nand_early_suspend(void)
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{
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struct _nftl_blk *nftl_blk;
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struct nand_blk_ops *tr = &mytr;
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nftl_blk = tr->nftl_blk_head.nftl_blk_next;
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nand_dbg_err("nand_early_suspend\n");
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while (nftl_blk != NULL) {
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nand_dbg_err("nand\n");
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mutex_lock(nftl_blk->blk_lock);
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nftl_blk->flush_write_cache(nftl_blk, 0xffff);
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mutex_unlock(nftl_blk->blk_lock);
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nftl_blk = nftl_blk->nftl_blk_next;
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}
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return 0;
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}
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/*****************************************************************************
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*Name :
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*Description :
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*Parameter :
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*Return :
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*Note :
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*****************************************************************************/
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static int nand_early_resume(void)
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{
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nand_dbg_err("nand_early_resume\n");
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return 0;
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}
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#endif
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/*****************************************************************************
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*Name :
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*Description :
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*Parameter :
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*Return :
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*Note :
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*****************************************************************************/
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extern int nand_clean_zone_table(void *p);
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static int nand_suspend(struct platform_device *plat_dev, pm_message_t state)
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{
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#if 0
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if (NORMAL_STANDBY == standby_type) {
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nand_dbg_err("[NAND] nand_suspend normal\n");
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NandHwNormalStandby();
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} else if (SUPER_STANDBY == standby_type) {
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nand_dbg_err("[NAND] nand_suspend super\n");
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NandHwSuperStandby();
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}
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nand_dbg_err("[NAND] nand_suspend ok\n");
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#else
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nand_dbg_err("[NAND] nand_suspend\n");
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NandHwSuperStandby();
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nand_dbg_err("[NAND] nand_suspend ok\n");
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#endif
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return 0;
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}
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/*****************************************************************************
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*Name :
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*Description :
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*Parameter :
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*Return :
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*Note :
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*****************************************************************************/
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extern int nand_find_zone_table(void *p);
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static int nand_resume(struct platform_device *plat_dev)
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{
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#if 0
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if (NORMAL_STANDBY == standby_type) {
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nand_dbg_err("[NAND] nand_resume normal\n");
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NandHwNormalResume();
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} else if (SUPER_STANDBY == standby_type) {
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nand_dbg_err("[NAND] nand_resume super\n");
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NandHwSuperResume();
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}
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nand_dbg_err("[NAND] nand_resume ok\n");
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#else
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nand_dbg_err("[NAND] nand_resume\n");
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NandHwSuperResume();
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nand_dbg_err("[NAND] nand_resume ok\n");
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#endif
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return 0;
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}
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/*****************************************************************************
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*Name :
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*Description :
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*Parameter :
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*Return :
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*Note :
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*****************************************************************************/
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u64 nand_dma_mask = DMA_BIT_MASK(32);
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static int nand_probe(struct platform_device *plat_dev)
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{
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__u32 irq;
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char *dev_name = "nand_dev";
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plat_dev_nand = plat_dev;
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ndfc_dev = &plat_dev->dev;
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plat_dev->dev.dma_mask = &nand_dma_mask;
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plat_dev->dev.coherent_dma_mask = DMA_BIT_MASK(32);
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spin_lock_init(&nand_int_lock);
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if ((nand_wait_rb_mode() != 0) || (nand_wait_dma_mode() != 0)) {
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nand_dbg_err("nand interrupt request\n");
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irq = irq_of_parse_and_map(ndfc_dev->of_node, 0);
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if (request_irq
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(irq, nand_interrupt, 0, dev_name, &channel0)) {
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nand_dbg_err
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("nand interrupte ch0 irqno: %d register error\n",
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irq);
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return -EAGAIN;
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}
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}
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if (NAND_GetMaxChannelCnt() == 1) {
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NDFC0_BASE_ADDR = (void *)of_iomap(ndfc_dev->of_node, 0);
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nand_dbg_err("NDFC0_BASE_ADDR %p\n", NDFC0_BASE_ADDR);
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if (!NDFC0_BASE_ADDR) {
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nand_dbg_err("Failed to map NDFC0 IO space\n");
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return -EAGAIN;
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}
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} else if (NAND_GetMaxChannelCnt() == 2) {
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NDFC0_BASE_ADDR = (void *)of_iomap(ndfc_dev->of_node, 0);
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if (!NDFC0_BASE_ADDR) {
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nand_dbg_err("Failed to map NDFC0 IO space\n");
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return -EAGAIN;
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}
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NDFC1_BASE_ADDR = (void *)of_iomap(ndfc_dev->of_node, 1);
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if (!NDFC1_BASE_ADDR) {
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nand_dbg_err("Failed to map NDFC1 IO space\n");
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return -EAGAIN;
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}
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}
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exit_probe_flag = 1;
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nand_dbg_inf("nand_probe\n");
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return 0;
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}
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/*****************************************************************************
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*Name :
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*Description :
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*Parameter :
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*Return :
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*Note :
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*****************************************************************************/
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static int nand_remove(struct platform_device *plat_dev)
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{
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nand_dbg_inf("nand_remove\n");
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return 0;
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}
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static void nand_release_dev(struct device *dev)
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{
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nand_dbg_inf("nand_release dev\n");
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return;
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}
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/*****************************************************************************
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*Name :
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*Description :
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*Parameter :
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*Return :
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*Note :
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*****************************************************************************/
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uint32 shutdown_flush_write_cache(void)
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{
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struct _nftl_blk *nftl_blk;
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struct nand_blk_ops *tr = &mytr;
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nftl_blk = tr->nftl_blk_head.nftl_blk_next;
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while (nftl_blk != NULL) {
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nand_dbg_err("shutdown_flush_write_cache\n");
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mutex_lock(nftl_blk->blk_lock);
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nftl_blk->flush_write_cache(nftl_blk, 0xffff);
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print_nftl_zone(nftl_blk->nftl_zone);
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nand_before_shutdown(nftl_blk->nftl_zone);
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nftl_blk = nftl_blk->nftl_blk_next;
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}
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return 0;
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}
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/*****************************************************************************
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*Name :
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*Description :
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*Parameter :
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*Return :
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*Note :
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*****************************************************************************/
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void nand_shutdown(struct platform_device *plat_dev)
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{
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#if 0
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struct nand_blk_dev *dev;
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struct nand_blk_ops *tr = &mytr;
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nand_dbg_err("[NAND]shutdown first\n");
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list_for_each_entry(dev, &tr->devs, list) {
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while (blk_fetch_request(dev->rq) != NULL) {
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nand_dbg_err("nand_shutdown wait dev %d\n",
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dev->devnum);
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set_current_state(TASK_INTERRUPTIBLE);
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schedule_timeout(HZ>>3);
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}
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}
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nand_dbg_err("[NAND]shutdown second\n");
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list_for_each_entry(dev, &tr->devs, list) {
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while (blk_fetch_request(dev->rq) != NULL) {
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nand_dbg_err("nand_shutdown wait dev %d\n",
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dev->devnum);
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set_current_state(TASK_INTERRUPTIBLE);
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schedule_timeout(HZ>>3);
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}
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}
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#endif
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shutdown_flush_write_cache();
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NandHwShutDown();
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nand_dbg_err("[NAND]shutdown end\n");
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}
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/*****************************************************************************
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*Name :
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*Description :
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*Parameter :
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*Return :
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*Note :
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*****************************************************************************/
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static const struct of_device_id of_nand_id = { .compatible = "allwinner,sun50i-nand", };
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static struct platform_driver nand_driver = {
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.probe = nand_probe,
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.remove = nand_remove,
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.shutdown = nand_shutdown,
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.suspend = nand_suspend,
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.resume = nand_resume,
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.driver = {
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.name = "sw_nand",
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.owner = THIS_MODULE,
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.of_match_table = &of_nand_id,
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}
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};
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static struct resource flash_resource = {
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.start = 0,
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.end = 1,
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.flags = 0x1,
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};
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static struct platform_device nand_device = {
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.name = "sw_nand",
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.id = 33,
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.resource = &flash_resource,
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.num_resources = 1,
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.dev = {
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.release = nand_release_dev,
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}
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};
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/*****************************************************************************
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*Name :
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*Description :
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*Parameter :
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*Return :
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*Note :
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*****************************************************************************/
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int __init nand_init(void)
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{
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int ret;
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int nand_cache_level = 0;
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int nand_capacity_level = 0;
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int nand_flush_cache_num = 8;
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int dragonboard_flag = 0;
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uchar *data = kmalloc(0x400, GFP_KERNEL);
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exit_probe_flag = 0;
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platform_driver_register(&nand_driver);
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if (exit_probe_flag == 0) {
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nand_dbg_err("Failed to insmod nand!!!\n");
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if (data != NULL)
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kfree(data);
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return 0;
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}
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ret = of_property_read_u32(ndfc_dev->of_node, "nand0_cache_level",
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&nand_cache_level);
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if (ret) {
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nand_dbg_err("Failed to get nand0_cache_level\n");
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nand_cache_level = 0;
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} else {
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if (nand_cache_level == 0x55aaaa55) {
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nand_dbg_err("nand0_cache_level is no used\n");
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nand_cache_level = 0;
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}
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}
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ret = of_property_read_u32(ndfc_dev->of_node, "nand0_flush_cache_num",
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&nand_flush_cache_num);
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||
|
|
if (ret) {
|
||
|
|
nand_dbg_err("Failed to get nand_flush_cache_num\n");
|
||
|
|
nand_flush_cache_num = 8;
|
||
|
|
} else {
|
||
|
|
if (nand_flush_cache_num == 0x55aaaa55) {
|
||
|
|
nand_dbg_err("nand_flush_cache_num is no used\n");
|
||
|
|
nand_flush_cache_num = 8;
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
ret = of_property_read_u32(ndfc_dev->of_node, "nand0_capacity_level",
|
||
|
|
&nand_capacity_level);
|
||
|
|
if (ret) {
|
||
|
|
nand_dbg_err("Failed to get nand_capacity_level\n");
|
||
|
|
nand_capacity_level = 0;
|
||
|
|
} else {
|
||
|
|
if (nand_capacity_level == 0x55aaaa55) {
|
||
|
|
nand_dbg_err("nand_capacity_level is no used\n");
|
||
|
|
nand_capacity_level = 0;
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
|
||
|
|
dragonboard_flag = NAND_Get_Dragonboard_Flag();
|
||
|
|
|
||
|
|
if (0 == dragonboard_flag) {
|
||
|
|
nand_dbg_err("nand init start\n");
|
||
|
|
|
||
|
|
p_nand_info = NandHwInit();
|
||
|
|
if (p_nand_info == NULL) {
|
||
|
|
kfree(data);
|
||
|
|
return -EAGAIN;
|
||
|
|
}
|
||
|
|
|
||
|
|
set_cache_level(p_nand_info, nand_cache_level);
|
||
|
|
set_capacity_level(p_nand_info, nand_capacity_level);
|
||
|
|
ret = nand_info_init(p_nand_info, 0, 8, NULL);
|
||
|
|
kfree(data);
|
||
|
|
if (ret != 0) {
|
||
|
|
nand_dbg_err("nand_info_init error\n");
|
||
|
|
return ret;
|
||
|
|
}
|
||
|
|
|
||
|
|
if (NAND_CheckBoot() != 0) {
|
||
|
|
nand_dbg_err("nand CheckBoot error\n");
|
||
|
|
}
|
||
|
|
|
||
|
|
init_blklayer();
|
||
|
|
} else {
|
||
|
|
nand_dbg_err
|
||
|
|
("dragonboard_flag=%d,run nand test for dragonboard\n",
|
||
|
|
dragonboard_flag);
|
||
|
|
init_blklayer_for_dragonboard();
|
||
|
|
return 0;
|
||
|
|
}
|
||
|
|
|
||
|
|
kthread_run(nand_thread, &mytr, "%sd", "nand_rc");
|
||
|
|
|
||
|
|
nand_dbg_err("nand init end\n");
|
||
|
|
return 0;
|
||
|
|
}
|
||
|
|
|
||
|
|
/*****************************************************************************
|
||
|
|
*Name :
|
||
|
|
*Description :
|
||
|
|
*Parameter :
|
||
|
|
*Return :
|
||
|
|
*Note :
|
||
|
|
*****************************************************************************/
|
||
|
|
void __exit nand_exit(void)
|
||
|
|
{
|
||
|
|
|
||
|
|
exit_blklayer();
|
||
|
|
|
||
|
|
platform_device_unregister(&nand_device);
|
||
|
|
|
||
|
|
#if 0
|
||
|
|
#ifdef CONFIG_HAS_EARLYSUSPEND
|
||
|
|
unregister_early_suspend(&early_suspend);
|
||
|
|
#endif
|
||
|
|
#endif
|
||
|
|
}
|
||
|
|
|
||
|
|
MODULE_LICENSE("GPL");
|
||
|
|
MODULE_AUTHOR("nand flash groups");
|
||
|
|
MODULE_DESCRIPTION("Generic NAND flash driver code");
|