93 lines
3.4 KiB
C
93 lines
3.4 KiB
C
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/*
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************************************************************************************************************************
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* eGON
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* the Embedded GO-ON Bootloader System
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*
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* Copyright(C), 2006-2008, SoftWinners Microelectronic Co., Ltd.
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* All Rights Reserved
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*
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* File Name : boot0.h
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*
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* Author : Gary.Wang
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*
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* Version : 1.1.0
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*
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* Date : 2009.05.21
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*
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* Description :
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*
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* Others : None at present.
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*
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*
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* History :
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*
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* <Author> <time> <version> <description>
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*
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* Gary.Wang 2009.05.21 1.1.0 build the file
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*
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************************************************************************************************************************
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*/
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#ifndef __boot0_v2_h
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#define __boot0_v2_h
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#include "type_def.h"
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#include "gpio.h"
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#define SYS_PARA_LOG 0x4d415244
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#define SUNXI_DRAM_PARA_MAX 32
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#define BOOT0_MAGIC "eGON.BT0"
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#define STAMP_VALUE 0x5F0A6C39
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#define BOOT_PUB_HEAD_VERSION "1100" // X.X.XX
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#define EGON_VERSION "1100" // X.X.XX
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typedef struct standard_Boot_file_head
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{
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__u32 jump_instruction; // one intruction jumping to real code
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__u8 magic[8]; // ="eGON.BT0" or "eGON.BT1", not C-style string.
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__u32 check_sum; // generated by PC
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__u32 length; // generated by PC
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__u32 pub_head_size; // the size of boot_file_head_t
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__u8 pub_head_vsn[4]; // the version of boot_file_head_t
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__u32 ret_addr; // the return value
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__u32 run_addr; // run addr
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__u8 eGON_vsn[4]; // eGON version
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__u8 platform[8]; // platform information
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}standard_boot_file_head_t;
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/******************************************************************************/
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/* file head of Boot0 */
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/******************************************************************************/
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typedef struct _boot0_private_head_t
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{
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__u32 prvt_head_size;
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__u8 debug_mode; //debug_mode = 0 : do not print any message,debug_mode = 1 ,print debug message
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__u8 power_mode; /*0:dummy pmu , 1: axp */
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simple_gpio_cfg pwr_simple_gpio; // PWR GPIO,two bytes
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unsigned int dram_para[32]; // DRAM patameters for initialising dram. Original values is arbitrary,
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__s32 uart_port; // UART<52><54><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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normal_gpio_cfg uart_ctrl[2]; // UART<52><54><EFBFBD><EFBFBD><EFBFBD><EFBFBD>(<28><><EFBFBD>Դ<EFBFBD>ӡ<EFBFBD><D3A1>)<29><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ
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__s32 enable_jtag; // 1 : enable, 0 : disable
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normal_gpio_cfg jtag_gpio[5]; // <20><><EFBFBD><EFBFBD>JTAG<41><47>ȫ<EFBFBD><C8AB>GPIO<49><4F>Ϣ
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normal_gpio_cfg storage_gpio[32]; // <20>洢<EFBFBD>豸 GPIO<49><4F>Ϣ
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char storage_data[512 - sizeof(normal_gpio_cfg) * 32]; // <20>û<EFBFBD><C3BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ
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//boot_nand_connect_info_t nand_connect_info;
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}boot0_private_head_t;
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typedef struct _boot0_file_head_t
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{
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standard_boot_file_head_t boot_head;
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boot0_private_head_t prvt_head;
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}boot0_file_head_t;
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#endif // ifndef __boot0_h
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/* end of boot0.h */
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