125 lines
4.8 KiB
C
125 lines
4.8 KiB
C
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/*
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* Copyright (c) 2014, ARM Limited and Contributors. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* Redistributions of source code must retain the above copyright notice, this
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* list of conditions and the following disclaimer.
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*
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* Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* Neither the name of ARM nor the names of its contributors may be used
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* to endorse or promote products derived from this software without specific
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* prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*-------------------------------------------------------------------------------
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| ATF | (atf&scp)share | Trusted OS | Linux |
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----------------------------------------------------------------------------------
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| 1M | 1M | 14M | other |
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----------------------------------------------------------------------------------*/
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#ifndef __SUNXI_DEF_H__
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#define __SUNXI_DEF_H__
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#include "sun50iw2p1.h"
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/* Firmware Image Package */
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#define FIP_IMAGE_NAME "fip.bin"
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#define SUNXI_PRIMARY_CPU 0x0
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/* Memory location options for Shared data and TSP in sunxi */
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#define SUNXI_IN_TRUSTED_SRAM 0
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#define SUNXI_IN_TRUSTED_DRAM 1
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/*******************************************************************************
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* sunxi memory map related constants
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******************************************************************************/
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#define SUNXI_MAX_DRAM_SIZE (2ull<<30) /*2G*/
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//monitor area(atf+scp)
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#define SUNXI_TRUSTED_MONITOR_BASE 0x40000000
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#define SUNXI_TRUSTED_MONITOR_SIZE (2<<20) //2MB
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//sec os area
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#define SUNXI_TRUSTED_DRAM_BASE 0x40200000
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#define SUNXI_TRUSTED_DRAM_SIZE (14<<20) //14 MB
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//monitor area + sec os area
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#define SUNXI_TRUSTED_RAM_SIZE 0x01000000 //total 16M
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//atf code limit
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#define SUNXI_TRUSTED_MONITOR_LIMIT (SUNXI_TRUSTED_MONITOR_BASE + (1<<20)) //1M
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/* 2M shared memory */
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#define SUNXI_SHARED_RAM_SIZE 0x200000
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/* Shared memory at the base of Trusted DRAM */
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#define SUNXI_SHARED_RAM_BASE SUNXI_TRUSTED_DRAM_BASE
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#define DRAM1_BASE 0x40000000ull
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#define DRAM1_SIZE 0x40000000ull //1G
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#define DRAM1_END (DRAM1_BASE + DRAM1_SIZE - 1)
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#define DRAM1_SEC_SIZE 0x01000000ull
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#define DRAM_BASE DRAM1_BASE
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#define DRAM_SIZE DRAM1_SIZE
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#define MEMRES_BASE SUNXI_TRUSTED_MONITOR_LIMIT //0x40100000
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#define MEMRES_SIZE 0x100000 //1M
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/* Load address of BL33 in the sunxi */
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#define NS_IMAGE_OFFSET (DRAM1_BASE + 0xA000000) /* DRAM + 128MB */
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/* Special value used to verify platform parameters from BL2 to BL3-1 */
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#define SUNXI_BL31_PLAT_PARAM_VAL 0x12345678 //0x0f1e2d3c4b5a6978ULL
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/*******************************************************************************
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* PL011 related constants
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******************************************************************************/
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#define UART0_BAUDRATE 115200
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#define UART0_CLK_IN_HZ 24000000
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/*******************************************************************************
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* Shared Data
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******************************************************************************/
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/* Entrypoint mailboxes */
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#define TRUSTED_MAILBOXES_BASE SUNXI_SHARED_RAM_BASE
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#define TRUSTED_MAILBOXES_SIZE 0x200
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#define TRUSTED_MAILBOX_SHIFT 4
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/* Base address where parameters to BL31 are stored */
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#define PARAMS_BASE (TRUSTED_MAILBOXES_BASE + TRUSTED_MAILBOXES_SIZE)
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#define MHU_SECURE_BASE 0x10000
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#define MHU_SECURE_SIZE 0x1000
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#define MHU_PAYLOAD_CACHED 0
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#endif /* __SUNXI_DEF_H__ */
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