416 lines
11 KiB
C
416 lines
11 KiB
C
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/*
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* sound\soc\sunxi\audiocodec\sun8iw8_sndcodec.h
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* (C) Copyright 2010-2016
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* Reuuimlla Technology Co., Ltd. <www.reuuimllatech.com>
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* liushaohua <liushaohua@allwinnertech.com>
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*
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* some simple description for this code
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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*/
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#ifndef _SUN8IW8_CODEC_H
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#define _SUN8IW8_CODEC_H
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#include <mach/platform.h>
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/*Codec Register*/
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#define baseaddr SUNXI_AUDIO_VBASE
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#define CODEC_BASSADDRESS 0x01c22c00
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#define SUNXI_DAC_DPC (0x00)
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#define SUNXI_DAC_FIFOC (0x04)
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#define SUNXI_DAC_FIFOS (0x08)
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#define SUNXI_ADC_FIFOC (0x10)
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#define SUNXI_ADC_FIFOS (0x14)
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#define SUNXI_ADC_RXDATA (0x18)
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#define SUNXI_DAC_TXDATA (0x20)
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#define SUNXI_DAC_CNT (0x40)
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#define SUNXI_ADC_CNT (0x44)
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#define SUNXI_DAC_DEBUG (0x48)
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#define SUNXI_ADC_DEBUG (0x4c)
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#define SUNXI_DAC_DAP_CTR (0X60)
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#define SUNXI_ADC_DAP_CTR (0X70)
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#define SUNXI_ADC_DAP_LCTR (0X74)
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#define SUNXI_ADC_DAP_RCTR (0X78)
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#define SUNXI_ADC_DAP_PARA (0X7C)
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#define SUNXI_ADC_DAP_LAC (0X80)
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#define SUNXI_ADC_DAP_LDAT (0X84)
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#define SUNXI_ADC_DAP_RAC (0X88)
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#define SUNXI_ADC_DAP_RDAT (0X8C)
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#define SUNXI_ADC_DAP_HPFC (0X90)
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#define SUNXI_ADC_DAP_LINAC (0X94)
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#define SUNXI_ADC_DAP_RNAC (0X98)
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#define SUNXI_ADC_DAP_OPT (0X9C)
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#define SUNXI_DAC_DRC_HHPFC (0X100)
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#define SUNXI_DAC_DRC_LHPFC (0X104)
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#define SUNXI_DAC_DRC_CTRL (0X108)
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#define SUNXI_DAC_DRC_LPFHAT (0X10C)
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#define SUNXI_DAC_DRC_LPFLAT (0X110)
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#define SUNXI_DAC_DRC_RPFHAT (0X114)
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#define SUNXI_DAC_DRC_RPFLAT (0X118)
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#define SUNXI_DAC_DRC_LPFHRT (0X11C)
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#define SUNXI_DAC_DRC_LPFLRT (0X120)
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#define SUNXI_DAC_DRC_RPFHRT (0X124)
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#define SUNXI_DAC_DRC_RPFLRT (0X128)
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#define SUNXI_DAC_DRC_LRMSHAT (0X12C)
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#define SUNXI_DAC_DRC_LRMSLAT (0X130)
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#define SUNXI_DAC_DRC_RRMSHAT (0X134)
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#define SUNXI_DAC_DRC_RRMSLAT (0X138)
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#define SUNXI_DAC_DRC_HCT (0X13C)
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#define SUNXI_DAC_DRC_LCT (0X140)
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#define SUNXI_DAC_DRC_HKC (0X144)
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#define SUNXI_DAC_DRC_LKC (0X148)
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#define SUNXI_DAC_DRC_HOPC (0X14C)
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#define SUNXI_DAC_DRC_LOPC (0X150)
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#define SUNXI_DAC_DRC_HLT (0X154)
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#define SUNXI_DAC_DRC_LLT (0X158)
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#define SUNXI_DAC_DRC_HKI (0X15C)
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#define SUNXI_DAC_DRC_LKI (0X160)
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#define SUNXI_DAC_DRC_HOPL (0X164)
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#define SUNXI_DAC_DRC_LOPL (0X168)
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#define SUNXI_DAC_DRC_HET (0X16C)
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#define SUNXI_DAC_DRC_LET (0X170)
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#define SUNXI_DAC_DRC_HKE (0X174)
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#define SUNXI_DAC_DRC_LKE (0X178)
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#define SUNXI_DAC_DRC_HOPE (0X17C)
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#define SUNXI_DAC_DRC_LOPE (0X180)
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#define SUNXI_DAC_DRC_HKN (0X184)
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#define SUNXI_DAC_DRC_LKN (0X188)
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#define SUNXI_DAC_DRC_SFHAT (0X18C)
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#define SUNXI_DAC_DRC_SFLAT (0X190)
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#define SUNXI_DAC_DRC_SFHRT (0X194)
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#define SUNXI_DAC_DRC_SFLRT (0X198)
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#define SUNXI_DAC_DRC_MXGHS (0X19C)
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#define SUNXI_DAC_DRC_MXGLS (0X1A0)
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#define SUNXI_DAC_DRC_MNGHS (0X1A4)
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#define SUNXI_DAC_DRC_MNGLS (0X1A8)
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#define SUNXI_DAC_DRC_EPSHC (0X1AC)
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#define SUNXI_DAC_DRC_EPSLC (0X1B0)
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#define SUNXI_DAC_DRC_OPT (0X1B4)
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#define SUNXI_DAC_HPF_HG (0x1B8)
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#define SUNXI_DAC_HPF_LG (0x1BC)
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#define SUNXI_ADC_DRC_HHPFC (0X200)
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#define SUNXI_ADC_DRC_LHPFC (0X204)
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#define SUNXI_ADC_DRC_CTRL (0X208)
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#define SUNXI_ADC_DRC_LPFHAT (0X20C)
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#define SUNXI_ADC_DRC_LPFLAT (0X210)
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#define SUNXI_ADC_DRC_RPFHAT (0X214)
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#define SUNXI_ADC_DRC_RPFLAT (0X218)
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#define SUNXI_ADC_DRC_LPFHRT (0X21C)
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#define SUNXI_ADC_DRC_LPFLRT (0X220)
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#define SUNXI_ADC_DRC_RPFHRT (0X224)
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#define SUNXI_ADC_DRC_RPFLRT (0X228)
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#define SUNXI_ADC_DRC_LRMSHAT (0X22C)
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#define SUNXI_ADC_DRC_LRMSLAT (0X230)
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#define SUNXI_ADC_DRC_RRMSHAT (0X234)
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#define SUNXI_ADC_DRC_RRMSLAT (0X238)
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#define SUNXI_ADC_DRC_HCT (0X23C)
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#define SUNXI_ADC_DRC_LCT (0X240)
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#define SUNXI_ADC_DRC_HKC (0X244)
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#define SUNXI_ADC_DRC_LKC (0X248)
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#define SUNXI_ADC_DRC_HOPC (0X24C)
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#define SUNXI_ADC_DRC_LOPC (0X250)
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#define SUNXI_ADC_DRC_HLT (0X254)
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#define SUNXI_ADC_DRC_LLT (0X258)
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#define SUNXI_ADC_DRC_HKI (0X25C)
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#define SUNXI_ADC_DRC_LKI (0X260)
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#define SUNXI_ADC_DRC_HOPL (0X264)
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#define SUNXI_ADC_DRC_LOPL (0X268)
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#define SUNXI_ADC_DRC_HET (0X26C)
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#define SUNXI_ADC_DRC_LET (0X270)
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#define SUNXI_ADC_DRC_HKE (0X274)
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#define SUNXI_ADC_DRC_LKE (0X278)
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#define SUNXI_ADC_DRC_HOPE (0X27C)
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#define SUNXI_ADC_DRC_LOPE (0X280)
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#define SUNXI_ADC_DRC_HKN (0X284)
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#define SUNXI_ADC_DRC_LKN (0X288)
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#define SUNXI_ADC_DRC_SFHAT (0X28C)
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#define SUNXI_ADC_DRC_SFLAT (0X290)
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#define SUNXI_ADC_DRC_SFHRT (0X294)
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#define SUNXI_ADC_DRC_SFLRT (0X298)
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#define SUNXI_ADC_DRC_MXGHS (0X29C)
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#define SUNXI_ADC_DRC_MXGLS (0X2A0)
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#define SUNXI_ADC_DRC_MNGHS (0X2A4)
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#define SUNXI_ADC_DRC_MNGLS (0X2A8)
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#define SUNXI_ADC_DRC_EPSHC (0X2AC)
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#define SUNXI_ADC_DRC_EPSLC (0X2B0)
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#define SUNXI_ADC_DRC_OPT (0X2B4)
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#define SUNXI_ADC_HPF_HG (0x2B8)
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#define SUNXI_ADC_HPF_LG (0x2BC)
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/*DAC Digital Part Control Register
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* codecbase+0x00
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*/
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#define DAC_EN (31)
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#define DIGITAL_VOL (12)
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/*DAC FIFO Control Register
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* codecbase+0x04
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*/
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#define DAC_FS (29)
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#define FIR_VERSION (28)
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#define LAST_SE (26)
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#define TX_FIFO_MODE (24)
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#define DRA_LEVEL (21)
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#define TX_TRI_LEVEL (8)
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#define ADDA_LOOP_EN (7)
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#define DAC_MONO_EN (6)
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#define TASR (5)
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#define DAC_DRQ (4)
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#define DAC_FIFO_FLUSH (0)
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/*ADC FIFO Control Register
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* codecbase+0x10
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*/
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#define ADFS (29)
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#define ADC_EN (28)
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#define ADC_DIG_MIC_EN (27)
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#define RX_FIFO_MODE (24)
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#define ADCFDT (17)
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#define ADCDFEN (16)
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#define RX_TRI_LEVEL (8)
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#define ADC_MONO_EN (7)
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#define RASR (6)
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#define ADC_DRQ (4)
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#define ADC_FIFO_FLUSH (0)
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/*DAC Debug Register
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* codecbase+0x48
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*/
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#define DAC_MODU_SELECT (11)
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#define DAC_PATTERN_SELECT (9)
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#define DAC_SWP (6)
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#define ANALOG_FLAG 0x300
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#define HP_VOLC (ANALOG_FLAG + 0x00)
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#define LOMIXSC (ANALOG_FLAG + 0x01)
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#define ROMIXSC (ANALOG_FLAG + 0x02)
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#define DAC_PA_SRC (ANALOG_FLAG + 0x03)
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#define LINEIN_GCTRL (ANALOG_FLAG + 0x05)
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#define MIC_GCTR (ANALOG_FLAG + 0x06)
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#define HP_CTRL (ANALOG_FLAG + 0x07)
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#define LINEOUT_VOLC (ANALOG_FLAG + 0x09)
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#define MIC2_CTRL (ANALOG_FLAG + 0x0A)
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#define BIAS_MIC_CTRL (ANALOG_FLAG + 0x0B)
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#define LADC_MIX_MUTE (ANALOG_FLAG + 0x0C)
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#define RADC_MIX_MUTE (ANALOG_FLAG + 0x0D)
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#define PA_ANTI_POP_CTRL (ANALOG_FLAG + 0x0E)
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#define AC_ADC_CTRL (ANALOG_FLAG + 0x0F)
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#define OPADC_CTRL (ANALOG_FLAG + 0x10)
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#define OPMIC_CTRL (ANALOG_FLAG + 0x11)
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#define ZERO_CROSS_CTRL (ANALOG_FLAG + 0x12)
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#define ADC_FUN_CTRL (ANALOG_FLAG + 0x13)
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#define CALIBRTAION_CTRL (ANALOG_FLAG + 0x14)
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/*
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* apb0 base
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* 0x00 HP_VOLC
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*/
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#define HPVOL (0)
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/*
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* apb0 base
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* 0x01 LOMIXSC
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*/
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#define LMIXMUTE (0)
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#define LMIXMUTEDACR (0)
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#define LMIXMUTEDACL (1)
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#define LMIXMUTELINEINL (2)
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#define LMIXMUTEMIC2BOOST (5)
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#define LMIXMUTEMIC1BOOST (6)
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/*
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* apb0 base
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* 0x02 ROMIXSC
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*/
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#define RMIXMUTE (0)
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#define RMIXMUTEDACL (0)
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#define RMIXMUTEDACR (1)
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#define RMIXMUTELINEINR (2)
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#define RMIXMUTEMIC2BOOST (5)
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#define RMIXMUTEMIC1BOOST (6)
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/*
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* apb0 base
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* 0x03 DAC_PA_SRC
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*/
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#define DACAREN (7)
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#define DACALEN (6)
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#define RMIXEN (5)
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#define LMIXEN (4)
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#define RHPPAMUTE (3)
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#define LHPPAMUTE (2)
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#define RHPIS (1)
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#define LHPIS (0)
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/* 0x05 */
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#define LINEING (4)
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/*
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* apb0 base
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* 0x06 MICIN_GCTRL
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*/
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#define MIC1G (4)
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#define MIC2G (0)
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/*
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* apb0 base
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* 0x07 PAEN_HP_CTRL
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*/
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#define HPPAEN (7)
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#define HPCOM_FC (5)
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#define COMPTEN (4)
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#define COS_SLOPE_CTRL (2)
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#define LTRNMUTE (1)
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#define RTLNMUTE (0)
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/*
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*
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* 0x09 LINEOUT_VOLC
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*/
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#define LINEOUTVOL (3)
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/*
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* apb0 base
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* 0x0A MIC2G_LINEEN_CTRL
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*/
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#define MIC2AMPEN (7)
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#define MIC2BOOST (4)
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#define LINEOUTLEFTEN (3)
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#define LINEOUTRIGHTEN (2)
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#define LEFTLINEOUTSRC (1)
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#define RIGHTLINEOUTSRC (0)
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/*
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* apb0 base
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* 0x0B MIC1G_MICBIAS_CTRL
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*/
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#define HMICBIASEN (7)
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#define MMICBIASEN (6)
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#define MIC2_SS (4)
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#define MIC1AMPEN (3)
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#define MIC1BOOST (0)
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/*
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* apb0 base
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* 0x0C LADCMIXSC
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*/
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#define LADCMIXMUTE (0)
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#define LADCMIXMUTEMIC1BOOST (6)
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#define LADCMIXMUTEMIC2BOOST (5)
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#define LADCMIXMUTELINEINL (2)
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#define LADCMIXMUTELOUTPUT (1)
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#define LADCMIXMUTEROUTPUT (0)
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/*
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* apb0 base
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* 0x0D RADCMIXSC
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*/
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#define RADCMIXMUTE (0)
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#define RADCMIXMUTEMIC1BOOST (6)
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#define RADCMIXMUTEMIC2BOOST (5)
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#define RADCMIXMUTELINEINR (2)
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#define RADCMIXMUTEROUTPUT (1)
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#define RADCMIXMUTELOUTPUT (0)
|
||
|
|
|
||
|
|
/*
|
||
|
|
* 0x0E ADC_AP_EN
|
||
|
|
*/
|
||
|
|
#define PA_ANTI_POP_CTL (0)
|
||
|
|
|
||
|
|
/*
|
||
|
|
* apb0 base
|
||
|
|
* 0x0F ADC_AP_EN
|
||
|
|
*/
|
||
|
|
#define ADCREN (7)
|
||
|
|
#define ADCLEN (6)
|
||
|
|
#define ADCG (0)
|
||
|
|
|
||
|
|
/*
|
||
|
|
* apb0 base
|
||
|
|
* 0x12 ZERO_CROSS_CTRL
|
||
|
|
*/
|
||
|
|
#define ZERO_CROSS_EN (7)
|
||
|
|
#define PA_SLOPE_SELECT (3)
|
||
|
|
|
||
|
|
#define codec_rdreg(reg) readl((baseaddr+(reg)))
|
||
|
|
#define codec_wrreg(reg,val) writel((val),(baseaddr+(reg)))
|
||
|
|
|
||
|
|
extern int snd_codec_info_volsw(struct snd_kcontrol *kcontrol,
|
||
|
|
struct snd_ctl_elem_info *uinfo);
|
||
|
|
extern int snd_codec_get_volsw(struct snd_kcontrol *kcontrol,
|
||
|
|
struct snd_ctl_elem_value *ucontrol);
|
||
|
|
extern int snd_codec_put_volsw(struct snd_kcontrol *kcontrol,
|
||
|
|
struct snd_ctl_elem_value *ucontrol);
|
||
|
|
|
||
|
|
/*
|
||
|
|
* Convenience kcontrol builders
|
||
|
|
*/
|
||
|
|
#define CODEC_SINGLE_VALUE(xreg, xshift, xmax, xinvert)\
|
||
|
|
((unsigned long)&(struct codec_mixer_control)\
|
||
|
|
{.reg = xreg, .shift = xshift, .rshift = xshift, .max = xmax,\
|
||
|
|
.invert = xinvert})
|
||
|
|
|
||
|
|
#define CODEC_SINGLE(xname, reg, shift, max, invert)\
|
||
|
|
{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname,\
|
||
|
|
.info = snd_codec_info_volsw, .get = snd_codec_get_volsw,\
|
||
|
|
.put = snd_codec_put_volsw,\
|
||
|
|
.private_value = CODEC_SINGLE_VALUE(reg, shift, max, invert)}
|
||
|
|
|
||
|
|
#define CODEC_SINGLE_EXT(xname, reg, shift, max, invert, codec_set)\
|
||
|
|
{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname,\
|
||
|
|
.info = snd_codec_info_volsw, .get = snd_codec_get_volsw,\
|
||
|
|
.put = codec_set,\
|
||
|
|
.private_value = CODEC_SINGLE_VALUE(reg, shift, max, invert)}
|
||
|
|
|
||
|
|
/* mixer control*/
|
||
|
|
struct codec_mixer_control{
|
||
|
|
int min;
|
||
|
|
int max;
|
||
|
|
int where;
|
||
|
|
unsigned int mask;
|
||
|
|
unsigned int reg;
|
||
|
|
unsigned int rreg;
|
||
|
|
unsigned int shift;
|
||
|
|
unsigned int rshift;
|
||
|
|
unsigned int invert;
|
||
|
|
unsigned int value;
|
||
|
|
};
|
||
|
|
|
||
|
|
struct gain_config {
|
||
|
|
u32 headphonevol;
|
||
|
|
u32 maingain;
|
||
|
|
u32 headsetmicgain;
|
||
|
|
u32 speakervol;
|
||
|
|
};
|
||
|
|
|
||
|
|
struct codec_hw_config {
|
||
|
|
u32 adcagc_cfg:1;
|
||
|
|
u32 adcdrc_cfg:1;
|
||
|
|
u32 dacdrc_cfg:1;
|
||
|
|
u32 adchpf_cfg:1;
|
||
|
|
u32 dachpf_cfg:1;
|
||
|
|
};
|
||
|
|
|
||
|
|
struct label {
|
||
|
|
const char *name;
|
||
|
|
int value;
|
||
|
|
};
|
||
|
|
|
||
|
|
#define LABEL(constant) { #constant, constant }
|
||
|
|
#define LABEL_END { NULL, -1 }
|
||
|
|
|
||
|
|
extern void sun8iw8_codec_dac_drq_enable(int on);
|
||
|
|
extern void sun8iw8_codec_adc_drq_enable(int on);
|
||
|
|
extern u32 sun8iw8_codec_get_dac_cnt(void);
|
||
|
|
extern u32 sun8iw8_codec_get_adc_cnt(void);
|
||
|
|
|
||
|
|
#endif
|