679 lines
19 KiB
C
679 lines
19 KiB
C
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/**
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* All Winner Tech, All Right Reserved. 2006-2016 Copyright (c)
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*
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* File name : di_v23.c
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*
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* Description :
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*
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* History :2016/01/18 zhengwj initial version for DI_V2.0
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* 2016/10/09 zhengwj modify for DI_V2.3
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* 2016/12/27 yulangheng code of DI_V2.2 added
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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#include "di.h"
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#include "sunxi-di.h"
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#include "di_type_v2x.h"
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#include <linux/slab.h>
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#include <asm/io.h>
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volatile struct __di_dev_t *di_dev;
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#if defined SUPPORT_DNS
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volatile struct __dns_dev_t *dns_dev;
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#endif
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static struct __di_mode_t g_di_mode;
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#define SETMASK(width, shift) ((width ? ((-1U) >> (32-width)) : 0) << (shift))
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#define CLRMASK(width, shift) (~(SETMASK(width, shift)))
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#define SET_BITS(shift, width, reg, val) \
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(((reg) & CLRMASK(width, shift)) | (val << (shift)))
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/**
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* function: di_set_reg_base(void *base)
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* description: set di module register base
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* parameters: base <di module AHB memory mapping >
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* return :
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*/
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s32 di_set_reg_base(void *base)
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{
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di_dev = (struct __di_dev_t *)base;
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#if defined SUPPORT_DNS
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dns_dev = (struct __dns_dev_t *)(base + 0x10000);
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#endif
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return 0;
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}
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/**
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* function: di_get_reg_base(void)
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* description: get di module register base
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* parameters:
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* return : di module AHB memory mapping
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*/
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void *di_get_reg_base(void)
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{
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void *ret = NULL;
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ret = (void *)(di_dev);
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return ret;
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}
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/**
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* function: di_set_init(void)
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* description: set di module default register to ready de-interlace
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* parameters:
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* return :
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*/
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#if defined DI_V23
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#define IOMMU_ENABLE 1 /* DI_V2.3 : Enable IOMMU function */
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#endif
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s32 di_set_init(void)
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{
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#if defined DI_V23
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/* di_dev->output_path.bits.output_path = 0; */
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di_dev->outpath.dwval = 0x00000000;
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/* default setting of di */
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/* di_dev->ctrl.bits.dma_rand_access_en = 1 (iommu_enable) */
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di_dev->ctrl.dwval = 0x00000000 | (IOMMU_ENABLE << 16);
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/* int di_mode = 1;
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* int motion_detc_en = 1;
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* int diag_intp_en = 1;
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* int flag_update_mode = 0;
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* di_dev->mode.bits.di_mode_luma = di_mode;
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* di_dev->mode.bits.di_mode_chroma = di_mode;
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* di_dev->mode.bits.motion_detc_en = motion_detc_en;
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* di_dev->mode.bits.diag_intp_en = diag_intp_en;
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* di_dev->mode.bits.flag_update_mode = flag_update_mode;
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* di_dev->mode.bits.in_field_mode =
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* (di_mode == DI_MODE_MOTION)? 0: 1;
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*/
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di_dev->mode.dwval = 0x00010031;
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/* di_dev->mdpara0.bits.minlumath = 0x4;
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* di_dev->mdpara0.bits.maxlumath = 0xc;
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* di_dev->mdpara0.bits.avglumashifter = 0x6;
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* di_dev->mdpara0.bits.th_shift = 0x1;
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*/
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di_dev->mdpara0.dwval = 0x01060c04;
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/* di_dev->mdpara1.bits.mov_fac_nonedge = 0x2;
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*/
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di_dev->mdpara1.dwval = 0x20000000;
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/* di_dev->mdpara2.bits.chroma_spatical_th = 0x80;
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* di_dev->mdpara2.bits.chroma_diff_th = 0x5;
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* di_dev->mdpara2.bits.pix_static_th = 0x3;
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*/
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di_dev->mdpara2.dwval = 0x30058000;
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/* di_dev->dipara.bits.angle_limit = 0x14;
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* di_dev->dipara.bits.angle_const_th = 0x5;
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* di_dev->dipara.bits.luma_cur_fac_mod = 0x1;
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* di_dev->dipara.bits.chroma_cur_fac_mod = 0x1;
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*/
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di_dev->dipara0.dwval = 0x00110514;
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/* di_dev->mdchpara.bits.blend_mode = 0x1;
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* di_dev->mdchpara.bits.font_pro_en = 0x1;
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* di_dev->mdchpara.bits.font_pro_th = 0x30;
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* di_dev->mdchpara.bits.font_pro_fac = 0x4;
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*/
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di_dev->mdchpara.dwval = 0x04300101;
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/* di_dev->dipara1.bits.a = 0x4;
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* di_dev->dipara1.bits.en = 0x1;
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* di_dev->dipara1.bits.c = 0xa;
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* di_dev->dipara1.bits.cmax = 0x40;
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* di_dev->dipara1.bits.maxrat = 0x2
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*/
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di_dev->dipara1.dwval = 0x000240ac;
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#elif defined DI_V22
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/* di_dev->output_path.bits.output_path = 0; */
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di_dev->outpath.dwval = 0x00000000;
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/* default setting of di */
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/* di_dev->ctrl.bits.dma_rand_access_en = 1 (iommu_enable) */
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di_dev->ctrl.dwval = 0x00000000;
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/* int di_mode = 1;
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* int motion_detc_en = 1;
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* int diag_intp_en = 1;
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* int flag_update_mode = 0;
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* di_dev->mode.bits.di_mode_luma = di_mode;
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* di_dev->mode.bits.di_mode_chroma = di_mode;
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* di_dev->mode.bits.motion_detc_en = motion_detc_en;
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* di_dev->mode.bits.diag_intp_en = diag_intp_en;
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* di_dev->mode.bits.flag_update_mode = flag_update_mode;
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* di_dev->mode.bits.in_field_mode =
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* (di_mode == DI_MODE_MOTION)? 0: 1;
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*/
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di_dev->mode.dwval = 0x00010031;
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/* di_dev->mdpara0.bits.minlumath = 0x4;
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* di_dev->mdpara0.bits.max_luma_th= 0x18;
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* di_dev->mdpara0.bits.avglumashifter = 0x6;
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* di_dev->mdpara0.bits.th_shift = 0x0;
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*/
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/*di_dev->mdpara0.dwval = 0x01060c04;*/
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di_dev->mdpara0.dwval = 0x00061804;
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/* di_dev->f_prot_th = 0x80
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* di_dev->f_prot_factor = 0x4
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* di_dev->edge_th = 0x20
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* di_dev->mov_fac_edge = 0x03
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* di_dev->mov_fac_nonedge = 0x01
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*/
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di_dev->mdpara1.dwval = 0x13200480;
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/* di_dev->luma_spatial_th = 0x5
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* di_dev->chroma_spatical_th = 0x80
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* di_dev->chroma_diff_th = 0x5
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* di_dev->erosion_bob_th = 0x7
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* di_dev->pix_static_th = 0x3
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*/
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di_dev->mdpara2.dwval = 0x37058005;
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/* di_dev->dipara.bits.angle_limit = 0x14;
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* di_dev->dipara.bits.angle_const_th = 0x5;
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* di_dev->dipara.bits.luma_cur_fac_mod = 0x1;
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* di_dev->dipara.bits.chroma_cur_fac_mod = 0x1;
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*/
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di_dev->dipara0.dwval = 0x00110514;
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/* di_dev->mdchpara.bits.blend_mode = 0x0;
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* di_dev->mdchpara.bits.font_pro_en = 0x0;
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* di_dev->mdchpara.bits.font_pro_th = 0x30;
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* di_dev->mdchpara.bits.font_pro_fac = 0x4;
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*/
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di_dev->mdchpara.dwval = 0x04300000;
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#endif
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#if defined SUPPORT_DNS
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dns_dev->dns_ctl.dwval = 0x00000001; /* Enable Denoising */
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dns_dev->dns_lft_para0.dwval = 0x00ff9601;
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dns_dev->dns_lft_para1.dwval = 0xb24e3c80;
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dns_dev->dns_lft_para2.dwval = 0x77153a00;
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dns_dev->dns_lft_para3.dwval = 0x000000ff;
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dns_dev->iqa_blkdt_para0.dwval = 0x0000c810;
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#endif
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g_di_mode.di_mode = DI_MODE_MOTION;
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g_di_mode.update_mode = DI_UPDMODE_FIELD;
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return 0;
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}
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#define di_writel(val, addr) writel(val, (void __iomem *)(addr))
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#define di_readl(addr) readl((void __iomem *)(addr))
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void DI_SET_BITS(unsigned int *reg_addr, unsigned int bits_val,
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unsigned int shift, unsigned int width)
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{
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unsigned int reg_val;
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reg_val = di_readl(reg_addr);
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reg_val = SET_BITS(shift, width, reg_val, bits_val);
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di_writel(reg_val, reg_addr);
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}
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/**
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* function: di_reset(void)
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* description: stop di module
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* parameters:
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* return :
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*/
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s32 di_reset(void)
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{
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unsigned int reset = 0x1;
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di_dev->ctrl.bits.reset = reset;
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/* DI_SET_BITS(&di_dev->ctrl.dwval, reset, 0, 1); */
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while (reset < 20)
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reset++;
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reset = 0;
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di_dev->ctrl.bits.reset = reset;
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/* DI_SET_BITS(&di_dev->ctrl.dwval, reset, 0, 1); */
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return 0;
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}
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/**
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* function: di_start(void)
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* description: start a de-interlace function
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* parameters:
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* return :
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*/
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s32 di_start(void)
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{
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di_dev->ctrl.bits.start = 0x1;
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return 0;
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}
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/**
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* function: di_irq_enable(unsigned int enable)
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* description: enable/disable di irq
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* parameters: enable <0-disable; 1-enable>
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* return :
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*/
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s32 di_irq_enable(unsigned int enable)
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{
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di_dev->intr.bits.int_en = (enable & 0x1);
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return 0;
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}
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/**
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* function: di_get_status(void)
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* description: get status of di module
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* parameters:
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* return : <0-Writeback finish; 1-Writeback no start; 2-Writeback-ing;
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* (-1)-Undefined
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*/
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s32 di_get_status(void)
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{
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int ret;
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unsigned int busy;
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unsigned int finish;
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finish = di_dev->status.bits.finish_sts;
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busy = di_dev->status.bits.busy;
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if (busy)
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ret = 2;
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else if (finish == 0 && busy == 0)
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ret = 1;
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else if (finish)
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ret = 0;
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else
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ret = -1;
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return ret;
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}
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/**
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* function: di_irq_clear()
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* description: clear irq status
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* parameters:
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* return :
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*/
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s32 di_irq_clear(void)
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{
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di_dev->status.bits.finish_sts = 0x1;
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return 0;
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}
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void DI_SET_FORMAT(unsigned char fmt)
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{
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di_dev->fmt.bits.fmt = fmt;
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}
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void DI_SET_SIZE(unsigned int width, unsigned int height)
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{
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di_dev->size.dwval = ((height - 1) & 0x7ff) << 16 |
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((width - 1) & 0x7ff);
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#if defined SUPPORT_DNS
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dns_dev->dns_size.dwval = ((height - 1) & 0x7ff) << 16 |
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((width - 1) & 0x7ff);
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#endif
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}
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void DI_CALC_INADDR(struct __di_buf_addr_t *pre_addr,
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struct __di_buf_addr_t *cur_addr,
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struct __di_buf_addr_t *nxt_addr,
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struct __di_buf_size_t *size, unsigned int field,
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unsigned char fmt, unsigned int top_field_first,
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unsigned long long addr[4][3], unsigned int fieldpitch[3])
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{
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unsigned int pitch[3];
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pitch[0] = size->fb_width;
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if (fmt == DI_FMT_PLANAR420 || fmt == DI_FMT_PLANAR422) {
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pitch[1] = ((size->fb_width + 1) >> 1);
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pitch[2] = pitch[1];
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} else {
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pitch[1] = (((size->fb_width + 1) >> 1) << 1);
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pitch[2] = 0;
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}
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fieldpitch[0] = pitch[0] << 1;
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fieldpitch[1] = pitch[1] << 1;
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fieldpitch[2] = pitch[2] << 1;
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if (top_field_first == 1) {
|
||
|
|
if (field == 0) {
|
||
|
|
addr[0][0] = pre_addr->ch0_addr;
|
||
|
|
addr[0][1] = pre_addr->ch1_addr;
|
||
|
|
addr[0][2] = pre_addr->ch2_addr;
|
||
|
|
addr[1][0] = pre_addr->ch0_addr + pitch[0];
|
||
|
|
addr[1][1] = pre_addr->ch1_addr + pitch[1];
|
||
|
|
addr[1][2] = pre_addr->ch2_addr + pitch[2];
|
||
|
|
addr[2][0] = cur_addr->ch0_addr;
|
||
|
|
addr[2][1] = cur_addr->ch1_addr;
|
||
|
|
addr[2][2] = cur_addr->ch2_addr;
|
||
|
|
addr[3][0] = cur_addr->ch0_addr + pitch[0];
|
||
|
|
addr[3][1] = cur_addr->ch1_addr + pitch[1];
|
||
|
|
addr[3][2] = cur_addr->ch2_addr + pitch[2];
|
||
|
|
} else {
|
||
|
|
addr[0][0] = pre_addr->ch0_addr + pitch[0];
|
||
|
|
addr[0][1] = pre_addr->ch1_addr + pitch[1];
|
||
|
|
addr[0][2] = pre_addr->ch2_addr + pitch[2];
|
||
|
|
addr[1][0] = cur_addr->ch0_addr;
|
||
|
|
addr[1][1] = cur_addr->ch1_addr;
|
||
|
|
addr[1][2] = cur_addr->ch2_addr;
|
||
|
|
addr[2][0] = cur_addr->ch0_addr + pitch[0];
|
||
|
|
addr[2][1] = cur_addr->ch1_addr + pitch[1];
|
||
|
|
addr[2][2] = cur_addr->ch2_addr + pitch[2];
|
||
|
|
addr[3][0] = nxt_addr->ch0_addr;
|
||
|
|
addr[3][1] = nxt_addr->ch1_addr;
|
||
|
|
addr[3][2] = nxt_addr->ch2_addr;
|
||
|
|
}
|
||
|
|
} else {
|
||
|
|
if (field == 0) {
|
||
|
|
addr[0][0] = pre_addr->ch0_addr;
|
||
|
|
addr[0][1] = pre_addr->ch1_addr;
|
||
|
|
addr[0][2] = pre_addr->ch2_addr;
|
||
|
|
addr[1][0] = cur_addr->ch0_addr + pitch[0];
|
||
|
|
addr[1][1] = cur_addr->ch1_addr + pitch[1];
|
||
|
|
addr[1][2] = cur_addr->ch2_addr + pitch[2];
|
||
|
|
addr[2][0] = cur_addr->ch0_addr;
|
||
|
|
addr[2][1] = cur_addr->ch1_addr;
|
||
|
|
addr[2][2] = cur_addr->ch2_addr;
|
||
|
|
addr[3][0] = nxt_addr->ch0_addr + pitch[0];
|
||
|
|
addr[3][1] = nxt_addr->ch1_addr + pitch[1];
|
||
|
|
addr[3][2] = nxt_addr->ch2_addr + pitch[2];
|
||
|
|
} else {
|
||
|
|
addr[0][0] = pre_addr->ch0_addr + pitch[0];
|
||
|
|
addr[0][1] = pre_addr->ch1_addr + pitch[1];
|
||
|
|
addr[0][2] = pre_addr->ch2_addr + pitch[2];
|
||
|
|
addr[1][0] = pre_addr->ch0_addr;
|
||
|
|
addr[1][1] = pre_addr->ch1_addr;
|
||
|
|
addr[1][2] = pre_addr->ch2_addr;
|
||
|
|
addr[2][0] = cur_addr->ch0_addr + pitch[0];
|
||
|
|
addr[2][1] = cur_addr->ch1_addr + pitch[1];
|
||
|
|
addr[2][2] = cur_addr->ch2_addr + pitch[2];
|
||
|
|
addr[3][0] = cur_addr->ch0_addr;
|
||
|
|
addr[3][1] = cur_addr->ch1_addr;
|
||
|
|
addr[3][2] = cur_addr->ch2_addr;
|
||
|
|
}
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
void DI_SET_INPUT(unsigned int pitch[3], unsigned long long addr[4][3])
|
||
|
|
{
|
||
|
|
di_dev->inpicth0.dwval = pitch[0] & 0xffff;
|
||
|
|
di_dev->inpicth1.dwval = pitch[1] & 0xffff;
|
||
|
|
di_dev->inpicth2.dwval = pitch[2] & 0xffff;
|
||
|
|
|
||
|
|
di_dev->in0add0.dwval = (unsigned int)(addr[0][0] & 0xffffffffLL);
|
||
|
|
di_dev->in0add1.dwval = (unsigned int)(addr[0][1] & 0xffffffffLL);
|
||
|
|
di_dev->in0add2.dwval = (unsigned int)(addr[0][2] & 0xffffffffLL);
|
||
|
|
di_dev->in0addhb.dwval =
|
||
|
|
((unsigned int)((addr[0][0] & 0xff00000000LL)>>32) |
|
||
|
|
(unsigned int)((addr[0][1] & 0xff00000000LL)>>24) |
|
||
|
|
(unsigned int)((addr[0][2] & 0xff00000000LL)>>16));
|
||
|
|
|
||
|
|
di_dev->in1add0.dwval = (unsigned int)(addr[1][0] & 0xffffffffLL);
|
||
|
|
di_dev->in1add1.dwval = (unsigned int)(addr[1][1] & 0xffffffffLL);
|
||
|
|
di_dev->in1add2.dwval = (unsigned int)(addr[1][2] & 0xffffffffLL);
|
||
|
|
di_dev->in1addhb.dwval =
|
||
|
|
((unsigned int)((addr[1][0] & 0xff00000000LL)>>32) |
|
||
|
|
(unsigned int)((addr[1][1] & 0xff00000000LL)>>24) |
|
||
|
|
(unsigned int)((addr[1][2] & 0xff00000000LL)>>16));
|
||
|
|
|
||
|
|
di_dev->in2add0.dwval = (unsigned int)(addr[2][0] & 0xffffffffLL);
|
||
|
|
di_dev->in2add1.dwval = (unsigned int)(addr[2][1] & 0xffffffffLL);
|
||
|
|
di_dev->in2add2.dwval = (unsigned int)(addr[2][2] & 0xffffffffLL);
|
||
|
|
di_dev->in2addhb.dwval =
|
||
|
|
((unsigned int)((addr[2][0] & 0xff00000000LL)>>32) |
|
||
|
|
(unsigned int)((addr[2][1] & 0xff00000000LL)>>24) |
|
||
|
|
(unsigned int)((addr[2][2] & 0xff00000000LL)>>16));
|
||
|
|
|
||
|
|
di_dev->in3add0.dwval = (unsigned int)(addr[3][0] & 0xffffffffLL);
|
||
|
|
di_dev->in3add1.dwval = (unsigned int)(addr[3][1] & 0xffffffffLL);
|
||
|
|
di_dev->in3add2.dwval = (unsigned int)(addr[3][2] & 0xffffffffLL);
|
||
|
|
di_dev->in3addhb.dwval =
|
||
|
|
((unsigned int)((addr[3][0] & 0xff00000000LL)>>32) |
|
||
|
|
(unsigned int)((addr[3][1] & 0xff00000000LL)>>24) |
|
||
|
|
(unsigned int)((addr[3][2] & 0xff00000000LL)>>16));
|
||
|
|
|
||
|
|
}
|
||
|
|
|
||
|
|
void DI_SET_OUTPUT(struct __di_buf_size_t *size, unsigned char fmt,
|
||
|
|
unsigned long long addr[3])
|
||
|
|
{
|
||
|
|
unsigned int pitch[3];
|
||
|
|
|
||
|
|
pitch[0] = size->fb_width;
|
||
|
|
|
||
|
|
if (fmt == DI_FMT_PLANAR420 || fmt == DI_FMT_PLANAR422) {
|
||
|
|
pitch[1] = ((size->fb_width + 1) >> 1);
|
||
|
|
pitch[2] = pitch[1];
|
||
|
|
} else {
|
||
|
|
pitch[1] = (((size->fb_width + 1) >> 1) << 1);
|
||
|
|
pitch[2] = 0;
|
||
|
|
}
|
||
|
|
|
||
|
|
di_dev->outpicth0.dwval = pitch[0] & 0xffff;
|
||
|
|
di_dev->outpicth1.dwval = pitch[1] & 0xffff;
|
||
|
|
di_dev->outpicth2.dwval = pitch[2] & 0xffff;
|
||
|
|
|
||
|
|
di_dev->outadd0.dwval = (unsigned int)(addr[0] & 0xffffffffLL);
|
||
|
|
di_dev->outadd1.dwval = (unsigned int)(addr[1] & 0xffffffffLL);
|
||
|
|
di_dev->outadd2.dwval = (unsigned int)(addr[2] & 0xffffffffLL);
|
||
|
|
di_dev->outaddhb.dwval =
|
||
|
|
((unsigned int)((addr[0] & 0xff00000000LL)>>32) |
|
||
|
|
(unsigned int)((addr[1] & 0xff00000000LL)>>24) |
|
||
|
|
(unsigned int)((addr[2] & 0xff00000000LL)>>16));
|
||
|
|
|
||
|
|
}
|
||
|
|
|
||
|
|
void DI_SET_FLAG(unsigned long long in_flag_add,
|
||
|
|
unsigned long long out_flag_add, unsigned int pitch)
|
||
|
|
{
|
||
|
|
di_dev->flagpitch.dwval = pitch & 0xffff;
|
||
|
|
|
||
|
|
di_dev->inflagadd.dwval = (unsigned int)(in_flag_add & 0xffffffffLL);
|
||
|
|
di_dev->outflagadd.dwval = (unsigned int)(out_flag_add & 0xffffffffLL);
|
||
|
|
di_dev->flagaddhb.dwval =
|
||
|
|
((unsigned int)((in_flag_add & 0xff00000000LL)>>32) |
|
||
|
|
(unsigned int)((out_flag_add & 0xff00000000LL)>>24));
|
||
|
|
|
||
|
|
}
|
||
|
|
|
||
|
|
void DI_SET_CURFAC(unsigned int curfac)
|
||
|
|
{
|
||
|
|
di_dev->dipara0.bits.luma_cur_fac_mod = curfac;
|
||
|
|
di_dev->dipara0.bits.chroma_cur_fac_mod = curfac;
|
||
|
|
}
|
||
|
|
|
||
|
|
void DI_SET_POLAR(unsigned int polar)
|
||
|
|
{
|
||
|
|
di_dev->polar.dwval = polar & 0x1;
|
||
|
|
}
|
||
|
|
|
||
|
|
void DI_SET_FLAG_AUTO_UPD_MODE(unsigned int mode)
|
||
|
|
{
|
||
|
|
#if defined DI_V23
|
||
|
|
di_dev->mode.bits.flag_auto_update_mode = mode;
|
||
|
|
#endif
|
||
|
|
}
|
||
|
|
|
||
|
|
int DI_SW_PARA_TO_REG(unsigned char format)
|
||
|
|
{
|
||
|
|
/* deinterlace input pixel format */
|
||
|
|
if (format <= DI_FORMAT_NV21)
|
||
|
|
return DI_FMT_UVCOMB420;
|
||
|
|
else if (format == DI_FORMAT_YV12)
|
||
|
|
return DI_FMT_PLANAR420;
|
||
|
|
else if (format == DI_FORMAT_YUV422_SP_UVUV ||
|
||
|
|
format == DI_FORMAT_YUV422_SP_VUVU)
|
||
|
|
return DI_FMT_UVCOMB422;
|
||
|
|
else if (format == DI_FORMAT_YUV422P)
|
||
|
|
return DI_FMT_PLANAR422;
|
||
|
|
/* DE_INF("not supported de-interlace input pixel format :%d
|
||
|
|
* in di_sw_para_to_reg\n",format);
|
||
|
|
*/
|
||
|
|
return -1;
|
||
|
|
}
|
||
|
|
|
||
|
|
/**
|
||
|
|
* function: di_set_para(__di_para_t *para)
|
||
|
|
* description: set parameters to ready a de-interlace function
|
||
|
|
* parameters: para <parameters which set from ioctrl>
|
||
|
|
* in_flag_add/out_flag_add <flag address malloc in driver>
|
||
|
|
* polar <0 - select even line for source line;
|
||
|
|
* 1 - select odd line for source line>
|
||
|
|
* di_mode <di mode set by app>
|
||
|
|
* return : <0 - set OK; -1 - para NULL>
|
||
|
|
*/
|
||
|
|
s32 di_set_para(struct __di_para_t2 *para, void *in_flag_add,
|
||
|
|
void *out_flag_add, u32 field)
|
||
|
|
{
|
||
|
|
int fmt;
|
||
|
|
unsigned int width, height;
|
||
|
|
unsigned long long inaddr[4][3], outaddr[3];
|
||
|
|
unsigned int inpitch[3];
|
||
|
|
/* FIXME: flagpitch can be changed according to source */
|
||
|
|
unsigned int flagpitch = 0x200;
|
||
|
|
unsigned int curfac = 0;
|
||
|
|
unsigned int faum;
|
||
|
|
|
||
|
|
struct __di_buf_addr_t pre_addr;
|
||
|
|
struct __di_buf_addr_t cur_addr;
|
||
|
|
struct __di_buf_addr_t nxt_addr;
|
||
|
|
/*struct __di_buf_addr_t out_addr;*/
|
||
|
|
/*struct __di_buf_addr_t flg_addr;*/
|
||
|
|
struct __di_buf_size_t in_size;
|
||
|
|
struct __di_buf_size_t out_size;
|
||
|
|
|
||
|
|
if (para == NULL) {
|
||
|
|
/* DE_WRN("input parameter can't be null!\n"); */
|
||
|
|
return -1;
|
||
|
|
}
|
||
|
|
|
||
|
|
/* FORMAT and SIZE*/
|
||
|
|
fmt = DI_SW_PARA_TO_REG(para->input_fb.format);
|
||
|
|
|
||
|
|
if (fmt < 0) {
|
||
|
|
/* DE_WRN("para->input_fb.format=%d isnot supported!\n",
|
||
|
|
* para->input_fb.format);
|
||
|
|
*/
|
||
|
|
return -1;
|
||
|
|
}
|
||
|
|
|
||
|
|
width = para->source_regn.width;
|
||
|
|
height = para->source_regn.height;
|
||
|
|
DI_SET_FORMAT(fmt);
|
||
|
|
DI_SET_SIZE(width, height);
|
||
|
|
|
||
|
|
/* INPUT FRAMEBUFFER ADDRESS and PITCH */
|
||
|
|
pre_addr.ch0_addr = para->pre_fb.addr[0];
|
||
|
|
pre_addr.ch1_addr = para->pre_fb.addr[1];
|
||
|
|
pre_addr.ch2_addr = para->pre_fb.addr[2];
|
||
|
|
|
||
|
|
cur_addr.ch0_addr = para->input_fb.addr[0];
|
||
|
|
cur_addr.ch1_addr = para->input_fb.addr[1];
|
||
|
|
cur_addr.ch2_addr = para->input_fb.addr[2];
|
||
|
|
|
||
|
|
nxt_addr.ch0_addr = para->next_fb.addr[0];
|
||
|
|
nxt_addr.ch1_addr = para->next_fb.addr[1];
|
||
|
|
nxt_addr.ch2_addr = para->next_fb.addr[2];
|
||
|
|
|
||
|
|
/* in_size.width = para->source_regn.width; */
|
||
|
|
/* in_size.height = para->source_regn.height; */
|
||
|
|
in_size.fb_width = para->input_fb.size.width;
|
||
|
|
in_size.fb_height = para->input_fb.size.height;
|
||
|
|
|
||
|
|
DI_CALC_INADDR(&pre_addr, &cur_addr, &nxt_addr, &in_size, field, fmt,
|
||
|
|
para->top_field_first, inaddr, inpitch);
|
||
|
|
DI_SET_INPUT(inpitch, inaddr);
|
||
|
|
|
||
|
|
/* OUTPUT FRAMEBUFFER ADDRESS and PITCH */
|
||
|
|
outaddr[0] = para->output_fb.addr[0];
|
||
|
|
outaddr[1] = para->output_fb.addr[1];
|
||
|
|
outaddr[2] = para->output_fb.addr[2];
|
||
|
|
|
||
|
|
/* out_size.width = para->out_regn.width; */
|
||
|
|
/* out_size.height = para->out_regn.height; */
|
||
|
|
out_size.fb_width = para->output_fb.size.width;
|
||
|
|
out_size.fb_height = para->output_fb.size.height;
|
||
|
|
|
||
|
|
DI_SET_OUTPUT(&out_size, fmt, outaddr);
|
||
|
|
|
||
|
|
/* MOTION INFORMATION ADDRESS and PITCH */
|
||
|
|
DI_SET_FLAG((unsigned long)in_flag_add,
|
||
|
|
(unsigned long)out_flag_add, flagpitch);
|
||
|
|
|
||
|
|
/* DI PARAMERTES */
|
||
|
|
#if defined DI_V23
|
||
|
|
/* DI_V2.3 */
|
||
|
|
curfac = (para->top_field_first == 0) ? 5 : 4;
|
||
|
|
#elif defined DI_V22
|
||
|
|
curfac = (g_di_mode.di_mode != DI_MODE_WEAVE) ? 1 :
|
||
|
|
(para->top_field_first == 0) ? 5 : 4;
|
||
|
|
#endif
|
||
|
|
|
||
|
|
DI_SET_CURFAC(curfac);
|
||
|
|
DI_SET_POLAR(field);
|
||
|
|
|
||
|
|
faum = (para->top_field_first == 0) ? 1 : 0;
|
||
|
|
DI_SET_FLAG_AUTO_UPD_MODE(faum);
|
||
|
|
|
||
|
|
return 0;
|
||
|
|
}
|
||
|
|
|
||
|
|
/**
|
||
|
|
* function: di_set_mode(struct __di_mode_t *di_mode)
|
||
|
|
* description: set DI mode
|
||
|
|
* parameters: di_mode <update_mode and di_mode set by app>
|
||
|
|
* return :
|
||
|
|
*/
|
||
|
|
void di_set_mode(struct __di_mode_t *di_mode)
|
||
|
|
{
|
||
|
|
unsigned char flag_update_mode;
|
||
|
|
unsigned char motion_detc_en;
|
||
|
|
unsigned char diag_intp_en;
|
||
|
|
unsigned char mode;
|
||
|
|
unsigned char in_field_mode;
|
||
|
|
|
||
|
|
g_di_mode.di_mode = di_mode->di_mode;
|
||
|
|
g_di_mode.update_mode = di_mode->update_mode;
|
||
|
|
|
||
|
|
flag_update_mode = di_mode->update_mode & 0x1;
|
||
|
|
motion_detc_en = (di_mode->di_mode < DI_MODE_MOTION) ? 0 : 1;
|
||
|
|
diag_intp_en = (di_mode->di_mode < DI_MODE_INTP) ? 0 : 1;
|
||
|
|
mode = (di_mode->di_mode < DI_MODE_INTP) ? 0 : 1;
|
||
|
|
in_field_mode = (di_mode->di_mode == DI_MODE_MOTION) ? 0 : 1;
|
||
|
|
|
||
|
|
di_dev->mode.dwval = mode |
|
||
|
|
(motion_detc_en << 4) |
|
||
|
|
(diag_intp_en << 5) |
|
||
|
|
(flag_update_mode << 8) |
|
||
|
|
(mode << 16) |
|
||
|
|
(in_field_mode << 31);
|
||
|
|
|
||
|
|
}
|
||
|
|
|
||
|
|
s32 di_internal_clk_enable(void)
|
||
|
|
{
|
||
|
|
return 0;
|
||
|
|
}
|
||
|
|
|
||
|
|
s32 di_internal_clk_disable(void)
|
||
|
|
{
|
||
|
|
return 0;
|
||
|
|
}
|