223 lines
9.9 KiB
C
Executable File
223 lines
9.9 KiB
C
Executable File
/* Copyright 2013-2016 Freescale Semiconductor, Inc.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* * Neither the name of the above-listed copyright holders nor the
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* names of any contributors may be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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*
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* ALTERNATIVELY, this software may be distributed under the terms of the
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* GNU General Public License ("GPL") as published by the Free Software
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* Foundation, either version 2 of that License or (at your option) any
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* later version.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _FSL_DPDMAI_CMD_H
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#define _FSL_DPDMAI_CMD_H
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/* DPDMAI Version */
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#define DPDMAI_VER_MAJOR 2
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#define DPDMAI_VER_MINOR 2
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#define DPDMAI_CMD_BASE_VERSION 0
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#define DPDMAI_CMD_ID_OFFSET 4
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/* Command IDs */
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#define DPDMAI_CMDID_CLOSE ((0x800 << DPDMAI_CMD_ID_OFFSET) | DPDMAI_CMD_BASE_VERSION)
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#define DPDMAI_CMDID_OPEN ((0x80E << DPDMAI_CMD_ID_OFFSET) | DPDMAI_CMD_BASE_VERSION)
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#define DPDMAI_CMDID_CREATE ((0x90E << DPDMAI_CMD_ID_OFFSET) | DPDMAI_CMD_BASE_VERSION)
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#define DPDMAI_CMDID_DESTROY ((0x900 << DPDMAI_CMD_ID_OFFSET) | DPDMAI_CMD_BASE_VERSION)
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#define DPDMAI_CMDID_ENABLE ((0x002 << DPDMAI_CMD_ID_OFFSET) | DPDMAI_CMD_BASE_VERSION)
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#define DPDMAI_CMDID_DISABLE ((0x003 << DPDMAI_CMD_ID_OFFSET) | DPDMAI_CMD_BASE_VERSION)
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#define DPDMAI_CMDID_GET_ATTR ((0x004 << DPDMAI_CMD_ID_OFFSET) | DPDMAI_CMD_BASE_VERSION)
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#define DPDMAI_CMDID_RESET ((0x005 << DPDMAI_CMD_ID_OFFSET) | DPDMAI_CMD_BASE_VERSION)
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#define DPDMAI_CMDID_IS_ENABLED ((0x006 << DPDMAI_CMD_ID_OFFSET) | DPDMAI_CMD_BASE_VERSION)
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#define DPDMAI_CMDID_SET_IRQ ((0x010 << DPDMAI_CMD_ID_OFFSET) | DPDMAI_CMD_BASE_VERSION)
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#define DPDMAI_CMDID_GET_IRQ ((0x011 << DPDMAI_CMD_ID_OFFSET) | DPDMAI_CMD_BASE_VERSION)
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#define DPDMAI_CMDID_SET_IRQ_ENABLE ((0x012 << DPDMAI_CMD_ID_OFFSET) | DPDMAI_CMD_BASE_VERSION)
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#define DPDMAI_CMDID_GET_IRQ_ENABLE ((0x013 << DPDMAI_CMD_ID_OFFSET) | DPDMAI_CMD_BASE_VERSION)
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#define DPDMAI_CMDID_SET_IRQ_MASK ((0x014 << DPDMAI_CMD_ID_OFFSET) | DPDMAI_CMD_BASE_VERSION)
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#define DPDMAI_CMDID_GET_IRQ_MASK ((0x015 << DPDMAI_CMD_ID_OFFSET) | DPDMAI_CMD_BASE_VERSION)
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#define DPDMAI_CMDID_GET_IRQ_STATUS ((0x016 << DPDMAI_CMD_ID_OFFSET) | DPDMAI_CMD_BASE_VERSION)
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#define DPDMAI_CMDID_CLEAR_IRQ_STATUS ((0x017 << DPDMAI_CMD_ID_OFFSET) | DPDMAI_CMD_BASE_VERSION)
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#define DPDMAI_CMDID_SET_RX_QUEUE ((0x1A0 << DPDMAI_CMD_ID_OFFSET) | DPDMAI_CMD_BASE_VERSION)
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#define DPDMAI_CMDID_GET_RX_QUEUE ((0x1A1 << DPDMAI_CMD_ID_OFFSET) | DPDMAI_CMD_BASE_VERSION)
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#define DPDMAI_CMDID_GET_TX_QUEUE ((0x1A2 << DPDMAI_CMD_ID_OFFSET) | DPDMAI_CMD_BASE_VERSION)
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#define MC_CMD_HDR_TOKEN_O 32 /* Token field offset */
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#define MC_CMD_HDR_TOKEN_S 16 /* Token field size */
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#define MAKE_UMASK64(_width) \
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((uint64_t)((_width) < 64 ? ((uint64_t)1 << (_width)) - 1 : \
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(uint64_t)-1))
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static inline uint64_t mc_enc(int lsoffset, int width, uint64_t val)
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{
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return (uint64_t)(((uint64_t)val & MAKE_UMASK64(width)) << lsoffset);
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}
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static inline uint64_t mc_dec(uint64_t val, int lsoffset, int width)
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{
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return (uint64_t)((val >> lsoffset) & MAKE_UMASK64(width));
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}
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#define MC_CMD_OP(_cmd, _param, _offset, _width, _type, _arg) \
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((_cmd).params[_param] |= mc_enc((_offset), (_width), _arg))
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#define MC_RSP_OP(_cmd, _param, _offset, _width, _type, _arg) \
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(_arg = (_type)mc_dec(_cmd.params[_param], (_offset), (_width)))
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#define MC_CMD_HDR_READ_TOKEN(_hdr) \
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((uint16_t)mc_dec((_hdr), MC_CMD_HDR_TOKEN_O, MC_CMD_HDR_TOKEN_S))
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/* cmd, param, offset, width, type, arg_name */
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#define DPDMAI_CMD_OPEN(cmd, dpdmai_id) \
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MC_CMD_OP(cmd, 0, 0, 32, int, dpdmai_id)
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/* cmd, param, offset, width, type, arg_name */
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#define DPDMAI_CMD_CREATE(cmd, cfg) \
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do { \
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MC_CMD_OP(cmd, 0, 8, 8, uint8_t, cfg->priorities[0]);\
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MC_CMD_OP(cmd, 0, 16, 8, uint8_t, cfg->priorities[1]);\
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} while (0)
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/* cmd, param, offset, width, type, arg_name */
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#define DPDMAI_RSP_IS_ENABLED(cmd, en) \
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MC_RSP_OP(cmd, 0, 0, 1, int, en)
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/* cmd, param, offset, width, type, arg_name */
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#define DPDMAI_CMD_SET_IRQ(cmd, irq_index, irq_cfg) \
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do { \
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MC_CMD_OP(cmd, 0, 0, 8, uint8_t, irq_index);\
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MC_CMD_OP(cmd, 0, 32, 32, uint32_t, irq_cfg->val);\
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MC_CMD_OP(cmd, 1, 0, 64, uint64_t, irq_cfg->addr);\
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MC_CMD_OP(cmd, 2, 0, 32, int, irq_cfg->irq_num); \
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} while (0)
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/* cmd, param, offset, width, type, arg_name */
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#define DPDMAI_CMD_GET_IRQ(cmd, irq_index) \
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MC_CMD_OP(cmd, 0, 32, 8, uint8_t, irq_index)
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/* cmd, param, offset, width, type, arg_name */
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#define DPDMAI_RSP_GET_IRQ(cmd, type, irq_cfg) \
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do { \
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MC_RSP_OP(cmd, 0, 0, 32, uint32_t, irq_cfg->val); \
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MC_RSP_OP(cmd, 1, 0, 64, uint64_t, irq_cfg->addr);\
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MC_RSP_OP(cmd, 2, 0, 32, int, irq_cfg->irq_num); \
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MC_RSP_OP(cmd, 2, 32, 32, int, type); \
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} while (0)
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/* cmd, param, offset, width, type, arg_name */
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#define DPDMAI_CMD_SET_IRQ_ENABLE(cmd, irq_index, enable_state) \
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do { \
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MC_CMD_OP(cmd, 0, 0, 8, uint8_t, enable_state); \
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MC_CMD_OP(cmd, 0, 32, 8, uint8_t, irq_index); \
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} while (0)
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/* cmd, param, offset, width, type, arg_name */
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#define DPDMAI_CMD_GET_IRQ_ENABLE(cmd, irq_index) \
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MC_CMD_OP(cmd, 0, 32, 8, uint8_t, irq_index)
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/* cmd, param, offset, width, type, arg_name */
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#define DPDMAI_RSP_GET_IRQ_ENABLE(cmd, enable_state) \
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MC_RSP_OP(cmd, 0, 0, 8, uint8_t, enable_state)
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/* cmd, param, offset, width, type, arg_name */
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#define DPDMAI_CMD_SET_IRQ_MASK(cmd, irq_index, mask) \
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do { \
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MC_CMD_OP(cmd, 0, 0, 32, uint32_t, mask); \
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MC_CMD_OP(cmd, 0, 32, 8, uint8_t, irq_index); \
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} while (0)
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/* cmd, param, offset, width, type, arg_name */
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#define DPDMAI_CMD_GET_IRQ_MASK(cmd, irq_index) \
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MC_CMD_OP(cmd, 0, 32, 8, uint8_t, irq_index)
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/* cmd, param, offset, width, type, arg_name */
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#define DPDMAI_RSP_GET_IRQ_MASK(cmd, mask) \
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MC_RSP_OP(cmd, 0, 0, 32, uint32_t, mask)
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/* cmd, param, offset, width, type, arg_name */
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#define DPDMAI_CMD_GET_IRQ_STATUS(cmd, irq_index, status) \
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do { \
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MC_CMD_OP(cmd, 0, 0, 32, uint32_t, status);\
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MC_CMD_OP(cmd, 0, 32, 8, uint8_t, irq_index);\
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} while (0)
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/* cmd, param, offset, width, type, arg_name */
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#define DPDMAI_RSP_GET_IRQ_STATUS(cmd, status) \
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MC_RSP_OP(cmd, 0, 0, 32, uint32_t, status)
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/* cmd, param, offset, width, type, arg_name */
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#define DPDMAI_CMD_CLEAR_IRQ_STATUS(cmd, irq_index, status) \
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do { \
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MC_CMD_OP(cmd, 0, 0, 32, uint32_t, status); \
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MC_CMD_OP(cmd, 0, 32, 8, uint8_t, irq_index); \
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} while (0)
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/* cmd, param, offset, width, type, arg_name */
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#define DPDMAI_RSP_GET_ATTR(cmd, attr) \
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do { \
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MC_RSP_OP(cmd, 0, 0, 32, int, attr->id); \
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MC_RSP_OP(cmd, 0, 32, 8, uint8_t, attr->num_of_priorities); \
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MC_RSP_OP(cmd, 1, 0, 16, uint16_t, attr->version.major);\
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MC_RSP_OP(cmd, 1, 16, 16, uint16_t, attr->version.minor);\
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} while (0)
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/* cmd, param, offset, width, type, arg_name */
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#define DPDMAI_CMD_SET_RX_QUEUE(cmd, priority, cfg) \
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do { \
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MC_CMD_OP(cmd, 0, 0, 32, int, cfg->dest_cfg.dest_id); \
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MC_CMD_OP(cmd, 0, 32, 8, uint8_t, cfg->dest_cfg.priority); \
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MC_CMD_OP(cmd, 0, 40, 8, uint8_t, priority); \
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MC_CMD_OP(cmd, 0, 48, 4, enum dpdmai_dest, cfg->dest_cfg.dest_type); \
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MC_CMD_OP(cmd, 1, 0, 64, uint64_t, cfg->user_ctx); \
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MC_CMD_OP(cmd, 2, 0, 32, uint32_t, cfg->options);\
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} while (0)
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/* cmd, param, offset, width, type, arg_name */
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#define DPDMAI_CMD_GET_RX_QUEUE(cmd, priority) \
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MC_CMD_OP(cmd, 0, 40, 8, uint8_t, priority)
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/* cmd, param, offset, width, type, arg_name */
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#define DPDMAI_RSP_GET_RX_QUEUE(cmd, attr) \
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do { \
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MC_RSP_OP(cmd, 0, 0, 32, int, attr->dest_cfg.dest_id);\
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MC_RSP_OP(cmd, 0, 32, 8, uint8_t, attr->dest_cfg.priority);\
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MC_RSP_OP(cmd, 0, 48, 4, enum dpdmai_dest, attr->dest_cfg.dest_type);\
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MC_RSP_OP(cmd, 1, 0, 64, uint64_t, attr->user_ctx);\
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MC_RSP_OP(cmd, 2, 0, 32, uint32_t, attr->fqid);\
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} while (0)
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/* cmd, param, offset, width, type, arg_name */
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#define DPDMAI_CMD_GET_TX_QUEUE(cmd, priority) \
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MC_CMD_OP(cmd, 0, 40, 8, uint8_t, priority)
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/* cmd, param, offset, width, type, arg_name */
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#define DPDMAI_RSP_GET_TX_QUEUE(cmd, attr) \
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MC_RSP_OP(cmd, 1, 0, 32, uint32_t, attr->fqid)
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#endif /* _FSL_DPDMAI_CMD_H */
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