52 lines
2.0 KiB
Plaintext
Executable File
52 lines
2.0 KiB
Plaintext
Executable File
* Freescale queue Direct Memory Access(qDMA) Controller
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The qDMA supports channel virtualization by allowing DMA jobs to be enqueued into
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different command queues. Core can initiate a DMA transaction by preparing a command
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descriptor for each DMA job and enqueuing this job to a command queue.
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* qDMA Controller
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Required properties:
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- compatible :
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should be "fsl,ls1021a-qdma".
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- reg : Specifies base physical address(s) and size of the qDMA registers.
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The 1st region is qDMA control register's address and size.
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The 2nd region is status queue control register's address and size.
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The 3rd region is virtual block control register's address and size.
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- interrupts : A list of interrupt-specifiers, one for each entry in
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interrupt-names.
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- interrupt-names : Should contain:
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"qdma-queue0" - the block0 interrupt
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"qdma-queue1" - the block1 interrupt
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"qdma-queue2" - the block2 interrupt
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"qdma-queue3" - the block3 interrupt
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"qdma-error" - the error interrupt
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- channels : Number of DMA channels supported
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- block-number : the virtual block number
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- block-offset : the offset of different virtual block
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- queues : the number of command queue per virtual block
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- status-sizes : status queue size of per virtual block
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- queue-sizes : command queue size of per virtual block, the size number based on queues
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- big-endian: If present registers and hardware scatter/gather descriptors
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of the qDMA are implemented in big endian mode, otherwise in little
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mode.
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Examples:
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qdma: qdma@8390000 {
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compatible = "fsl,ls1021a-qdma";
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reg = <0x0 0x8388000 0x0 0x1000>, /* Controller regs */
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<0x0 0x8389000 0x0 0x1000>, /* Status regs */
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<0x0 0x838a000 0x0 0x2000>; /* Block regs */
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interrupts = <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "qdma-error",
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"qdma-queue0", "qdma-queue1";
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channels = <8>;
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block-number = <2>;
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block-offset = <0x1000>;
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queues = <2>;
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status-sizes = <64>;
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queue-sizes = <64 64>;
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big-endian;
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};
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