// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
 * Device Tree file for Freescale LS1012A RDB Board.
 *
 * Copyright 2016 Freescale Semiconductor, Inc.
 *
 */
/dts-v1/;

#include "fsl-ls1012a.dtsi"

/ {
	model = "LS1012A RDB Board";
	compatible = "fsl,ls1012a-rdb", "fsl,ls1012a";

	aliases {
		ethernet0 = &pfe_mac0;
		ethernet1 = &pfe_mac1;
	};
};

&pcie {
	status = "okay";
};

&duart0 {
	status = "okay";
};

&esdhc0 {
	sd-uhs-sdr104;
	sd-uhs-sdr50;
	sd-uhs-sdr25;
	sd-uhs-sdr12;
	status = "okay";
};

&esdhc1 {
	mmc-hs200-1_8v;
	status = "okay";
};

&i2c0 {
	status = "okay";
};

&sata {
	status = "okay";
};

&pfe {
	status = "okay";
	#address-cells = <1>;
	#size-cells = <0>;

	ethernet@0 {
		compatible = "fsl,pfe-gemac-port";
		#address-cells = <1>;
		#size-cells = <0>;
		reg = <0x0>;	/* GEM_ID */
		fsl,gemac-bus-id = <0x0>;	/* BUS_ID */
		fsl,gemac-phy-id = <0x2>;	/* PHY_ID */
		fsl,mdio-mux-val = <0x0>;
		phy-mode = "sgmii";
		fsl,pfe-phy-if-flags = <0x0>;

		mdio@0 {
			reg = <0x1>; /* enabled/disabled */
		};
	};

	ethernet@1 {
		compatible = "fsl,pfe-gemac-port";
		#address-cells = <1>;
		#size-cells = <0>;
		reg = <0x1>;	/* GEM_ID */
		fsl,gemac-bus-id = < 0x1 >;	/* BUS_ID */
		fsl,gemac-phy-id = < 0x1 >;	/* PHY_ID */
		fsl,mdio-mux-val = <0x0>;
		phy-mode = "rgmii-txid";
		fsl,pfe-phy-if-flags = <0x0>;

		mdio@0 {
			reg = <0x0>; /* enabled/disabled */
		};
	};
};

&qspi {
	status = "okay";
	qflash0: s25fs512s@0 {
		compatible = "spansion,m25p80";
		#address-cells = <1>;
		#size-cells = <1>;
		spi-max-frequency = <20000000>;
		m25p,fast-read;
		reg = <0>;
		spi-rx-bus-width = <2>;
		spi-tx-bus-width = <2>;
	};

};