Mod aaa-12 忽略模块编译生成的中间文件

RCA： SOL：修改人：huangxin 检视人：huangxin
2019-07-29 16:34:46 +08:00 · 2019-07-29 16:34:46 +08:00 · ec916db6fb
parent dffbdde946
commit ec916db6fb
1 changed files with 1 additions and 0 deletions
--- a/.gitignore
+++ b/.gitignore
@ -7,6 +7,7 @@
 *.mod.c
 Module.symvers
 modules.order
+*.o.d

 GPATH
 GRTAGS