461 lines
11 KiB
C
461 lines
11 KiB
C
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/*
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* Driver for Aquantia PHY
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*
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* Author: Shaohui Xie <Shaohui.Xie@freescale.com>
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*
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* Copyright 2015 Freescale Semiconductor, Inc.
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* Copyright 2018 NXP
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*
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* This file is licensed under the terms of the GNU General Public License
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* version 2. This program is licensed "as is" without any warranty of any
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* kind, whether express or implied.
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/delay.h>
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#include <linux/mii.h>
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#include <linux/ethtool.h>
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#include <linux/phy.h>
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#include <linux/mdio.h>
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#define PHY_ID_AQ1202 0x03a1b445
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#define PHY_ID_AQ2104 0x03a1b460
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#define PHY_ID_AQR105 0x03a1b4a2
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#define PHY_ID_AQR106 0x03a1b4d0
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#define PHY_ID_AQR107 0x03a1b4e0
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#define PHY_ID_AQR405 0x03a1b4b0
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#define PHY_AQUANTIA_FEATURES (SUPPORTED_10000baseT_Full | \
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SUPPORTED_1000baseT_Full | \
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SUPPORTED_2500baseX_Full | \
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SUPPORTED_100baseT_Full | \
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PHY_DEFAULT_FEATURES)
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#define MDIO_PMA_CTRL1_AQ_SPEED10 0
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#define MDIO_PMA_CTRL1_AQ_SPEED2500 0x2058
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#define MDIO_PMA_CTRL1_AQ_SPEED5000 0x205c
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#define MDIO_PMA_CTRL2_AQ_2500BT 0x30
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#define MDIO_PMA_CTRL2_AQ_5000BT 0x31
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#define MDIO_PMA_CTRL2_AQ_TYPE_MASK 0x3F
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#define MDIO_AN_VENDOR_PROV_CTRL 0xc400
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#define MDIO_AN_RECV_LP_STATUS 0xe820
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static int aquantia_write_reg(struct phy_device *phydev, int devad,
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u32 regnum, u16 val)
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{
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u32 addr = MII_ADDR_C45 | (devad << 16) | (regnum & 0xffff);
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return mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, addr, val);
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}
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static int aquantia_read_reg(struct phy_device *phydev, int devad, u32 regnum)
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{
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u32 addr = MII_ADDR_C45 | (devad << 16) | (regnum & 0xffff);
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return mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, addr);
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}
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static int aquantia_pma_setup_forced(struct phy_device *phydev)
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{
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int ctrl1, ctrl2, ret;
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/* Half duplex is not supported */
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if (phydev->duplex != DUPLEX_FULL)
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return -EINVAL;
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ctrl1 = aquantia_read_reg(phydev, MDIO_MMD_PMAPMD, MDIO_CTRL1);
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if (ctrl1 < 0)
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return ctrl1;
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ctrl2 = aquantia_read_reg(phydev, MDIO_MMD_PMAPMD, MDIO_CTRL2);
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if (ctrl2 < 0)
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return ctrl2;
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ctrl1 &= ~MDIO_CTRL1_SPEEDSEL;
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ctrl2 &= ~(MDIO_PMA_CTRL2_AQ_TYPE_MASK);
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switch (phydev->speed) {
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case SPEED_10:
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ctrl2 |= MDIO_PMA_CTRL2_10BT;
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break;
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case SPEED_100:
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ctrl1 |= MDIO_PMA_CTRL1_SPEED100;
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ctrl2 |= MDIO_PMA_CTRL2_100BTX;
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break;
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case SPEED_1000:
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ctrl1 |= MDIO_PMA_CTRL1_SPEED1000;
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/* Assume 1000base-T */
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ctrl2 |= MDIO_PMA_CTRL2_1000BT;
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break;
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case SPEED_10000:
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ctrl1 |= MDIO_CTRL1_SPEED10G;
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/* Assume 10Gbase-T */
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ctrl2 |= MDIO_PMA_CTRL2_10GBT;
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break;
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case SPEED_2500:
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ctrl1 |= MDIO_PMA_CTRL1_AQ_SPEED2500;
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ctrl2 |= MDIO_PMA_CTRL2_AQ_2500BT;
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break;
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case SPEED_5000:
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ctrl1 |= MDIO_PMA_CTRL1_AQ_SPEED5000;
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ctrl2 |= MDIO_PMA_CTRL2_AQ_5000BT;
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break;
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default:
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return -EINVAL;
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}
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ret = aquantia_write_reg(phydev, MDIO_MMD_PMAPMD, MDIO_CTRL1, ctrl1);
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if (ret < 0)
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return ret;
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return aquantia_write_reg(phydev, MDIO_MMD_PMAPMD, MDIO_CTRL2, ctrl2);
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}
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static int aquantia_aneg(struct phy_device *phydev, bool control)
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{
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int reg = aquantia_read_reg(phydev, MDIO_MMD_AN, MDIO_CTRL1);
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if (reg < 0)
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return reg;
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if (control)
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reg |= MDIO_AN_CTRL1_ENABLE | MDIO_AN_CTRL1_RESTART;
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else
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reg &= ~(MDIO_AN_CTRL1_ENABLE | MDIO_AN_CTRL1_RESTART);
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return aquantia_write_reg(phydev, MDIO_MMD_AN, MDIO_CTRL1, reg);
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}
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static int aquantia_config_advert(struct phy_device *phydev)
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{
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u32 advertise;
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int oldadv, adv, oldadv1, adv1;
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int err, changed = 0;
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/* Only allow advertising what this PHY supports */
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phydev->advertising &= phydev->supported;
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advertise = phydev->advertising;
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/* Setup standard advertisement */
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oldadv = aquantia_read_reg(phydev, MDIO_MMD_AN,
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MDIO_AN_10GBT_CTRL);
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if (oldadv < 0)
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return oldadv;
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/* Aquantia vendor specific advertisments */
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oldadv1 = aquantia_read_reg(phydev, MDIO_MMD_AN,
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MDIO_AN_VENDOR_PROV_CTRL);
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if (oldadv1 < 0)
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return oldadv1;
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adv = 0;
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adv1 = 0;
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/*100BaseT_full is supported by default*/
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if (advertise & ADVERTISED_1000baseT_Full)
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adv1 |= 0x8000;
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if (advertise & ADVERTISED_10000baseT_Full)
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adv |= 0x1000;
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if (advertise & ADVERTISED_2500baseX_Full)
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adv1 |= 0x400;
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if (adv != oldadv) {
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err = aquantia_write_reg(phydev, MDIO_MMD_AN,
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MDIO_AN_10GBT_CTRL, adv);
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if (err < 0)
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return err;
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changed = 1;
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}
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if (adv1 != oldadv1) {
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err = aquantia_write_reg(phydev, MDIO_MMD_AN,
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MDIO_AN_VENDOR_PROV_CTRL, adv1);
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if (err < 0)
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return err;
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changed = 1;
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}
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return changed;
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}
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static int aquantia_config_aneg(struct phy_device *phydev)
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{
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int ret = 0;
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phydev->supported = PHY_AQUANTIA_FEATURES;
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if (phydev->autoneg == AUTONEG_DISABLE) {
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aquantia_pma_setup_forced(phydev);
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return aquantia_aneg(phydev, false);
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}
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ret = aquantia_config_advert(phydev);
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if (ret > 0)
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/* restart autoneg */
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return aquantia_aneg(phydev, true);
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return ret;
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}
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static int aquantia_aneg_done(struct phy_device *phydev)
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{
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int reg;
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reg = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_STAT1);
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return (reg < 0) ? reg : (reg & BMSR_ANEGCOMPLETE);
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}
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static int aquantia_config_intr(struct phy_device *phydev)
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{
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int err;
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if (phydev->interrupts == PHY_INTERRUPT_ENABLED) {
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err = aquantia_write_reg(phydev, MDIO_MMD_AN, 0xd401, 1);
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if (err < 0)
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return err;
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err = aquantia_write_reg(phydev, MDIO_MMD_VEND1, 0xff00, 1);
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if (err < 0)
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return err;
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err = aquantia_write_reg(phydev, MDIO_MMD_VEND1,
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0xff01, 0x1001);
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} else {
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err = aquantia_write_reg(phydev, MDIO_MMD_AN, 0xd401, 0);
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if (err < 0)
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return err;
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err = aquantia_write_reg(phydev, MDIO_MMD_VEND1, 0xff00, 0);
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if (err < 0)
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return err;
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err = aquantia_write_reg(phydev, MDIO_MMD_VEND1, 0xff01, 0);
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}
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return err;
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}
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static int aquantia_ack_interrupt(struct phy_device *phydev)
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{
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int reg;
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reg = aquantia_read_reg(phydev, MDIO_MMD_AN, 0xcc01);
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return (reg < 0) ? reg : 0;
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}
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static int aquantia_read_advert(struct phy_device *phydev)
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{
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int adv, adv1;
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/* Setup standard advertisement */
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adv = aquantia_read_reg(phydev, MDIO_MMD_AN,
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MDIO_AN_10GBT_CTRL);
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/* Aquantia vendor specific advertisments */
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adv1 = aquantia_read_reg(phydev, MDIO_MMD_AN,
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MDIO_AN_VENDOR_PROV_CTRL);
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/*100BaseT_full is supported by default*/
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phydev->advertising |= ADVERTISED_100baseT_Full;
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if (adv & 0x1000)
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phydev->advertising |= ADVERTISED_10000baseT_Full;
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else
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phydev->advertising &= ~ADVERTISED_10000baseT_Full;
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if (adv1 & 0x8000)
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phydev->advertising |= ADVERTISED_1000baseT_Full;
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else
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phydev->advertising &= ~ADVERTISED_1000baseT_Full;
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if (adv1 & 0x400)
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phydev->advertising |= ADVERTISED_2500baseX_Full;
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else
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phydev->advertising &= ~ADVERTISED_2500baseX_Full;
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return 0;
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}
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static int aquantia_read_lp_advert(struct phy_device *phydev)
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{
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int adv, adv1;
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/* Read standard link partner advertisement */
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adv = aquantia_read_reg(phydev, MDIO_MMD_AN,
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MDIO_STAT1);
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if (adv & 0x1)
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phydev->lp_advertising |= ADVERTISED_Autoneg |
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ADVERTISED_100baseT_Full;
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else
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phydev->lp_advertising &= ~(ADVERTISED_Autoneg |
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ADVERTISED_100baseT_Full);
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/* Read standard link partner advertisement */
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adv = aquantia_read_reg(phydev, MDIO_MMD_AN,
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MDIO_AN_10GBT_STAT);
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/* Aquantia link partner advertisments */
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adv1 = aquantia_read_reg(phydev, MDIO_MMD_AN,
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MDIO_AN_RECV_LP_STATUS);
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if (adv & 0x800)
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phydev->lp_advertising |= ADVERTISED_10000baseT_Full;
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else
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phydev->lp_advertising &= ~ADVERTISED_10000baseT_Full;
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if (adv1 & 0x8000)
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phydev->lp_advertising |= ADVERTISED_1000baseT_Full;
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else
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phydev->lp_advertising &= ~ADVERTISED_1000baseT_Full;
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if (adv1 & 0x400)
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phydev->lp_advertising |= ADVERTISED_2500baseX_Full;
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else
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phydev->lp_advertising &= ~ADVERTISED_2500baseX_Full;
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return 0;
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}
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static int aquantia_read_status(struct phy_device *phydev)
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{
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int reg;
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/* Read the link status twice; the bit is latching low */
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reg = aquantia_read_reg(phydev, MDIO_MMD_AN, MDIO_STAT1);
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reg = aquantia_read_reg(phydev, MDIO_MMD_AN, MDIO_STAT1);
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if (reg & MDIO_STAT1_LSTATUS)
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phydev->link = 1;
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else
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phydev->link = 0;
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mdelay(10);
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reg = aquantia_read_reg(phydev, MDIO_MMD_PMAPMD, MDIO_CTRL1);
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if ((reg & MDIO_CTRL1_SPEEDSELEXT) == MDIO_CTRL1_SPEEDSELEXT)
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reg &= MDIO_CTRL1_SPEEDSEL;
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else
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reg &= MDIO_CTRL1_SPEEDSELEXT;
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switch (reg) {
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case MDIO_PMA_CTRL1_AQ_SPEED5000:
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phydev->speed = SPEED_5000;
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break;
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case MDIO_PMA_CTRL1_AQ_SPEED2500:
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phydev->speed = SPEED_2500;
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break;
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case MDIO_PMA_CTRL1_AQ_SPEED10:
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phydev->speed = SPEED_10;
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break;
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case MDIO_PMA_CTRL1_SPEED100:
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phydev->speed = SPEED_100;
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break;
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case MDIO_PMA_CTRL1_SPEED1000:
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phydev->speed = SPEED_1000;
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break;
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case MDIO_CTRL1_SPEED10G:
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phydev->speed = SPEED_10000;
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break;
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default:
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phydev->speed = SPEED_UNKNOWN;
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break;
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}
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phydev->duplex = DUPLEX_FULL;
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aquantia_read_advert(phydev);
|
||
|
|
aquantia_read_lp_advert(phydev);
|
||
|
|
|
||
|
|
return 0;
|
||
|
|
}
|
||
|
|
|
||
|
|
static struct phy_driver aquantia_driver[] = {
|
||
|
|
{
|
||
|
|
.phy_id = PHY_ID_AQ1202,
|
||
|
|
.phy_id_mask = 0xfffffff0,
|
||
|
|
.name = "Aquantia AQ1202",
|
||
|
|
.features = PHY_AQUANTIA_FEATURES,
|
||
|
|
.flags = PHY_HAS_INTERRUPT,
|
||
|
|
.aneg_done = aquantia_aneg_done,
|
||
|
|
.config_aneg = aquantia_config_aneg,
|
||
|
|
.config_intr = aquantia_config_intr,
|
||
|
|
.ack_interrupt = aquantia_ack_interrupt,
|
||
|
|
.read_status = aquantia_read_status,
|
||
|
|
},
|
||
|
|
{
|
||
|
|
.phy_id = PHY_ID_AQ2104,
|
||
|
|
.phy_id_mask = 0xfffffff0,
|
||
|
|
.name = "Aquantia AQ2104",
|
||
|
|
.features = PHY_AQUANTIA_FEATURES,
|
||
|
|
.flags = PHY_HAS_INTERRUPT,
|
||
|
|
.aneg_done = aquantia_aneg_done,
|
||
|
|
.config_aneg = aquantia_config_aneg,
|
||
|
|
.config_intr = aquantia_config_intr,
|
||
|
|
.ack_interrupt = aquantia_ack_interrupt,
|
||
|
|
.read_status = aquantia_read_status,
|
||
|
|
},
|
||
|
|
{
|
||
|
|
.phy_id = PHY_ID_AQR105,
|
||
|
|
.phy_id_mask = 0xfffffff0,
|
||
|
|
.name = "Aquantia AQR105",
|
||
|
|
.features = PHY_AQUANTIA_FEATURES,
|
||
|
|
.flags = PHY_HAS_INTERRUPT,
|
||
|
|
.aneg_done = aquantia_aneg_done,
|
||
|
|
.config_aneg = aquantia_config_aneg,
|
||
|
|
.config_intr = aquantia_config_intr,
|
||
|
|
.ack_interrupt = aquantia_ack_interrupt,
|
||
|
|
.read_status = aquantia_read_status,
|
||
|
|
},
|
||
|
|
{
|
||
|
|
.phy_id = PHY_ID_AQR106,
|
||
|
|
.phy_id_mask = 0xfffffff0,
|
||
|
|
.name = "Aquantia AQR106",
|
||
|
|
.features = PHY_AQUANTIA_FEATURES,
|
||
|
|
.flags = PHY_HAS_INTERRUPT,
|
||
|
|
.aneg_done = aquantia_aneg_done,
|
||
|
|
.config_aneg = aquantia_config_aneg,
|
||
|
|
.config_intr = aquantia_config_intr,
|
||
|
|
.ack_interrupt = aquantia_ack_interrupt,
|
||
|
|
.read_status = aquantia_read_status,
|
||
|
|
},
|
||
|
|
{
|
||
|
|
.phy_id = PHY_ID_AQR107,
|
||
|
|
.phy_id_mask = 0xfffffff0,
|
||
|
|
.name = "Aquantia AQR107",
|
||
|
|
.features = PHY_AQUANTIA_FEATURES,
|
||
|
|
.flags = PHY_HAS_INTERRUPT,
|
||
|
|
.aneg_done = aquantia_aneg_done,
|
||
|
|
.config_aneg = aquantia_config_aneg,
|
||
|
|
.config_intr = aquantia_config_intr,
|
||
|
|
.ack_interrupt = aquantia_ack_interrupt,
|
||
|
|
.read_status = aquantia_read_status,
|
||
|
|
},
|
||
|
|
{
|
||
|
|
.phy_id = PHY_ID_AQR405,
|
||
|
|
.phy_id_mask = 0xfffffff0,
|
||
|
|
.name = "Aquantia AQR405",
|
||
|
|
.features = PHY_AQUANTIA_FEATURES,
|
||
|
|
.flags = PHY_HAS_INTERRUPT,
|
||
|
|
.aneg_done = aquantia_aneg_done,
|
||
|
|
.config_aneg = aquantia_config_aneg,
|
||
|
|
.config_intr = aquantia_config_intr,
|
||
|
|
.ack_interrupt = aquantia_ack_interrupt,
|
||
|
|
.read_status = aquantia_read_status,
|
||
|
|
},
|
||
|
|
};
|
||
|
|
|
||
|
|
module_phy_driver(aquantia_driver);
|
||
|
|
|
||
|
|
static struct mdio_device_id __maybe_unused aquantia_tbl[] = {
|
||
|
|
{ PHY_ID_AQ1202, 0xfffffff0 },
|
||
|
|
{ PHY_ID_AQ2104, 0xfffffff0 },
|
||
|
|
{ PHY_ID_AQR105, 0xfffffff0 },
|
||
|
|
{ PHY_ID_AQR106, 0xfffffff0 },
|
||
|
|
{ PHY_ID_AQR107, 0xfffffff0 },
|
||
|
|
{ PHY_ID_AQR405, 0xfffffff0 },
|
||
|
|
{ }
|
||
|
|
};
|
||
|
|
|
||
|
|
MODULE_DEVICE_TABLE(mdio, aquantia_tbl);
|
||
|
|
|
||
|
|
MODULE_DESCRIPTION("Aquantia PHY driver");
|
||
|
|
MODULE_AUTHOR("Shaohui Xie <Shaohui.Xie@freescale.com>");
|
||
|
|
MODULE_LICENSE("GPL v2");
|