mirror of https://github.com/F-Stack/f-stack.git
544 lines
24 KiB
C
544 lines
24 KiB
C
/*
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* Copyright 2008-2012 Freescale Semiconductor Inc.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* * Neither the name of Freescale Semiconductor nor the
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* names of its contributors may be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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*
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* ALTERNATIVELY, this software may be distributed under the terms of the
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* GNU General Public License ("GPL") as published by the Free Software
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* Foundation, either version 2 of that License or (at your option) any
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* later version.
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*
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* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
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* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
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* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
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* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/******************************************************************************
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@File fm_pcd.h
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@Description FM PCD ...
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*//***************************************************************************/
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#ifndef __FM_PCD_H
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#define __FM_PCD_H
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#include "std_ext.h"
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#include "error_ext.h"
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#include "list_ext.h"
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#include "fm_pcd_ext.h"
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#include "fm_common.h"
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#include "fsl_fman_prs.h"
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#include "fsl_fman_kg.h"
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#define __ERR_MODULE__ MODULE_FM_PCD
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/****************************/
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/* Defaults */
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/****************************/
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#define DEFAULT_plcrAutoRefresh FALSE
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#define DEFAULT_fmPcdKgErrorExceptions (FM_EX_KG_DOUBLE_ECC | FM_EX_KG_KEYSIZE_OVERFLOW)
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#define DEFAULT_fmPcdPlcrErrorExceptions (FM_PCD_EX_PLCR_DOUBLE_ECC | FM_PCD_EX_PLCR_INIT_ENTRY_ERROR)
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#define DEFAULT_fmPcdPlcrExceptions 0
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#define DEFAULT_fmPcdPrsErrorExceptions (FM_PCD_EX_PRS_DOUBLE_ECC)
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#define DEFAULT_fmPcdPrsExceptions FM_PCD_EX_PRS_SINGLE_ECC
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#define DEFAULT_numOfUsedProfilesPerWindow 16
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#define DEFAULT_numOfSharedPlcrProfiles 4
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/****************************/
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/* Network defines */
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/****************************/
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#define UDP_HEADER_SIZE 8
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#define ESP_SPI_OFFSET 0
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#define ESP_SPI_SIZE 4
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#define ESP_SEQ_NUM_OFFSET ESP_SPI_SIZE
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#define ESP_SEQ_NUM_SIZE 4
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/****************************/
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/* General defines */
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/****************************/
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#define ILLEGAL_CLS_PLAN 0xff
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#define ILLEGAL_NETENV 0xff
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#define FM_PCD_MAX_NUM_OF_ALIAS_HDRS 3
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/****************************/
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/* Error defines */
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/****************************/
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#define FM_PCD_EX_PLCR_DOUBLE_ECC 0x20000000
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#define FM_PCD_EX_PLCR_INIT_ENTRY_ERROR 0x10000000
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#define FM_PCD_EX_PLCR_PRAM_SELF_INIT_COMPLETE 0x08000000
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#define FM_PCD_EX_PLCR_ATOMIC_ACTION_COMPLETE 0x04000000
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#define GET_FM_PCD_EXCEPTION_FLAG(bitMask, exception) \
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switch (exception){ \
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case e_FM_PCD_KG_EXCEPTION_DOUBLE_ECC: \
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bitMask = FM_EX_KG_DOUBLE_ECC; break; \
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case e_FM_PCD_PLCR_EXCEPTION_DOUBLE_ECC: \
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bitMask = FM_PCD_EX_PLCR_DOUBLE_ECC; break; \
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case e_FM_PCD_KG_EXCEPTION_KEYSIZE_OVERFLOW: \
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bitMask = FM_EX_KG_KEYSIZE_OVERFLOW; break; \
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case e_FM_PCD_PLCR_EXCEPTION_INIT_ENTRY_ERROR: \
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bitMask = FM_PCD_EX_PLCR_INIT_ENTRY_ERROR; break; \
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case e_FM_PCD_PLCR_EXCEPTION_PRAM_SELF_INIT_COMPLETE: \
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bitMask = FM_PCD_EX_PLCR_PRAM_SELF_INIT_COMPLETE; break; \
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case e_FM_PCD_PLCR_EXCEPTION_ATOMIC_ACTION_COMPLETE: \
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bitMask = FM_PCD_EX_PLCR_ATOMIC_ACTION_COMPLETE; break; \
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case e_FM_PCD_PRS_EXCEPTION_DOUBLE_ECC: \
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bitMask = FM_PCD_EX_PRS_DOUBLE_ECC; break; \
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case e_FM_PCD_PRS_EXCEPTION_SINGLE_ECC: \
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bitMask = FM_PCD_EX_PRS_SINGLE_ECC; break; \
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default: bitMask = 0;break;}
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/***********************************************************************/
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/* Policer defines */
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/***********************************************************************/
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#define FM_PCD_PLCR_GCR_STEN 0x40000000
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#define FM_PCD_PLCR_DOUBLE_ECC 0x80000000
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#define FM_PCD_PLCR_INIT_ENTRY_ERROR 0x40000000
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#define FM_PCD_PLCR_PRAM_SELF_INIT_COMPLETE 0x80000000
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#define FM_PCD_PLCR_ATOMIC_ACTION_COMPLETE 0x40000000
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/***********************************************************************/
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/* Memory map */
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/***********************************************************************/
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#if defined(__MWERKS__) && !defined(__GNUC__)
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#pragma pack(push,1)
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#endif /* defined(__MWERKS__) && ... */
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typedef struct {
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/* General Configuration and Status Registers */
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volatile uint32_t fmpl_gcr; /* 0x000 FMPL_GCR - FM Policer General Configuration */
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volatile uint32_t fmpl_gsr; /* 0x004 FMPL_GSR - FM Policer Global Status Register */
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volatile uint32_t fmpl_evr; /* 0x008 FMPL_EVR - FM Policer Event Register */
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volatile uint32_t fmpl_ier; /* 0x00C FMPL_IER - FM Policer Interrupt Enable Register */
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volatile uint32_t fmpl_ifr; /* 0x010 FMPL_IFR - FM Policer Interrupt Force Register */
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volatile uint32_t fmpl_eevr; /* 0x014 FMPL_EEVR - FM Policer Error Event Register */
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volatile uint32_t fmpl_eier; /* 0x018 FMPL_EIER - FM Policer Error Interrupt Enable Register */
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volatile uint32_t fmpl_eifr; /* 0x01C FMPL_EIFR - FM Policer Error Interrupt Force Register */
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/* Global Statistic Counters */
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volatile uint32_t fmpl_rpcnt; /* 0x020 FMPL_RPC - FM Policer RED Packets Counter */
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volatile uint32_t fmpl_ypcnt; /* 0x024 FMPL_YPC - FM Policer YELLOW Packets Counter */
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volatile uint32_t fmpl_rrpcnt; /* 0x028 FMPL_RRPC - FM Policer Recolored RED Packet Counter */
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volatile uint32_t fmpl_rypcnt; /* 0x02C FMPL_RYPC - FM Policer Recolored YELLOW Packet Counter */
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volatile uint32_t fmpl_tpcnt; /* 0x030 FMPL_TPC - FM Policer Total Packet Counter */
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volatile uint32_t fmpl_flmcnt; /* 0x034 FMPL_FLMC - FM Policer Frame Length Mismatch Counter */
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volatile uint32_t fmpl_res0[21]; /* 0x038 - 0x08B Reserved */
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/* Profile RAM Access Registers */
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volatile uint32_t fmpl_par; /* 0x08C FMPL_PAR - FM Policer Profile Action Register*/
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t_FmPcdPlcrProfileRegs profileRegs;
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/* Error Capture Registers */
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volatile uint32_t fmpl_serc; /* 0x100 FMPL_SERC - FM Policer Soft Error Capture */
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volatile uint32_t fmpl_upcr; /* 0x104 FMPL_UPCR - FM Policer Uninitialized Profile Capture Register */
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volatile uint32_t fmpl_res2; /* 0x108 Reserved */
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/* Debug Registers */
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volatile uint32_t fmpl_res3[61]; /* 0x10C-0x200 Reserved Debug*/
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/* Profile Selection Mapping Registers Per Port-ID (n=1-11, 16) */
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volatile uint32_t fmpl_dpmr; /* 0x200 FMPL_DPMR - FM Policer Default Mapping Register */
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volatile uint32_t fmpl_pmr[63]; /*+default 0x204-0x2FF FMPL_PMR1 - FMPL_PMR63, - FM Policer Profile Mapping Registers.
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(for port-ID 1-11, only for supported Port-ID registers) */
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} t_FmPcdPlcrRegs;
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#if defined(__MWERKS__) && !defined(__GNUC__)
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#pragma pack(pop)
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#endif /* defined(__MWERKS__) && ... */
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/***********************************************************************/
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/* Driver's internal structures */
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/***********************************************************************/
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typedef struct {
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bool known;
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uint8_t id;
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} t_FmPcdKgSchemesExtractsEntry;
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typedef struct {
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t_FmPcdKgSchemesExtractsEntry extractsArray[FM_PCD_KG_MAX_NUM_OF_EXTRACTS_PER_KEY];
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} t_FmPcdKgSchemesExtracts;
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typedef struct {
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t_Handle h_Manip;
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bool keepRes;
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e_FmPcdEngine nextEngine;
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uint8_t parseCode;
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} t_FmPcdInfoForManip;
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/**************************************************************************//**
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@Description A structure of parameters to communicate
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between the port and PCD regarding the KG scheme.
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*//***************************************************************************/
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typedef struct {
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uint8_t netEnvId; /* in */
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uint8_t numOfDistinctionUnits; /* in */
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uint8_t unitIds[FM_PCD_MAX_NUM_OF_DISTINCTION_UNITS]; /* in */
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uint32_t vector; /* out */
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} t_NetEnvParams;
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typedef struct {
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bool allocated;
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uint8_t ownerId; /* guestId for KG in multi-partition only.
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portId for PLCR in any environment */
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} t_FmPcdAllocMng;
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typedef struct {
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volatile bool lock;
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bool used;
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uint8_t owners;
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uint8_t netEnvId;
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uint8_t guestId;
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uint8_t baseEntry;
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uint16_t sizeOfGrp;
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protocolOpt_t optArray[FM_PCD_MAX_NUM_OF_OPTIONS(FM_PCD_MAX_NUM_OF_CLS_PLANS)];
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} t_FmPcdKgClsPlanGrp;
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typedef struct {
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t_Handle h_FmPcd;
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uint8_t schemeId;
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t_FmPcdLock *p_Lock;
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bool valid;
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uint8_t netEnvId;
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uint8_t owners;
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uint32_t matchVector;
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uint32_t ccUnits;
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bool nextRelativePlcrProfile;
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uint16_t relativeProfileId;
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uint16_t numOfProfiles;
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t_FmPcdKgKeyOrder orderedArray;
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e_FmPcdEngine nextEngine;
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e_FmPcdDoneAction doneAction;
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bool requiredActionFlag;
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uint32_t requiredAction;
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bool extractedOrs;
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uint8_t bitOffsetInPlcrProfile;
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bool directPlcr;
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#if (DPAA_VERSION >= 11)
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bool vspe;
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#endif
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} t_FmPcdKgScheme;
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typedef union {
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struct fman_kg_scheme_regs schemeRegs;
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struct fman_kg_pe_regs portRegs;
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struct fman_kg_cp_regs clsPlanRegs;
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} u_FmPcdKgIndirectAccessRegs;
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typedef struct {
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struct fman_kg_regs *p_FmPcdKgRegs;
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uint32_t schemeExceptionsBitMask;
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uint8_t numOfSchemes;
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t_Handle h_HwSpinlock;
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uint8_t schemesIds[FM_PCD_KG_NUM_OF_SCHEMES];
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t_FmPcdKgScheme schemes[FM_PCD_KG_NUM_OF_SCHEMES];
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t_FmPcdKgClsPlanGrp clsPlanGrps[FM_MAX_NUM_OF_PORTS];
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uint8_t emptyClsPlanGrpId;
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t_FmPcdAllocMng schemesMng[FM_PCD_KG_NUM_OF_SCHEMES]; /* only for MASTER ! */
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t_FmPcdAllocMng clsPlanBlocksMng[FM_PCD_MAX_NUM_OF_CLS_PLANS/CLS_PLAN_NUM_PER_GRP];
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u_FmPcdKgIndirectAccessRegs *p_IndirectAccessRegs;
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} t_FmPcdKg;
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typedef struct {
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uint16_t profilesBase;
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uint16_t numOfProfiles;
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t_Handle h_FmPort;
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} t_FmPcdPlcrMapParam;
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typedef struct {
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uint16_t absoluteProfileId;
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t_Handle h_FmPcd;
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bool valid;
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t_FmPcdLock *p_Lock;
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t_FmPcdAllocMng profilesMng;
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bool requiredActionFlag;
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uint32_t requiredAction;
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e_FmPcdEngine nextEngineOnGreen; /**< Green next engine type */
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u_FmPcdPlcrNextEngineParams paramsOnGreen; /**< Green next engine params */
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e_FmPcdEngine nextEngineOnYellow; /**< Yellow next engine type */
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u_FmPcdPlcrNextEngineParams paramsOnYellow; /**< Yellow next engine params */
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e_FmPcdEngine nextEngineOnRed; /**< Red next engine type */
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u_FmPcdPlcrNextEngineParams paramsOnRed; /**< Red next engine params */
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} t_FmPcdPlcrProfile;
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typedef struct {
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t_FmPcdPlcrRegs *p_FmPcdPlcrRegs;
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uint16_t partPlcrProfilesBase;
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uint16_t partNumOfPlcrProfiles;
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t_FmPcdPlcrProfile profiles[FM_PCD_PLCR_NUM_ENTRIES];
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uint16_t numOfSharedProfiles;
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uint16_t sharedProfilesIds[FM_PCD_PLCR_NUM_ENTRIES];
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t_FmPcdPlcrMapParam portsMapping[FM_MAX_NUM_OF_PORTS];
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t_Handle h_HwSpinlock;
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t_Handle h_SwSpinlock;
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} t_FmPcdPlcr;
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typedef struct {
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uint32_t *p_SwPrsCode;
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uint32_t *p_CurrSwPrs;
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uint8_t currLabel;
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struct fman_prs_regs *p_FmPcdPrsRegs;
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t_FmPcdPrsLabelParams labelsTable[FM_PCD_PRS_NUM_OF_LABELS];
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uint32_t fmPcdPrsPortIdStatistics;
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} t_FmPcdPrs;
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typedef struct {
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struct {
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e_NetHeaderType hdr;
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protocolOpt_t opt; /* only one option !! */
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} hdrs[FM_PCD_MAX_NUM_OF_INTERCHANGEABLE_HDRS];
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} t_FmPcdIntDistinctionUnit;
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typedef struct {
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e_NetHeaderType hdr;
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protocolOpt_t opt; /* only one option !! */
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e_NetHeaderType aliasHdr;
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} t_FmPcdNetEnvAliases;
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typedef struct {
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uint8_t netEnvId;
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t_Handle h_FmPcd;
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t_Handle h_Spinlock;
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bool used;
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uint8_t owners;
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uint8_t clsPlanGrpId;
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t_FmPcdIntDistinctionUnit units[FM_PCD_MAX_NUM_OF_DISTINCTION_UNITS];
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uint32_t unitsVectors[FM_PCD_MAX_NUM_OF_DISTINCTION_UNITS];
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uint32_t lcvs[FM_PCD_PRS_NUM_OF_HDRS];
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uint32_t macsecVector;
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t_FmPcdNetEnvAliases aliasHdrs[FM_PCD_MAX_NUM_OF_ALIAS_HDRS];
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} t_FmPcdNetEnv;
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typedef struct {
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struct fman_prs_cfg dfltCfg;
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bool plcrAutoRefresh;
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uint16_t prsMaxParseCycleLimit;
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} t_FmPcdDriverParam;
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typedef struct {
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t_Handle h_Fm;
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t_Handle h_FmMuram;
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t_FmRevisionInfo fmRevInfo;
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uint64_t physicalMuramBase;
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t_Handle h_Spinlock;
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t_List freeLocksLst;
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t_List acquiredLocksLst;
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t_Handle h_IpcSession; /* relevant for guest only */
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bool enabled;
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uint8_t guestId; /**< Guest Partition Id */
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uint8_t numOfEnabledGuestPartitionsPcds;
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char fmPcdModuleName[MODULE_NAME_SIZE];
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char fmPcdIpcHandlerModuleName[MODULE_NAME_SIZE]; /* relevant for guest only - this is the master's name */
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t_FmPcdNetEnv netEnvs[FM_MAX_NUM_OF_PORTS];
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t_FmPcdKg *p_FmPcdKg;
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t_FmPcdPlcr *p_FmPcdPlcr;
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t_FmPcdPrs *p_FmPcdPrs;
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void *p_CcShadow; /**< CC MURAM shadow */
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uint32_t ccShadowSize;
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uint32_t ccShadowAlign;
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volatile bool shadowLock;
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t_Handle h_ShadowSpinlock;
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t_Handle h_Hc;
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uint32_t exceptions;
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t_FmPcdExceptionCallback *f_Exception;
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t_FmPcdIdExceptionCallback *f_FmPcdIndexedException;
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t_Handle h_App;
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uintptr_t ipv6FrameIdAddr;
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uintptr_t capwapFrameIdAddr;
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bool advancedOffloadSupport;
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t_FmPcdDriverParam *p_FmPcdDriverParam;
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} t_FmPcd;
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#if (DPAA_VERSION >= 11)
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typedef uint8_t t_FmPcdFrmReplicUpdateType;
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#define FRM_REPLIC_UPDATE_COUNTER 0x01
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#define FRM_REPLIC_UPDATE_INFO 0x02
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#endif /* (DPAA_VERSION >= 11) */
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/***********************************************************************/
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/* PCD internal routines */
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/***********************************************************************/
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t_Error PcdGetVectorForOpt(t_FmPcd *p_FmPcd, uint8_t netEnvId, protocolOpt_t opt, uint32_t *p_Vector);
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t_Error PcdGetUnitsVector(t_FmPcd *p_FmPcd, t_NetEnvParams *p_Params);
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bool PcdNetEnvIsUnitWithoutOpts(t_FmPcd *p_FmPcd, uint8_t netEnvId, uint32_t unitVector);
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t_Error PcdGetClsPlanGrpParams(t_FmPcd *p_FmPcd, t_FmPcdKgInterModuleClsPlanGrpParams *p_GrpParams);
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void FmPcdSetClsPlanGrpId(t_FmPcd *p_FmPcd, uint8_t netEnvId, uint8_t clsPlanGrpId);
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e_NetHeaderType FmPcdGetAliasHdr(t_FmPcd *p_FmPcd, uint8_t netEnvId, e_NetHeaderType hdr);
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uint8_t FmPcdNetEnvGetUnitIdForSingleHdr(t_FmPcd *p_FmPcd, uint8_t netEnvId, e_NetHeaderType hdr);
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uint8_t FmPcdNetEnvGetUnitId(t_FmPcd *p_FmPcd, uint8_t netEnvId, e_NetHeaderType hdr, bool interchangeable, protocolOpt_t opt);
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t_Error FmPcdManipBuildIpReassmScheme(t_FmPcd *p_FmPcd, t_Handle h_NetEnv, t_Handle h_CcTree, t_Handle h_Manip, bool isIpv4, uint8_t groupId);
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t_Error FmPcdManipDeleteIpReassmSchemes(t_Handle h_Manip);
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t_Error FmPcdManipBuildCapwapReassmScheme(t_FmPcd *p_FmPcd, t_Handle h_NetEnv, t_Handle h_CcTree, t_Handle h_Manip, uint8_t groupId);
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t_Error FmPcdManipDeleteCapwapReassmSchemes(t_Handle h_Manip);
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bool FmPcdManipIpReassmIsIpv6Hdr(t_Handle h_Manip);
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t_Handle KgConfig( t_FmPcd *p_FmPcd, t_FmPcdParams *p_FmPcdParams);
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t_Error KgInit(t_FmPcd *p_FmPcd);
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t_Error KgFree(t_FmPcd *p_FmPcd);
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void KgSetClsPlan(t_Handle h_FmPcd, t_FmPcdKgInterModuleClsPlanSet *p_Set);
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bool KgIsSchemeAlwaysDirect(t_Handle h_FmPcd, uint8_t schemeId);
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void KgEnable(t_FmPcd *p_FmPcd);
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void KgDisable(t_FmPcd *p_FmPcd);
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t_Error KgAllocClsPlanEntries(t_Handle h_FmPcd, uint16_t numOfClsPlanEntries, uint8_t guestId, uint8_t *p_First);
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void KgFreeClsPlanEntries(t_Handle h_FmPcd, uint16_t numOfClsPlanEntries, uint8_t guestId, uint8_t base);
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/* only for MULTI partittion */
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t_Error FmPcdKgAllocSchemes(t_Handle h_FmPcd, uint8_t numOfSchemes, uint8_t guestId, uint8_t *p_SchemesIds);
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t_Error FmPcdKgFreeSchemes(t_Handle h_FmPcd, uint8_t numOfSchemes, uint8_t guestId, uint8_t *p_SchemesIds);
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/* only for SINGLE partittion */
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t_Error KgBindPortToSchemes(t_Handle h_FmPcd , uint8_t hardwarePortId, uint32_t spReg);
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t_FmPcdLock *FmPcdAcquireLock(t_Handle h_FmPcd);
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void FmPcdReleaseLock(t_Handle h_FmPcd, t_FmPcdLock *p_Lock);
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t_Handle PlcrConfig(t_FmPcd *p_FmPcd, t_FmPcdParams *p_FmPcdParams);
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t_Error PlcrInit(t_FmPcd *p_FmPcd);
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t_Error PlcrFree(t_FmPcd *p_FmPcd);
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void PlcrEnable(t_FmPcd *p_FmPcd);
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void PlcrDisable(t_FmPcd *p_FmPcd);
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uint16_t PlcrAllocProfilesForPartition(t_FmPcd *p_FmPcd, uint16_t base, uint16_t numOfProfiles, uint8_t guestId);
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void PlcrFreeProfilesForPartition(t_FmPcd *p_FmPcd, uint16_t base, uint16_t numOfProfiles, uint8_t guestId);
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t_Error PlcrSetPortProfiles(t_FmPcd *p_FmPcd,
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uint8_t hardwarePortId,
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uint16_t numOfProfiles,
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uint16_t base);
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t_Error PlcrClearPortProfiles(t_FmPcd *p_FmPcd, uint8_t hardwarePortId);
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t_Handle PrsConfig(t_FmPcd *p_FmPcd,t_FmPcdParams *p_FmPcdParams);
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t_Error PrsInit(t_FmPcd *p_FmPcd);
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void PrsEnable(t_FmPcd *p_FmPcd);
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void PrsDisable(t_FmPcd *p_FmPcd);
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void PrsFree(t_FmPcd *p_FmPcd );
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t_Error PrsIncludePortInStatistics(t_FmPcd *p_FmPcd, uint8_t hardwarePortId, bool include);
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t_Error FmPcdCcGetGrpParams(t_Handle treeId, uint8_t grpId, uint32_t *p_GrpBits, uint8_t *p_GrpBase);
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uint8_t FmPcdCcGetOffset(t_Handle h_CcNode);
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uint8_t FmPcdCcGetParseCode(t_Handle h_CcNode);
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uint16_t FmPcdCcGetNumOfKeys(t_Handle h_CcNode);
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t_Error ValidateNextEngineParams(t_Handle h_FmPcd, t_FmPcdCcNextEngineParams *p_FmPcdCcNextEngineParams, e_FmPcdCcStatsMode supportedStatsMode);
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void FmPcdManipUpdateOwner(t_Handle h_Manip, bool add);
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t_Error FmPcdManipCheckParamsForCcNextEngine(t_FmPcdCcNextEngineParams *p_InfoForManip, uint32_t *requiredAction);
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void FmPcdManipUpdateAdResultForCc(t_Handle h_Manip,
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t_FmPcdCcNextEngineParams *p_CcNextEngineParams,
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t_Handle p_Ad,
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t_Handle *p_AdNewPtr);
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void FmPcdManipUpdateAdContLookupForCc(t_Handle h_Manip, t_Handle p_Ad, t_Handle *p_AdNew, uint32_t adTableOffset);
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void FmPcdManipUpdateOwner(t_Handle h_Manip, bool add);
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t_Error FmPcdManipCheckParamsWithCcNodeParams(t_Handle h_Manip, t_Handle h_FmPcdCcNode);
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#ifdef FM_CAPWAP_SUPPORT
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t_Handle FmPcdManipApplSpecificBuild(void);
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bool FmPcdManipIsCapwapApplSpecific(t_Handle h_Manip);
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#endif /* FM_CAPWAP_SUPPORT */
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#if (DPAA_VERSION >= 11)
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void * FrmReplicGroupGetSourceTableDescriptor(t_Handle h_ReplicGroup);
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void FrmReplicGroupUpdateOwner(t_Handle h_ReplicGroup, bool add);
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void FrmReplicGroupUpdateAd(t_Handle h_ReplicGroup, void *p_Ad, t_Handle *h_AdNew);
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void FmPcdCcGetAdTablesThatPointOnReplicGroup(t_Handle h_Node,
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t_Handle h_ReplicGroup,
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t_List *p_AdTables,
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uint32_t *p_NumOfAdTables);
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#endif /* (DPAA_VERSION >= 11) */
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void EnqueueNodeInfoToRelevantLst(t_List *p_List, t_CcNodeInformation *p_CcInfo, t_Handle h_Spinlock);
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void DequeueNodeInfoFromRelevantLst(t_List *p_List, t_Handle h_Info, t_Handle h_Spinlock);
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t_CcNodeInformation* FindNodeInfoInReleventLst(t_List *p_List, t_Handle h_Info, t_Handle h_Spinlock);
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t_List *FmPcdManipGetSpinlock(t_Handle h_Manip);
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t_List *FmPcdManipGetNodeLstPointedOnThisManip(t_Handle h_Manip);
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typedef struct
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{
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t_Handle h_StatsAd;
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t_Handle h_StatsCounters;
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#if (DPAA_VERSION >= 11)
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t_Handle h_StatsFLRs;
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#endif /* (DPAA_VERSION >= 11) */
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} t_FmPcdCcStatsParams;
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void NextStepAd(t_Handle h_Ad,
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t_FmPcdCcStatsParams *p_FmPcdCcStatsParams,
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t_FmPcdCcNextEngineParams *p_FmPcdCcNextEngineParams,
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|
t_FmPcd *p_FmPcd);
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void ReleaseLst(t_List *p_List);
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static __inline__ t_Handle FmPcdGetMuramHandle(t_Handle h_FmPcd)
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|
{
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t_FmPcd *p_FmPcd = (t_FmPcd*)h_FmPcd;
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ASSERT_COND(p_FmPcd);
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return p_FmPcd->h_FmMuram;
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}
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static __inline__ uint64_t FmPcdGetMuramPhysBase(t_Handle h_FmPcd)
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|
{
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|
t_FmPcd *p_FmPcd = (t_FmPcd*)h_FmPcd;
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ASSERT_COND(p_FmPcd);
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return p_FmPcd->physicalMuramBase;
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}
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static __inline__ uint32_t FmPcdLockSpinlock(t_FmPcdLock *p_Lock)
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|
{
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|
ASSERT_COND(p_Lock);
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|
return XX_LockIntrSpinlock(p_Lock->h_Spinlock);
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|
}
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|
static __inline__ void FmPcdUnlockSpinlock(t_FmPcdLock *p_Lock, uint32_t flags)
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|
{
|
|
ASSERT_COND(p_Lock);
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|
XX_UnlockIntrSpinlock(p_Lock->h_Spinlock, flags);
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|
}
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|
|
|
static __inline__ bool FmPcdLockTryLock(t_FmPcdLock *p_Lock)
|
|
{
|
|
uint32_t intFlags;
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|
|
|
ASSERT_COND(p_Lock);
|
|
intFlags = XX_LockIntrSpinlock(p_Lock->h_Spinlock);
|
|
if (p_Lock->flag)
|
|
{
|
|
XX_UnlockIntrSpinlock(p_Lock->h_Spinlock, intFlags);
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|
return FALSE;
|
|
}
|
|
p_Lock->flag = TRUE;
|
|
XX_UnlockIntrSpinlock(p_Lock->h_Spinlock, intFlags);
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|
return TRUE;
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|
}
|
|
|
|
static __inline__ void FmPcdLockUnlock(t_FmPcdLock *p_Lock)
|
|
{
|
|
ASSERT_COND(p_Lock);
|
|
p_Lock->flag = FALSE;
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|
}
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#endif /* __FM_PCD_H */
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