mirror of https://github.com/F-Stack/f-stack.git
499 lines
12 KiB
C
499 lines
12 KiB
C
/*-
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* SPDX-License-Identifier: BSD-2-Clause-FreeBSD
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*
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* Copyright (c) 2020 Alstom Group.
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* Copyright (c) 2020 Semihalf.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/bus.h>
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#include <sys/endian.h>
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#include <sys/gpio.h>
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#include <sys/kernel.h>
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#include <sys/module.h>
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#include <sys/mutex.h>
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#include <dev/gpio/gpiobusvar.h>
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#include <dev/ofw/ofw_bus.h>
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#include <machine/bus.h>
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#include "gpio_if.h"
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/* constants */
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enum {
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DIRECTION = 0x0,
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OPEN_DRAIN = 0x4,
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DATA = 0x8,
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INT_EV = 0xC,
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INT_MASK = 0x10,
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INT_CTRL = 0x14
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};
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#define PIN_COUNT 32
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#define DEFAULT_CAPS \
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(GPIO_PIN_INPUT | GPIO_PIN_OUTPUT | \
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GPIO_PIN_OPENDRAIN | GPIO_PIN_PUSHPULL)
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#define GPIO(n) (1 << (31 - (n)))
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struct gpio_res {
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int mem_rid;
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struct resource *mem_res;
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};
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/* software context */
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struct gpio_softc {
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device_t dev;
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device_t busdev;
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struct gpio_res res;
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struct gpio_pin setup[PIN_COUNT];
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struct mtx mutex;
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};
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#define QORIQ_GPIO_LOCK(_sc) mtx_lock_spin(&(_sc)->mutex)
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#define QORIQ_GPIO_UNLOCK(_sc) mtx_unlock_spin(&(_sc)->mutex)
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#define QORIQ_GPIO_ASSERT_LOCKED(_sc) mtx_assert(&(_sc)->mutex, MA_OWNED)
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/* prototypes */
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/* helpers */
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static bool qoriq_make_gpio_res(device_t, struct gpio_res*);
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static uint32_t qoriq_gpio_reg_read(device_t, uint32_t);
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static void qoriq_gpio_reg_write(device_t, uint32_t, uint32_t);
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static void qoriq_gpio_set(device_t, uint32_t, uint32_t, uint32_t);
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static int qoriq_gpio_configure(device_t, uint32_t, uint32_t);
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/* GPIO API */
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static int qoriq_gpio_probe(device_t);
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static int qoriq_gpio_attach(device_t);
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static device_t qoriq_gpio_get_bus(device_t);
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static int qoriq_gpio_pin_max(device_t, int*);
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static int qoriq_gpio_pin_getname(device_t, uint32_t, char*);
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static int qoriq_gpio_pin_getflags(device_t, uint32_t, uint32_t*);
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static int qoriq_gpio_pin_setflags(device_t, uint32_t, uint32_t);
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static int qoriq_gpio_pin_getcaps(device_t, uint32_t, uint32_t*);
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static int qoriq_gpio_pin_get(device_t, uint32_t, uint32_t*);
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static int qoriq_gpio_pin_set(device_t, uint32_t, uint32_t);
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static int qoriq_gpio_pin_toggle(device_t, uint32_t);
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static int qoriq_gpio_map_gpios(device_t, phandle_t, phandle_t,
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int, pcell_t*, uint32_t*, uint32_t*);
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static int qoriq_gpio_pin_access_32(device_t, uint32_t, uint32_t, uint32_t,
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uint32_t*);
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static int qoriq_gpio_pin_config_32(device_t, uint32_t, uint32_t, uint32_t*);
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static device_method_t qoriq_gpio_methods[] = {
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DEVMETHOD(device_probe, qoriq_gpio_probe),
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DEVMETHOD(device_attach, qoriq_gpio_attach),
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/* GPIO protocol */
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DEVMETHOD(gpio_get_bus, qoriq_gpio_get_bus),
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DEVMETHOD(gpio_pin_max, qoriq_gpio_pin_max),
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DEVMETHOD(gpio_pin_getname, qoriq_gpio_pin_getname),
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DEVMETHOD(gpio_pin_getflags, qoriq_gpio_pin_getflags),
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DEVMETHOD(gpio_pin_setflags, qoriq_gpio_pin_setflags),
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DEVMETHOD(gpio_pin_getcaps, qoriq_gpio_pin_getcaps),
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DEVMETHOD(gpio_pin_get, qoriq_gpio_pin_get),
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DEVMETHOD(gpio_pin_set, qoriq_gpio_pin_set),
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DEVMETHOD(gpio_pin_toggle, qoriq_gpio_pin_toggle),
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DEVMETHOD(gpio_map_gpios, qoriq_gpio_map_gpios),
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DEVMETHOD(gpio_pin_access_32, qoriq_gpio_pin_access_32),
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DEVMETHOD(gpio_pin_config_32, qoriq_gpio_pin_config_32),
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DEVMETHOD_END
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};
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static driver_t gpio_driver = {
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"gpio",
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qoriq_gpio_methods,
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sizeof(struct gpio_softc),
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};
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static devclass_t gpio_devclass;
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DRIVER_MODULE(gpio, simplebus, gpio_driver, gpio_devclass, 0, 0);
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MODULE_VERSION(gpio, 1);
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/*
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* helpers
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*/
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static bool
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qoriq_make_gpio_res(device_t dev, struct gpio_res *out)
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{
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out->mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
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&out->mem_rid, RF_ACTIVE | RF_SHAREABLE);
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return (out->mem_res == NULL);
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}
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static uint32_t
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qoriq_gpio_reg_read(device_t dev, uint32_t reg)
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{
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struct gpio_softc *sc = device_get_softc(dev);
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uint32_t result;
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QORIQ_GPIO_ASSERT_LOCKED(sc);
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result = bus_read_4(sc->res.mem_res, reg);
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return be32toh(result);
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}
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static void
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qoriq_gpio_reg_write(device_t dev, uint32_t reg, uint32_t val)
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{
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struct gpio_softc *sc = device_get_softc(dev);
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QORIQ_GPIO_ASSERT_LOCKED(sc);
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val = htobe32(val);
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bus_write_4(sc->res.mem_res, reg, val);
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bus_barrier(sc->res.mem_res, reg, 4, BUS_SPACE_BARRIER_READ |
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BUS_SPACE_BARRIER_WRITE);
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}
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static void
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qoriq_gpio_set(device_t dev, uint32_t reg, uint32_t pin, uint32_t set)
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{
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uint32_t val;
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set = set != 0;
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val = (qoriq_gpio_reg_read(dev, reg) & ~(1U << pin)) | (set << pin);
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qoriq_gpio_reg_write(dev, reg, val);
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}
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static int
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qoriq_gpio_configure(device_t dev, uint32_t pin, uint32_t flags)
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{
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struct gpio_softc *sc = device_get_softc(dev);
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uint32_t newflags;
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if (pin >= PIN_COUNT)
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return (EINVAL);
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/*
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* Pin cannot function as input and output at the same time.
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* The same applies to open-drain and push-pull functionality.
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*/
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if (((flags & GPIO_PIN_INPUT) && (flags & GPIO_PIN_OUTPUT)) ||
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((flags & GPIO_PIN_OPENDRAIN) && (flags & GPIO_PIN_PUSHPULL)))
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return (EINVAL);
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QORIQ_GPIO_ASSERT_LOCKED(sc);
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if (flags & GPIO_PIN_INPUT) {
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newflags = GPIO_PIN_INPUT;
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qoriq_gpio_set(dev, DIRECTION, pin, 0);
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}
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if (flags & GPIO_PIN_OUTPUT) {
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newflags = GPIO_PIN_OUTPUT;
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qoriq_gpio_set(dev, DIRECTION, pin, 1);
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if (flags & GPIO_PIN_OPENDRAIN) {
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newflags |= GPIO_PIN_OPENDRAIN;
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qoriq_gpio_set(dev, OPEN_DRAIN, pin, 1);
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} else {
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newflags |= GPIO_PIN_PUSHPULL;
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qoriq_gpio_set(dev, OPEN_DRAIN, pin, 0);
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}
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}
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sc->setup[pin].gp_flags = newflags;
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return (0);
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}
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/* GPIO API */
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static int
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qoriq_gpio_probe(device_t dev)
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{
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if (!ofw_bus_status_okay(dev))
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return (ENXIO);
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if (!ofw_bus_is_compatible(dev, "fsl,qoriq-gpio"))
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return (ENXIO);
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device_set_desc(dev, "Integrated GPIO Controller");
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return (BUS_PROBE_DEFAULT);
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}
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static int
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qoriq_gpio_attach(device_t dev)
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{
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struct gpio_softc *sc = device_get_softc(dev);
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int i;
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if (qoriq_make_gpio_res(dev, &sc->res))
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return (ENXIO);
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for (i = 0; i < PIN_COUNT; i++)
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sc->setup[i].gp_caps = DEFAULT_CAPS;
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sc->dev = dev;
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sc->busdev = gpiobus_attach_bus(dev);
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if (sc->busdev == NULL)
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return (ENXIO);
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return (0);
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}
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static device_t
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qoriq_gpio_get_bus(device_t dev)
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{
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struct gpio_softc *softc = device_get_softc(dev);
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return (softc->busdev);
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}
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static int
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qoriq_gpio_pin_max(device_t dev, int *maxpin)
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{
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if (maxpin == NULL)
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return (EINVAL);
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*maxpin = PIN_COUNT - 1;
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return (0);
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}
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static int
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qoriq_gpio_pin_getname(device_t dev, uint32_t pin, char *name)
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{
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if (name == NULL || pin >= PIN_COUNT)
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return (EINVAL);
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snprintf(name, GPIOMAXNAME, "pin %d", pin);
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return (0);
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}
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static int
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qoriq_gpio_pin_getflags(device_t dev, uint32_t pin, uint32_t *pflags)
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{
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struct gpio_softc *sc = device_get_softc(dev);
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if (pflags == NULL || pin >= PIN_COUNT)
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return (EINVAL);
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QORIQ_GPIO_LOCK(sc);
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*pflags = sc->setup[pin].gp_flags;
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QORIQ_GPIO_UNLOCK(sc);
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return (0);
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}
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static int
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qoriq_gpio_pin_setflags(device_t dev, uint32_t pin, uint32_t flags)
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{
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struct gpio_softc *sc = device_get_softc(dev);
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int ret;
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if (pin >= PIN_COUNT)
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return (EINVAL);
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/* Check for unwanted flags. */
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QORIQ_GPIO_LOCK(sc);
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if ((flags & sc->setup[pin].gp_caps) != flags) {
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QORIQ_GPIO_UNLOCK(sc);
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return (EINVAL);
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}
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ret = qoriq_gpio_configure(dev, pin, flags);
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QORIQ_GPIO_UNLOCK(sc);
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return (ret);
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}
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static int
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qoriq_gpio_pin_getcaps(device_t dev, uint32_t pin, uint32_t *caps)
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{
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struct gpio_softc *sc = device_get_softc(dev);
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if (caps == NULL || pin >= PIN_COUNT)
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return (EINVAL);
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QORIQ_GPIO_LOCK(sc);
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*caps = sc->setup[pin].gp_caps;
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QORIQ_GPIO_UNLOCK(sc);
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return (0);
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}
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static int
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qoriq_gpio_pin_get(device_t dev, uint32_t pin, uint32_t *value)
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{
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struct gpio_softc *sc = device_get_softc(dev);
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if (value == NULL || pin >= PIN_COUNT)
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return (EINVAL);
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QORIQ_GPIO_LOCK(sc);
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*value = (qoriq_gpio_reg_read(dev, DATA) & GPIO(pin)) != 0;
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QORIQ_GPIO_UNLOCK(sc);
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return (0);
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}
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static int
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qoriq_gpio_pin_set(device_t dev, uint32_t pin, uint32_t value)
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{
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struct gpio_softc *sc = device_get_softc(dev);
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if (pin >= PIN_COUNT)
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return (EINVAL);
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QORIQ_GPIO_LOCK(sc);
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qoriq_gpio_set(dev, DATA, pin, value);
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QORIQ_GPIO_UNLOCK(sc);
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return (0);
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}
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static int
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qoriq_gpio_pin_toggle(device_t dev, uint32_t pin)
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{
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struct gpio_softc *sc;
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uint32_t value;
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if (pin >= PIN_COUNT)
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return (EINVAL);
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sc = device_get_softc(dev);
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QORIQ_GPIO_LOCK(sc);
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value = qoriq_gpio_reg_read(dev, DATA) ^ (1 << pin);
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qoriq_gpio_reg_write(dev, DATA, value);
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QORIQ_GPIO_UNLOCK(sc);
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return (0);
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}
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static int
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qoriq_gpio_map_gpios(device_t bus, phandle_t dev, phandle_t gparent, int gcells,
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pcell_t *gpios, uint32_t *pin, uint32_t *flags)
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{
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struct gpio_softc *sc = device_get_softc(bus);
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int err;
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if (gpios[0] >= PIN_COUNT)
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return (EINVAL);
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QORIQ_GPIO_LOCK(sc);
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err = qoriq_gpio_configure(bus, gpios[0], gpios[1]);
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QORIQ_GPIO_UNLOCK(sc);
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if (err != 0)
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return (err);
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*pin = gpios[0];
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*flags = gpios[1];
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return (0);
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}
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static int
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qoriq_gpio_pin_access_32(device_t dev, uint32_t first_pin, uint32_t clear_pins,
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uint32_t change_pins, uint32_t *orig_pins)
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{
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struct gpio_softc *sc;
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uint32_t hwstate;
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sc = device_get_softc(dev);
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if (first_pin != 0)
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return (EINVAL);
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QORIQ_GPIO_LOCK(sc);
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hwstate = qoriq_gpio_reg_read(dev, DATA);
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qoriq_gpio_reg_write(dev, DATA, (hwstate & ~clear_pins) ^ change_pins);
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QORIQ_GPIO_UNLOCK(sc);
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if (orig_pins != NULL)
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*orig_pins = hwstate;
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return (0);
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}
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static int
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qoriq_gpio_pin_config_32(device_t dev, uint32_t first_pin, uint32_t num_pins,
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uint32_t *pin_flags)
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{
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uint32_t dir, odr, mask, reg;
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struct gpio_softc *sc;
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uint32_t newflags[32];
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int i;
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if (first_pin != 0 || num_pins > PIN_COUNT)
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return (EINVAL);
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sc = device_get_softc(dev);
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dir = odr = mask = 0;
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for (i = 0; i < num_pins; i++) {
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newflags[i] = 0;
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mask |= (1 << i);
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if (pin_flags[i] & GPIO_PIN_INPUT) {
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newflags[i] = GPIO_PIN_INPUT;
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dir &= ~(1 << i);
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} else {
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newflags[i] = GPIO_PIN_OUTPUT;
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dir |= (1 << i);
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if (pin_flags[i] & GPIO_PIN_OPENDRAIN) {
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newflags[i] |= GPIO_PIN_OPENDRAIN;
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odr |= (1 << i);
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} else {
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newflags[i] |= GPIO_PIN_PUSHPULL;
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odr &= ~(1 << i);
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}
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}
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}
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QORIQ_GPIO_LOCK(sc);
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reg = (qoriq_gpio_reg_read(dev, DIRECTION) & ~mask) | dir;
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qoriq_gpio_reg_write(dev, DIRECTION, reg);
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reg = (qoriq_gpio_reg_read(dev, OPEN_DRAIN) & ~mask) | odr;
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qoriq_gpio_reg_write(dev, OPEN_DRAIN, reg);
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for (i = 0; i < num_pins; i++)
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sc->setup[i].gp_flags = newflags[i];
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QORIQ_GPIO_UNLOCK(sc);
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return (0);
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}
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