mirror of https://github.com/F-Stack/f-stack.git
124 lines
4.6 KiB
C
124 lines
4.6 KiB
C
/* SPDX-License-Identifier: BSD-3-Clause
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* Copyright(c) 2020 Intel Corporation
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*/
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#ifndef _RTE_POWER_INTRINSIC_H_
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#define _RTE_POWER_INTRINSIC_H_
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#include <inttypes.h>
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#include <rte_compat.h>
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#include <rte_spinlock.h>
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/**
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* @file
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* Advanced power management operations.
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*
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* This file define APIs for advanced power management,
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* which are architecture-dependent.
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*/
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/**
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* @warning
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* @b EXPERIMENTAL: this API may change without prior notice
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*
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* Monitor specific address for changes. This will cause the CPU to enter an
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* architecture-defined optimized power state until either the specified
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* memory address is written to, a certain TSC timestamp is reached, or other
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* reasons cause the CPU to wake up.
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*
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* Additionally, an `expected` 64-bit value and 64-bit mask are provided. If
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* mask is non-zero, the current value pointed to by the `p` pointer will be
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* checked against the expected value, and if they match, the entering of
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* optimized power state may be aborted.
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*
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* @warning It is responsibility of the user to check if this function is
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* supported at runtime using `rte_cpu_get_intrinsics_support()` API call.
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* Failing to do so may result in an illegal CPU instruction error.
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*
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* @param p
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* Address to monitor for changes.
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* @param expected_value
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* Before attempting the monitoring, the `p` address may be read and compared
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* against this value. If `value_mask` is zero, this step will be skipped.
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* @param value_mask
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* The 64-bit mask to use to extract current value from `p`.
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* @param tsc_timestamp
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* Maximum TSC timestamp to wait for. Note that the wait behavior is
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* architecture-dependent.
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* @param data_sz
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* Data size (in bytes) that will be used to compare expected value with the
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* memory address. Can be 1, 2, 4 or 8. Supplying any other value will lead
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* to undefined result.
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*/
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__rte_experimental
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static inline void rte_power_monitor(const volatile void *p,
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const uint64_t expected_value, const uint64_t value_mask,
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const uint64_t tsc_timestamp, const uint8_t data_sz);
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/**
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* @warning
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* @b EXPERIMENTAL: this API may change without prior notice
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*
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* Monitor specific address for changes. This will cause the CPU to enter an
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* architecture-defined optimized power state until either the specified
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* memory address is written to, a certain TSC timestamp is reached, or other
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* reasons cause the CPU to wake up.
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*
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* Additionally, an `expected` 64-bit value and 64-bit mask are provided. If
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* mask is non-zero, the current value pointed to by the `p` pointer will be
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* checked against the expected value, and if they match, the entering of
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* optimized power state may be aborted.
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*
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* This call will also lock a spinlock on entering sleep, and release it on
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* waking up the CPU.
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*
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* @warning It is responsibility of the user to check if this function is
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* supported at runtime using `rte_cpu_get_intrinsics_support()` API call.
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* Failing to do so may result in an illegal CPU instruction error.
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*
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* @param p
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* Address to monitor for changes.
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* @param expected_value
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* Before attempting the monitoring, the `p` address may be read and compared
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* against this value. If `value_mask` is zero, this step will be skipped.
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* @param value_mask
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* The 64-bit mask to use to extract current value from `p`.
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* @param tsc_timestamp
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* Maximum TSC timestamp to wait for. Note that the wait behavior is
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* architecture-dependent.
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* @param data_sz
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* Data size (in bytes) that will be used to compare expected value with the
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* memory address. Can be 1, 2, 4 or 8. Supplying any other value will lead
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* to undefined result.
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* @param lck
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* A spinlock that must be locked before entering the function, will be
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* unlocked while the CPU is sleeping, and will be locked again once the CPU
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* wakes up.
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*/
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__rte_experimental
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static inline void rte_power_monitor_sync(const volatile void *p,
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const uint64_t expected_value, const uint64_t value_mask,
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const uint64_t tsc_timestamp, const uint8_t data_sz,
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rte_spinlock_t *lck);
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/**
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* @warning
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* @b EXPERIMENTAL: this API may change without prior notice
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*
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* Enter an architecture-defined optimized power state until a certain TSC
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* timestamp is reached.
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*
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* @warning It is responsibility of the user to check if this function is
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* supported at runtime using `rte_cpu_get_intrinsics_support()` API call.
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* Failing to do so may result in an illegal CPU instruction error.
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*
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* @param tsc_timestamp
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* Maximum TSC timestamp to wait for. Note that the wait behavior is
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* architecture-dependent.
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*/
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__rte_experimental
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static inline void rte_power_pause(const uint64_t tsc_timestamp);
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#endif /* _RTE_POWER_INTRINSIC_H_ */
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