mirror of https://github.com/F-Stack/f-stack.git
129 lines
3.6 KiB
Meson
129 lines
3.6 KiB
Meson
# SPDX-License-Identifier: BSD-3-Clause
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# Copyright(c) 2017 Intel Corporation.
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# Copyright(c) 2017 Cavium, Inc
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# Copyright(c) 2021 PANTHEON.tech s.r.o.
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# Copyright(c) 2022 StarFive
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# Copyright(c) 2022 SiFive
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# Copyright(c) 2022 Semihalf
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if not is_linux
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error('Only Linux is supported at this point in time.')
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endif
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if not dpdk_conf.get('RTE_ARCH_64')
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error('Only 64-bit compiles are supported for this platform type')
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endif
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dpdk_conf.set('RTE_ARCH', 'riscv')
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dpdk_conf.set('RTE_ARCH_RISCV', 1)
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dpdk_conf.set('RTE_FORCE_INTRINSICS', 1)
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# common flags to all riscv builds, with lowest priority
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flags_common = [
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['RTE_ARCH_RISCV', true],
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['RTE_CACHE_LINE_SIZE', 64],
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# Manually set wall time clock frequency for the target. If 0, then it is
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# read from /proc/device-tree/cpus/timebase-frequency. This property is
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# guaranteed on Linux, as riscv time_init() requires it.
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['RTE_RISCV_TIME_FREQ', 0],
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]
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## SoC-specific options.
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# The priority is like this: arch > vendor > common.
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#
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# Note that currently there's no way of getting vendor/microarchitecture id
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# values in userspace which is why the logic of choosing the right flag
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# combination is strictly based on the values passed from a cross-file.
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vendor_generic = {
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'description': 'Generic RISC-V',
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'flags': [
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['RTE_MACHINE', '"riscv"'],
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['RTE_USE_C11_MEM_MODEL', true],
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['RTE_MAX_LCORE', 128],
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['RTE_MAX_NUMA_NODES', 2]
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],
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'arch_config': {
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'generic': {'machine_args': ['-march=rv64gc']}
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}
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}
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arch_config_riscv = {
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'0x8000000000000007': {
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'machine_args': ['-march=rv64gc', '-mtune=sifive-7-series'],
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'flags': []
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},
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}
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vendor_sifive = {
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'description': 'SiFive',
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'flags': [
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['RTE_MACHINE', '"riscv"'],
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['RTE_USE_C11_MEM_MODEL', true],
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['RTE_MAX_LCORE', 4],
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['RTE_MAX_NUMA_NODES', 1],
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],
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'arch_config': arch_config_riscv
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}
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vendors = {
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'generic': vendor_generic,
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'0x489': vendor_sifive
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}
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# Native/cross vendor/arch detection
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if not meson.is_cross_build()
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if machine == 'default'
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# default build
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vendor_id = 'generic'
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arch_id = 'generic'
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message('generic RISC-V')
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else
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vendor_id = 'generic'
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arch_id = 'generic'
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warning('RISC-V arch discovery not available, using generic!')
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endif
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else
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# cross build
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vendor_id = meson.get_cross_property('vendor_id')
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arch_id = meson.get_cross_property('arch_id')
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endif
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if not vendors.has_key(vendor_id)
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error('Unsupported RISC-V vendor: @0@. '.format(vendor_id) +
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'Please add support for it or use the generic ' +
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'(-Dmachine=generic) build.')
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endif
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vendor_config = vendors[vendor_id]
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message('RISC-V vendor: ' + vendor_config['description'])
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message('RISC-V architecture id: ' + arch_id)
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arch_config = vendor_config['arch_config']
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if not arch_config.has_key(arch_id)
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# unknown micro-architecture id
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error('Unsupported architecture @0@ of vendor @1@. '
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.format(arch_id, vendor_id) +
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'Please add support for it or use the generic ' +
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'(-Dmachine=generic) build.')
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endif
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arch_config = arch_config[arch_id]
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# Concatenate flags respecting priorities.
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dpdk_flags = flags_common + vendor_config['flags'] + arch_config.get('flags', [])
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# apply supported machine args
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machine_args = [] # Clear previous machine args
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foreach flag: arch_config['machine_args']
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if cc.has_argument(flag)
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machine_args += flag
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endif
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endforeach
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# apply flags
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foreach flag: dpdk_flags
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if flag.length() > 0
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dpdk_conf.set(flag[0], flag[1])
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endif
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endforeach
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message('Using machine args: @0@'.format(machine_args))
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