mirror of https://github.com/F-Stack/f-stack.git
105 lines
2.4 KiB
C
105 lines
2.4 KiB
C
/* SPDX-License-Identifier: BSD-3-Clause
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* Copyright(c) 2018-2021 Beijing WangXun Technology Co., Ltd.
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* Copyright(c) 2010-2017 Intel Corporation
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*/
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#ifndef _NGBE_MNG_H_
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#define _NGBE_MNG_H_
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#include "ngbe_type.h"
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#define NGBE_PMMBX_QSIZE 64 /* Num of dwords in range */
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#define NGBE_PMMBX_BSIZE (NGBE_PMMBX_QSIZE * 4)
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#define NGBE_PMMBX_DATA_SIZE (NGBE_PMMBX_BSIZE - FW_NVM_DATA_OFFSET * 4)
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#define NGBE_HI_COMMAND_TIMEOUT 5000 /* Process HI command limit */
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/* CEM Support */
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#define FW_CEM_MAX_RETRIES 3
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#define FW_CEM_RESP_STATUS_SUCCESS 0x1
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#define FW_READ_SHADOW_RAM_CMD 0x31
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#define FW_READ_SHADOW_RAM_LEN 0x6
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#define FW_WRITE_SHADOW_RAM_CMD 0x33
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#define FW_WRITE_SHADOW_RAM_LEN 0xA /* 8 plus 1 WORD to write */
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#define FW_PCIE_READ_CMD 0xEC
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#define FW_PCIE_WRITE_CMD 0xED
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#define FW_PCIE_BUSMASTER_OFFSET 2
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#define FW_DEFAULT_CHECKSUM 0xFF /* checksum always 0xFF */
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#define FW_NVM_DATA_OFFSET 3
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#define FW_EEPROM_CHECK_STATUS 0xE9
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#define FW_CHECKSUM_CAP_ST_PASS 0x80658383
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#define FW_CHECKSUM_CAP_ST_FAIL 0x70657376
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/* Host Interface Command Structures */
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struct ngbe_hic_hdr {
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u8 cmd;
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u8 buf_len;
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union {
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u8 cmd_resv;
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u8 ret_status;
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} cmd_or_resp;
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u8 checksum;
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};
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struct ngbe_hic_hdr2_req {
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u8 cmd;
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u8 buf_lenh;
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u8 buf_lenl;
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u8 checksum;
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};
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struct ngbe_hic_hdr2_rsp {
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u8 cmd;
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u8 buf_lenl;
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u8 ret_status; /* 7-5: high bits of buf_len, 4-0: status */
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u8 checksum;
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};
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union ngbe_hic_hdr2 {
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struct ngbe_hic_hdr2_req req;
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struct ngbe_hic_hdr2_rsp rsp;
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};
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/* These need to be dword aligned */
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struct ngbe_hic_read_shadow_ram {
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union ngbe_hic_hdr2 hdr;
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u32 address;
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u16 length;
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u16 pad2;
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u16 data;
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u16 pad3;
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};
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struct ngbe_hic_write_shadow_ram {
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union ngbe_hic_hdr2 hdr;
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u32 address;
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u16 length;
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u16 pad2;
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u16 data;
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u16 pad3;
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};
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struct ngbe_hic_read_pcie {
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struct ngbe_hic_hdr hdr;
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u8 lan_id;
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u8 rsvd;
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u16 addr;
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u32 data;
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};
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struct ngbe_hic_write_pcie {
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struct ngbe_hic_hdr hdr;
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u8 lan_id;
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u8 rsvd;
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u16 addr;
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u32 data;
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};
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s32 ngbe_hic_sr_read(struct ngbe_hw *hw, u32 addr, u8 *buf, int len);
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s32 ngbe_hic_sr_write(struct ngbe_hw *hw, u32 addr, u8 *buf, int len);
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s32 ngbe_hic_pcie_read(struct ngbe_hw *hw, u16 addr, u32 *buf, int len);
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s32 ngbe_hic_pcie_write(struct ngbe_hw *hw, u16 addr, u32 *buf, int len);
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s32 ngbe_hic_check_cap(struct ngbe_hw *hw);
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#endif /* _NGBE_MNG_H_ */
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