mirror of https://github.com/F-Stack/f-stack.git
138 lines
3.8 KiB
C
138 lines
3.8 KiB
C
/* SPDX-License-Identifier: BSD-3-Clause
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* Copyright(c) 2017 Huawei Technologies Co., Ltd
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*/
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#ifndef _HINIC_PMD_WQ_H_
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#define _HINIC_PMD_WQ_H_
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#define WQS_BLOCKS_PER_PAGE 4
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#define WQ_SIZE(wq) (u32)((u64)(wq)->q_depth * (wq)->wqebb_size)
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#define WQE_PAGE_NUM(wq, idx) (((idx) >> ((wq)->wqebbs_per_page_shift)) & \
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((wq)->num_q_pages - 1))
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#define WQE_PAGE_OFF(wq, idx) ((u64)((wq)->wqebb_size) * \
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((idx) & ((wq)->num_wqebbs_per_page - 1)))
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#define WQ_PAGE_ADDR_SIZE sizeof(u64)
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#define WQ_PAGE_ADDR_SIZE_SHIFT 3
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#define WQ_PAGE_ADDR(wq, idx) \
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(u8 *)(*(u64 *)((u64)((wq)->shadow_block_vaddr) + \
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(WQE_PAGE_NUM(wq, idx) << WQ_PAGE_ADDR_SIZE_SHIFT)))
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#define WQ_BLOCK_SIZE 4096UL
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#define WQS_PAGE_SIZE (WQS_BLOCKS_PER_PAGE * WQ_BLOCK_SIZE)
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#define WQ_MAX_PAGES (WQ_BLOCK_SIZE >> WQ_PAGE_ADDR_SIZE_SHIFT)
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#define CMDQ_BLOCKS_PER_PAGE 8
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#define CMDQ_BLOCK_SIZE 512UL
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#define CMDQ_PAGE_SIZE ALIGN((CMDQ_BLOCKS_PER_PAGE * \
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CMDQ_BLOCK_SIZE), PAGE_SIZE)
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#define ADDR_4K_ALIGNED(addr) (0 == ((addr) & 0xfff))
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#define ADDR_256K_ALIGNED(addr) (0 == ((addr) & 0x3ffff))
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#define WQ_BASE_VADDR(wqs, wq) \
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(u64 *)(((u64)((wqs)->page_vaddr[(wq)->page_idx])) \
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+ (wq)->block_idx * WQ_BLOCK_SIZE)
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#define WQ_BASE_PADDR(wqs, wq) (((wqs)->page_paddr[(wq)->page_idx]) \
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+ (u64)(wq)->block_idx * WQ_BLOCK_SIZE)
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#define WQ_BASE_ADDR(wqs, wq) \
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(u64 *)(((u64)((wqs)->shadow_page_vaddr[(wq)->page_idx])) \
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+ (wq)->block_idx * WQ_BLOCK_SIZE)
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#define CMDQ_BASE_VADDR(cmdq_pages, wq) \
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(u64 *)(((u64)((cmdq_pages)->cmdq_page_vaddr)) \
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+ (wq)->block_idx * CMDQ_BLOCK_SIZE)
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#define CMDQ_BASE_PADDR(cmdq_pages, wq) \
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(((u64)((cmdq_pages)->cmdq_page_paddr)) \
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+ (u64)(wq)->block_idx * CMDQ_BLOCK_SIZE)
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#define CMDQ_BASE_ADDR(cmdq_pages, wq) \
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(u64 *)(((u64)((cmdq_pages)->cmdq_shadow_page_vaddr)) \
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+ (wq)->block_idx * CMDQ_BLOCK_SIZE)
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#define MASKED_WQE_IDX(wq, idx) ((idx) & (wq)->mask)
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#define WQE_SHADOW_PAGE(wq, wqe) \
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(u16)(((unsigned long)(wqe) - (unsigned long)(wq)->shadow_wqe) \
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/ (wq)->max_wqe_size)
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#define WQE_IN_RANGE(wqe, start, end) \
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(((unsigned long)(wqe) >= (unsigned long)(start)) && \
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((unsigned long)(wqe) < (unsigned long)(end)))
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#define WQ_NUM_PAGES(num_wqs) \
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(ALIGN((u32)num_wqs, WQS_BLOCKS_PER_PAGE) / WQS_BLOCKS_PER_PAGE)
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#define WQ_WQE_ADDR(wq, idx) ((void *)((u64)((wq)->queue_buf_vaddr) + \
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((idx) << (wq)->wqebb_shift)))
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#define WQ_PAGE_PFN_SHIFT 12
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#define WQ_BLOCK_PFN_SHIFT 9
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#define WQ_PAGE_PFN(page_addr) ((page_addr) >> WQ_PAGE_PFN_SHIFT)
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#define WQ_BLOCK_PFN(page_addr) ((page_addr) >> WQ_BLOCK_PFN_SHIFT)
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#define HINIC_SQ_WQEBB_SIZE 64
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#define HINIC_RQ_WQE_SIZE 32
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#define HINIC_SQ_WQEBB_SHIFT 6
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#define HINIC_RQ_WQEBB_SHIFT 5
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struct hinic_sge {
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u32 hi_addr;
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u32 lo_addr;
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u32 len;
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};
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/* Working Queue */
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struct hinic_wq {
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/* The addresses are 64 bit in the HW */
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u64 queue_buf_vaddr;
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u16 q_depth;
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u16 mask;
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u32 delta;
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u32 cons_idx;
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u32 prod_idx;
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u64 queue_buf_paddr;
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u32 wqebb_size;
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u32 wqebb_shift;
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u32 wq_buf_size;
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u32 rsvd[5];
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};
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void hinic_wq_wqe_pg_clear(struct hinic_wq *wq);
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int hinic_cmdq_alloc(struct hinic_wq *wq, struct hinic_hwdev *hwdev,
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int cmdq_blocks, u32 wq_buf_size, u32 wqebb_shift,
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u16 q_depth);
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void hinic_cmdq_free(struct hinic_hwdev *hwdev, struct hinic_wq *wq,
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int cmdq_blocks);
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int hinic_wq_allocate(struct hinic_hwdev *hwdev, struct hinic_wq *wq,
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u32 wqebb_shift, u16 q_depth, unsigned int socket_id);
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void hinic_wq_free(struct hinic_hwdev *hwdev, struct hinic_wq *wq);
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void *hinic_get_wqe(struct hinic_wq *wq, int num_wqebbs, u16 *prod_idx);
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void hinic_put_wqe(struct hinic_wq *wq, int num_wqebbs);
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void *hinic_read_wqe(struct hinic_wq *wq, int num_wqebbs, u16 *cons_idx);
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void hinic_set_sge(struct hinic_sge *sge, dma_addr_t addr, u32 len);
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#endif /* _HINIC_PMD_WQ_H_ */
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