mirror of https://github.com/F-Stack/f-stack.git
41 lines
1.3 KiB
C
41 lines
1.3 KiB
C
/* SPDX-License-Identifier: BSD-3-Clause
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* Copyright(C) 2019 Marvell International Ltd.
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*/
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#ifndef _NITROX_CSR_H_
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#define _NITROX_CSR_H_
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#include <rte_common.h>
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#include <rte_io.h>
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#define CSR_DELAY 30
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#define NITROX_CSR_ADDR(bar_addr, offset) (bar_addr + (offset))
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/* NPS packet registers */
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#define NPS_PKT_IN_INSTR_CTLX(_i) (0x10060UL + ((_i) * 0x40000UL))
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#define NPS_PKT_IN_INSTR_BADDRX(_i) (0x10068UL + ((_i) * 0x40000UL))
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#define NPS_PKT_IN_INSTR_RSIZEX(_i) (0x10070UL + ((_i) * 0x40000UL))
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#define NPS_PKT_IN_DONE_CNTSX(_i) (0x10080UL + ((_i) * 0x40000UL))
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#define NPS_PKT_IN_INSTR_BAOFF_DBELLX(_i) (0x10078UL + ((_i) * 0x40000UL))
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#define NPS_PKT_IN_INT_LEVELSX(_i) (0x10088UL + ((_i) * 0x40000UL))
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#define NPS_PKT_SLC_CTLX(_i) (0x10000UL + ((_i) * 0x40000UL))
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#define NPS_PKT_SLC_CNTSX(_i) (0x10008UL + ((_i) * 0x40000UL))
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#define NPS_PKT_SLC_INT_LEVELSX(_i) (0x10010UL + ((_i) * 0x40000UL))
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/* AQM Virtual Function Registers */
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#define AQMQ_QSZX(_i) (0x20008UL + ((_i) * 0x40000UL))
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static inline uint64_t
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nitrox_read_csr(uint8_t *bar_addr, uint64_t offset)
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{
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return rte_read64(bar_addr + offset);
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}
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static inline void
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nitrox_write_csr(uint8_t *bar_addr, uint64_t offset, uint64_t value)
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{
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rte_write64(value, (bar_addr + offset));
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}
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#endif /* _NITROX_CSR_H_ */
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