mirror of https://github.com/F-Stack/f-stack.git
60 lines
2.0 KiB
C
60 lines
2.0 KiB
C
/* SPDX-License-Identifier: BSD-3-Clause
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* Copyright(C) 2021 Marvell.
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*/
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#ifndef _ROC_CONSTANTS_H_
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#define _ROC_CONSTANTS_H_
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/* Alignment */
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#define ROC_ALIGN 128
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/* LMTST constants */
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/* [CN10K, .) */
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#define ROC_LMT_LINE_SZ 128
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#define ROC_NUM_LMT_LINES 2048
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#define ROC_LMT_LINES_PER_CORE_LOG2 5
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#define ROC_LMT_LINE_SIZE_LOG2 7
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#define ROC_LMT_BASE_PER_CORE_LOG2 \
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(ROC_LMT_LINES_PER_CORE_LOG2 + ROC_LMT_LINE_SIZE_LOG2)
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#define ROC_LMT_MAX_THREADS 42UL
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#define ROC_LMT_CPT_LINES_PER_CORE_LOG2 4
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#define ROC_LMT_CPT_BASE_ID_OFF \
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(ROC_LMT_MAX_THREADS << ROC_LMT_LINES_PER_CORE_LOG2)
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/* PCI IDs */
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#define PCI_VENDOR_ID_CAVIUM 0x177D
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#define PCI_DEVID_CNXK_RVU_PF 0xA063
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#define PCI_DEVID_CNXK_RVU_VF 0xA064
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#define PCI_DEVID_CNXK_RVU_AF 0xA065
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#define PCI_DEVID_CNXK_RVU_SSO_TIM_PF 0xA0F9
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#define PCI_DEVID_CNXK_RVU_SSO_TIM_VF 0xA0FA
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#define PCI_DEVID_CNXK_RVU_NPA_PF 0xA0FB
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#define PCI_DEVID_CNXK_RVU_NPA_VF 0xA0FC
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#define PCI_DEVID_CNXK_RVU_AF_VF 0xA0f8
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#define PCI_DEVID_CNXK_DPI_VF 0xA081
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#define PCI_DEVID_CNXK_EP_VF 0xB203
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#define PCI_DEVID_CNXK_RVU_SDP_PF 0xA0f6
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#define PCI_DEVID_CNXK_RVU_SDP_VF 0xA0f7
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#define PCI_DEVID_CNXK_BPHY 0xA089
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#define PCI_DEVID_CNXK_RVU_NIX_INL_PF 0xA0F0
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#define PCI_DEVID_CNXK_RVU_NIX_INL_VF 0xA0F1
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#define PCI_DEVID_CN9K_CGX 0xA059
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#define PCI_DEVID_CN10K_RPM 0xA060
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#define PCI_DEVID_CN9K_RVU_CPT_PF 0xA0FD
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#define PCI_DEVID_CN9K_RVU_CPT_VF 0xA0FE
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#define PCI_DEVID_CN10K_RVU_CPT_PF 0xA0F2
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#define PCI_DEVID_CN10K_RVU_CPT_VF 0xA0F3
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#define PCI_SUBSYSTEM_DEVID_CN10KA 0xB900
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#define PCI_SUBSYSTEM_DEVID_CN10KAS 0xB900
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#define PCI_SUBSYSTEM_DEVID_CNF10KA 0xBA00
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#define PCI_SUBSYSTEM_DEVID_CN9KA 0x0000
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#define PCI_SUBSYSTEM_DEVID_CN9KB 0xb400
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#define PCI_SUBSYSTEM_DEVID_CN9KC 0x0200
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#define PCI_SUBSYSTEM_DEVID_CN9KD 0xB200
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#define PCI_SUBSYSTEM_DEVID_CN9KE 0xB100
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#endif /* _ROC_CONSTANTS_H_ */
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