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60 lines
2.2 KiB
Plaintext
60 lines
2.2 KiB
Plaintext
* Texas Instruments K3 NavigatorSS Ring Accelerator
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The Ring Accelerator (RA) is a machine which converts read/write accesses
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from/to a constant address into corresponding read/write accesses from/to a
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circular data structure in memory. The RA eliminates the need for each DMA
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controller which needs to access ring elements from having to know the current
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state of the ring (base address, current offset). The DMA controller
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performs a read or write access to a specific address range (which maps to the
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source interface on the RA) and the RA replaces the address for the transaction
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with a new address which corresponds to the head or tail element of the ring
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(head for reads, tail for writes).
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The Ring Accelerator is a hardware module that is responsible for accelerating
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management of the packet queues. The K3 SoCs can have more than one RA instances
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Required properties:
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- compatible : Must be "ti,am654-navss-ringacc";
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- reg : Should contain register location and length of the following
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named register regions.
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- reg-names : should be
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"rt" - The RA Ring Real-time Control/Status Registers
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"fifos" - The RA Queues Registers
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"proxy_gcfg" - The RA Proxy Global Config Registers
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"proxy_target" - The RA Proxy Datapath Registers
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- ti,num-rings : Number of rings supported by RA
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- ti,sci-rm-range-gp-rings : TI-SCI RM subtype for GP ring range
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- ti,sci : phandle on TI-SCI compatible System controller node
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- ti,sci-dev-id : TI-SCI device id of the ring accelerator
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- msi-parent : phandle for "ti,sci-inta" interrupt controller
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Optional properties:
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-- ti,dma-ring-reset-quirk : enable ringacc / udma ring state interoperability
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issue software w/a
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Example:
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ringacc: ringacc@3c000000 {
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compatible = "ti,am654-navss-ringacc";
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reg = <0x0 0x3c000000 0x0 0x400000>,
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<0x0 0x38000000 0x0 0x400000>,
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<0x0 0x31120000 0x0 0x100>,
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<0x0 0x33000000 0x0 0x40000>;
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reg-names = "rt", "fifos",
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"proxy_gcfg", "proxy_target";
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ti,num-rings = <818>;
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ti,sci-rm-range-gp-rings = <0x2>; /* GP ring range */
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ti,dma-ring-reset-quirk;
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ti,sci = <&dmsc>;
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ti,sci-dev-id = <187>;
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msi-parent = <&inta_main_udmass>;
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};
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client:
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dma_ipx: dma_ipx@<addr> {
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...
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ti,ringacc = <&ringacc>;
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...
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}
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