mirror of https://github.com/F-Stack/f-stack.git
700 lines
21 KiB
Meson
700 lines
21 KiB
Meson
# SPDX-License-Identifier: BSD-3-Clause
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# Copyright(c) 2017 Intel Corporation.
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# Copyright(c) 2017 Cavium, Inc
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# Copyright(c) 2021 PANTHEON.tech s.r.o.
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# common flags to all aarch64 builds, with lowest priority
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flags_common = [
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# Accelerate rte_memcpy. Be sure to run unit test (memcpy_perf_autotest)
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# to determine the best threshold in code. Refer to notes in source file
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# (lib/eal/arm/include/rte_memcpy_64.h) for more info.
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['RTE_ARCH_ARM64_MEMCPY', false],
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# ['RTE_ARM64_MEMCPY_ALIGNED_THRESHOLD', 2048],
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# ['RTE_ARM64_MEMCPY_UNALIGNED_THRESHOLD', 512],
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# Leave below RTE_ARM64_MEMCPY_xxx options commented out,
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# unless there are strong reasons.
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# ['RTE_ARM64_MEMCPY_SKIP_GCC_VER_CHECK', false],
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# ['RTE_ARM64_MEMCPY_ALIGN_MASK', 0xF],
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# ['RTE_ARM64_MEMCPY_STRICT_ALIGN', false],
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['RTE_ARM_USE_WFE', false],
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['RTE_ARCH_ARM64', true],
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['RTE_CACHE_LINE_SIZE', 128]
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]
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## Part numbers are specific to Arm implementers
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# implementer specific armv8 flags have middle priority
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# (will overwrite common flags)
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# part number specific armv8 flags have higher priority
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# (will overwrite both common and implementer specific flags)
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implementer_generic = {
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'description': 'Generic armv8',
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'flags': [
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['RTE_MACHINE', '"armv8a"'],
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['RTE_USE_C11_MEM_MODEL', true],
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['RTE_MAX_LCORE', 256],
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['RTE_MAX_NUMA_NODES', 4]
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],
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'part_number_config': {
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'generic': {
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'march': 'armv8-a',
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'march_features': ['crc'],
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'compiler_options': ['-moutline-atomics']
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},
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'generic_aarch32': {
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'march': 'armv8-a',
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'compiler_options': ['-mfpu=neon'],
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'flags': [
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['RTE_ARCH_ARM_NEON_MEMCPY', false],
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['RTE_ARCH_STRICT_ALIGN', true],
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['RTE_ARCH_ARMv8_AARCH32', true],
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['RTE_ARCH', 'armv8_aarch32'],
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['RTE_CACHE_LINE_SIZE', 64]
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]
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}
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}
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}
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part_number_config_arm = {
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'0xd03': {'compiler_options': ['-mcpu=cortex-a53']},
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'0xd04': {'compiler_options': ['-mcpu=cortex-a35']},
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'0xd07': {'compiler_options': ['-mcpu=cortex-a57']},
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'0xd08': {'compiler_options': ['-mcpu=cortex-a72']},
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'0xd09': {'compiler_options': ['-mcpu=cortex-a73']},
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'0xd0a': {'compiler_options': ['-mcpu=cortex-a75']},
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'0xd0b': {'compiler_options': ['-mcpu=cortex-a76']},
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'0xd0c': {
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'march': 'armv8.2-a',
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'march_features': ['crypto'],
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'compiler_options': ['-mcpu=neoverse-n1'],
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'flags': [
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['RTE_MACHINE', '"neoverse-n1"'],
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['RTE_ARM_FEATURE_ATOMICS', true],
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['RTE_MAX_MEM_MB', 1048576],
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['RTE_MAX_LCORE', 160],
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['RTE_MAX_NUMA_NODES', 2]
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]
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},
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'0xd40': {
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'march': 'armv8.4-a',
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'march_features': ['sve'],
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'compiler_options': ['-mcpu=neoverse-v1'],
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'flags': [
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['RTE_MACHINE', '"neoverse-v1"'],
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['RTE_ARM_FEATURE_ATOMICS', true],
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['RTE_MAX_NUMA_NODES', 1]
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]
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},
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'0xd49': {
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'march': 'armv8.5-a',
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'march_features': ['sve2'],
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'flags': [
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['RTE_MACHINE', '"neoverse-n2"'],
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['RTE_ARM_FEATURE_ATOMICS', true],
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['RTE_MAX_LCORE', 64],
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['RTE_MAX_NUMA_NODES', 1]
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]
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}
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}
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implementer_arm = {
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'description': 'Arm',
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'flags': [
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['RTE_MACHINE', '"armv8a"'],
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['RTE_USE_C11_MEM_MODEL', true],
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['RTE_CACHE_LINE_SIZE', 64],
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['RTE_MAX_LCORE', 64],
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['RTE_MAX_NUMA_NODES', 4]
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],
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'part_number_config': part_number_config_arm
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}
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flags_part_number_thunderx = [
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['RTE_MACHINE', '"thunderx"'],
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['RTE_USE_C11_MEM_MODEL', false]
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]
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implementer_cavium = {
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'description': 'Cavium',
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'flags': [
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['RTE_MAX_VFIO_GROUPS', 128],
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['RTE_MAX_LCORE', 96],
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['RTE_MAX_NUMA_NODES', 2]
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],
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'part_number_config': {
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'0xa1': {
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'compiler_options': ['-mcpu=thunderxt88'],
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'flags': flags_part_number_thunderx
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},
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'0xa2': {
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'compiler_options': ['-mcpu=thunderxt81'],
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'flags': flags_part_number_thunderx
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},
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'0xa3': {
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'compiler_options': ['-march=armv8-a+crc', '-mcpu=thunderxt83'],
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'flags': flags_part_number_thunderx
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},
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'0xaf': {
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'march': 'armv8.1-a',
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'march_features': ['crc', 'crypto'],
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'compiler_options': ['-mcpu=thunderx2t99'],
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'flags': [
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['RTE_MACHINE', '"thunderx2"'],
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['RTE_ARM_FEATURE_ATOMICS', true],
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['RTE_USE_C11_MEM_MODEL', true],
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['RTE_CACHE_LINE_SIZE', 64],
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['RTE_MAX_LCORE', 256]
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]
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},
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'0xb2': {
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'march': 'armv8.2-a',
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'march_features': ['crc', 'crypto', 'lse'],
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'compiler_options': ['-mcpu=octeontx2'],
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'flags': [
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['RTE_MACHINE', '"cn9k"'],
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['RTE_ARM_FEATURE_ATOMICS', true],
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['RTE_USE_C11_MEM_MODEL', true],
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['RTE_MAX_LCORE', 36],
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['RTE_MAX_NUMA_NODES', 1]
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]
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}
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}
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}
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implementer_ampere = {
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'description': 'Ampere Computing',
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'flags': [
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['RTE_MACHINE', '"emag"'],
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['RTE_CACHE_LINE_SIZE', 64],
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['RTE_MAX_LCORE', 32],
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['RTE_MAX_NUMA_NODES', 1]
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],
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'part_number_config': {
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'0x0': {
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'march': 'armv8-a',
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'march_features': ['crc', 'crypto'],
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'compiler_options': ['-mtune=emag']
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}
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}
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}
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implementer_hisilicon = {
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'description': 'HiSilicon',
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'flags': [
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['RTE_USE_C11_MEM_MODEL', true],
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['RTE_CACHE_LINE_SIZE', 128]
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],
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'part_number_config': {
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'0xd01': {
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'march': 'armv8.2-a',
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'march_features': ['crypto'],
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'compiler_options': ['-mtune=tsv110'],
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'flags': [
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['RTE_MACHINE', '"Kunpeng 920"'],
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['RTE_ARM_FEATURE_ATOMICS', true],
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['RTE_MAX_LCORE', 256],
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['RTE_MAX_NUMA_NODES', 8]
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]
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},
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'0xd02': {
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'march': 'armv8.2-a',
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'march_features': ['crypto', 'sve'],
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'flags': [
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['RTE_MACHINE', '"Kunpeng 930"'],
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['RTE_ARM_FEATURE_ATOMICS', true],
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['RTE_MAX_LCORE', 1280],
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['RTE_MAX_NUMA_NODES', 16]
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]
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}
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}
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}
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implementer_phytium = {
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'description': 'Phytium',
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'flags': [
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['RTE_MACHINE', '"armv8a"'],
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['RTE_USE_C11_MEM_MODEL', true],
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['RTE_CACHE_LINE_SIZE', 64],
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],
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'part_number_config': {
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'0x662': {
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'march': 'armv8-a',
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'march_features': ['crc'],
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'flags': [
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['RTE_MAX_LCORE', 64],
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['RTE_MAX_NUMA_NODES', 8]
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]
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},
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'0x663': {
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'march': 'armv8-a',
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'march_features': ['crc'],
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'flags': [
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['RTE_MAX_LCORE', 256],
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['RTE_MAX_NUMA_NODES', 32]
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]
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}
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}
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}
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implementer_qualcomm = {
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'description': 'Qualcomm',
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'flags': [
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['RTE_MACHINE', '"armv8a"'],
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['RTE_USE_C11_MEM_MODEL', true],
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['RTE_CACHE_LINE_SIZE', 64],
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['RTE_MAX_LCORE', 64],
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['RTE_MAX_NUMA_NODES', 1]
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],
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'part_number_config': {
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'0x800': {
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'march': 'armv8-a',
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'march_features': ['crc']
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},
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'0xc00': {
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'march': 'armv8-a',
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'march_features': ['crc']
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}
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}
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}
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## Arm implementers (ID from MIDR in Arm Architecture Reference Manual)
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implementers = {
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'generic': implementer_generic,
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'0x41': implementer_arm,
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'0x43': implementer_cavium,
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'0x48': implementer_hisilicon,
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'0x50': implementer_ampere,
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'0x51': implementer_qualcomm,
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'0x70': implementer_phytium,
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}
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# SoC specific armv8 flags have the highest priority
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# (will overwrite all other flags)
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soc_generic = {
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'description': 'Generic un-optimized build for armv8 aarch64 exec mode',
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'implementer': 'generic',
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'part_number': 'generic'
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}
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soc_generic_aarch32 = {
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'description': 'Generic un-optimized build for armv8 aarch32 exec mode',
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'implementer': 'generic',
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'part_number': 'generic_aarch32'
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}
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soc_armada = {
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'description': 'Marvell ARMADA',
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'implementer': '0x41',
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'part_number': '0xd08',
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'flags': [
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['RTE_MAX_LCORE', 16],
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['RTE_MAX_NUMA_NODES', 1]
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],
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'numa': false
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}
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soc_bluefield = {
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'description': 'NVIDIA BlueField',
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'implementer': '0x41',
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'part_number': '0xd08',
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'flags': [
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['RTE_MAX_LCORE', 16],
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['RTE_MAX_NUMA_NODES', 1]
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],
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'numa': false
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}
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soc_centriq2400 = {
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'description': 'Qualcomm Centriq 2400',
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'implementer': '0x51',
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'part_number': '0xc00',
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'numa': false
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}
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soc_cn10k = {
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'description' : 'Marvell OCTEON 10',
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'implementer' : '0x41',
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'flags': [
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['RTE_MAX_LCORE', 24],
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['RTE_MAX_NUMA_NODES', 1],
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['RTE_MEMPOOL_ALIGN', 128],
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['RTE_IOVA_AS_PA', 0]
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],
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'part_number': '0xd49',
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'extra_march_features': ['crypto'],
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'numa': false,
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'sve_acle': false
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}
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soc_dpaa = {
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'description': 'NXP DPAA',
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'implementer': '0x41',
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'part_number': '0xd08',
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'flags': [
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['RTE_MACHINE', '"dpaa"'],
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['RTE_LIBRTE_DPAA2_USE_PHYS_IOVA', false],
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['RTE_MAX_LCORE', 16],
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['RTE_MAX_NUMA_NODES', 1]
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],
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'numa': false
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}
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soc_emag = {
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'description': 'Ampere eMAG',
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'implementer': '0x50',
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'part_number': '0x0'
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}
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soc_ft2000plus = {
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'description': 'Phytium FT-2000+',
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'implementer': '0x70',
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'part_number': '0x662',
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'numa': true
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}
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soc_tys2500 = {
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'description': 'Phytium TengYun S2500',
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'implementer': '0x70',
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'part_number': '0x663',
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'numa': true
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}
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soc_graviton2 = {
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'description': 'AWS Graviton2',
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'implementer': '0x41',
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'part_number': '0xd0c',
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'numa': false
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}
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soc_graviton3 = {
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'description': 'AWS Graviton3',
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'implementer': '0x41',
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'part_number': '0xd40',
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'extra_march_features': ['crypto'],
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'numa': false
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}
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soc_kunpeng920 = {
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'description': 'HiSilicon Kunpeng 920',
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'implementer': '0x48',
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'part_number': '0xd01',
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'numa': true
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}
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soc_kunpeng930 = {
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'description': 'HiSilicon Kunpeng 930',
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'implementer': '0x48',
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'part_number': '0xd02',
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'numa': true
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}
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soc_n1sdp = {
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'description': 'Arm Neoverse N1SDP',
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'implementer': '0x41',
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'part_number': '0xd0c',
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'flags': [
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['RTE_MAX_LCORE', 4]
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],
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'numa': false
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}
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soc_n2 = {
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'description': 'Arm Neoverse N2',
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'implementer': '0x41',
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'part_number': '0xd49',
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'numa': false
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}
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soc_cn9k = {
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'description': 'Marvell OCTEON 9',
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'implementer': '0x43',
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'part_number': '0xb2',
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'numa': false,
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'flags': [
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['RTE_IOVA_AS_PA', 0]
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]
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}
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soc_stingray = {
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'description': 'Broadcom Stingray',
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'implementer': '0x41',
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'flags': [
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['RTE_MAX_LCORE', 16],
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['RTE_MAX_NUMA_NODES', 1]
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],
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'part_number': '0xd08',
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'numa': false
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}
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soc_thunderx2 = {
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'description': 'Marvell ThunderX2 T99',
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'implementer': '0x43',
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'part_number': '0xaf'
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}
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soc_thunderxt88 = {
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'description': 'Marvell ThunderX T88',
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'implementer': '0x43',
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'part_number': '0xa1'
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}
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soc_thunderxt83 = {
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'description': 'Marvell ThunderX T83',
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'implementer': '0x43',
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'part_number': '0xa3'
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}
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'''
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Start of SoCs list
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generic: Generic un-optimized build for armv8 aarch64 execution mode.
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generic_aarch32: Generic un-optimized build for armv8 aarch32 execution mode.
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armada: Marvell ARMADA
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bluefield: NVIDIA BlueField
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centriq2400: Qualcomm Centriq 2400
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cn9k: Marvell OCTEON 9
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cn10k: Marvell OCTEON 10
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dpaa: NXP DPAA
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emag: Ampere eMAG
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ft2000plus: Phytium FT-2000+
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tys2500: Phytium TengYun S2500
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graviton2: AWS Graviton2
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graviton3: AWS Graviton3
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kunpeng920: HiSilicon Kunpeng 920
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kunpeng930: HiSilicon Kunpeng 930
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n1sdp: Arm Neoverse N1SDP
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n2: Arm Neoverse N2
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stingray: Broadcom Stingray
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thunderx2: Marvell ThunderX2 T99
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thunderxt88: Marvell ThunderX T88
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thunderxt83: Marvell ThunderX T83
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End of SoCs list
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'''
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# The string above is included in the documentation, keep it in sync with the
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# SoCs list below.
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socs = {
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'generic': soc_generic,
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'generic_aarch32': soc_generic_aarch32,
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'armada': soc_armada,
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'bluefield': soc_bluefield,
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'centriq2400': soc_centriq2400,
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'cn9k': soc_cn9k,
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'cn10k' : soc_cn10k,
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'dpaa': soc_dpaa,
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'emag': soc_emag,
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'ft2000plus': soc_ft2000plus,
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'tys2500': soc_tys2500,
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'graviton2': soc_graviton2,
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'graviton3': soc_graviton3,
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'kunpeng920': soc_kunpeng920,
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'kunpeng930': soc_kunpeng930,
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'n1sdp': soc_n1sdp,
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'n2': soc_n2,
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'stingray': soc_stingray,
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'thunderx2': soc_thunderx2,
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'thunderxt88': soc_thunderxt88,
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'thunderxt83': soc_thunderxt83,
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}
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dpdk_conf.set('RTE_ARCH_ARM', 1)
|
|
dpdk_conf.set('RTE_FORCE_INTRINSICS', 1)
|
|
|
|
update_flags = false
|
|
soc_flags = []
|
|
if dpdk_conf.get('RTE_ARCH_32')
|
|
# 32-bit build
|
|
dpdk_conf.set('RTE_CACHE_LINE_SIZE', 64)
|
|
if meson.is_cross_build()
|
|
update_flags = true
|
|
soc = meson.get_cross_property('platform', '')
|
|
if soc == ''
|
|
error('Arm SoC must be specified in the cross file.')
|
|
endif
|
|
soc_config = socs.get(soc, {'not_supported': true})
|
|
flags_common = []
|
|
else
|
|
# armv7 build
|
|
dpdk_conf.set('RTE_ARCH_ARMv7', true)
|
|
dpdk_conf.set('RTE_ARCH', 'armv7')
|
|
dpdk_conf.set('RTE_MAX_LCORE', 128)
|
|
dpdk_conf.set('RTE_MAX_NUMA_NODES', 1)
|
|
# the minimum architecture supported, armv7-a, needs the following,
|
|
machine_args += '-mfpu=neon'
|
|
endif
|
|
else
|
|
# armv8 build
|
|
dpdk_conf.set('RTE_ARCH', 'armv8')
|
|
update_flags = true
|
|
soc_config = {}
|
|
if not meson.is_cross_build()
|
|
# for backwards compatibility:
|
|
# machine=native is the same behavior as soc=native
|
|
# machine=generic/default is the same as soc=generic
|
|
# cpu_instruction_set holds the proper value - native, generic or cpu
|
|
# the old behavior only distinguished between generic and native build
|
|
if machine != 'auto'
|
|
if cpu_instruction_set == 'generic'
|
|
soc = 'generic'
|
|
else
|
|
soc = 'native'
|
|
endif
|
|
else
|
|
soc = platform
|
|
endif
|
|
if soc == 'native'
|
|
# native build
|
|
# The script returns ['Implementer', 'Variant', 'Architecture',
|
|
# 'Primary Part number', 'Revision']
|
|
detect_vendor = find_program(join_paths(meson.current_source_dir(),
|
|
'armv8_machine.py'))
|
|
cmd = run_command(detect_vendor.path(), check: false)
|
|
if cmd.returncode() == 0
|
|
cmd_output = cmd.stdout().to_lower().strip().split(' ')
|
|
implementer_id = cmd_output[0]
|
|
part_number = cmd_output[3]
|
|
else
|
|
error('Error when getting Arm Implementer ID and part number.')
|
|
endif
|
|
else
|
|
# SoC build
|
|
soc_config = socs.get(soc, {'not_supported': true})
|
|
endif
|
|
else
|
|
# cross build
|
|
soc = meson.get_cross_property('platform', '')
|
|
if soc == ''
|
|
error('Arm SoC must be specified in the cross file.')
|
|
endif
|
|
soc_config = socs.get(soc, {'not_supported': true})
|
|
endif
|
|
endif
|
|
|
|
if update_flags
|
|
if soc_config.has_key('not_supported')
|
|
error('SoC @0@ not supported.'.format(soc))
|
|
elif soc_config != {}
|
|
implementer_id = soc_config['implementer']
|
|
implementer_config = implementers[implementer_id]
|
|
part_number = soc_config['part_number']
|
|
soc_flags = soc_config.get('flags', [])
|
|
if not soc_config.get('numa', true)
|
|
has_libnuma = 0
|
|
endif
|
|
|
|
disable_drivers += ',' + soc_config.get('disable_drivers', '')
|
|
enable_drivers += ',' + soc_config.get('enable_drivers', '')
|
|
endif
|
|
|
|
if implementers.has_key(implementer_id)
|
|
implementer_config = implementers[implementer_id]
|
|
else
|
|
error('Unsupported Arm implementer: @0@. '.format(implementer_id) +
|
|
'Please add support for it or use the generic ' +
|
|
'(-Dplatform=generic) build.')
|
|
endif
|
|
|
|
message('Arm implementer: ' + implementer_config['description'])
|
|
message('Arm part number: ' + part_number)
|
|
|
|
part_number_config = implementer_config['part_number_config']
|
|
if part_number_config.has_key(part_number)
|
|
# use the specified part_number machine args if found
|
|
part_number_config = part_number_config[part_number]
|
|
else
|
|
# unknown part number
|
|
error('Unsupported part number @0@ of implementer @1@. '
|
|
.format(part_number, implementer_id) +
|
|
'Please add support for it or use the generic ' +
|
|
'(-Dplatform=generic) build.')
|
|
endif
|
|
|
|
# add/overwrite flags in the proper order
|
|
dpdk_flags = flags_common + implementer_config['flags'] + part_number_config.get('flags', []) + soc_flags
|
|
|
|
machine_args = [] # Clear previous machine args
|
|
|
|
# probe supported archs and their features
|
|
candidate_march = ''
|
|
if part_number_config.has_key('march')
|
|
supported_marchs = ['armv8.6-a', 'armv8.5-a', 'armv8.4-a', 'armv8.3-a',
|
|
'armv8.2-a', 'armv8.1-a', 'armv8-a']
|
|
check_compiler_support = false
|
|
foreach supported_march: supported_marchs
|
|
if supported_march == part_number_config['march']
|
|
# start checking from this version downwards
|
|
check_compiler_support = true
|
|
endif
|
|
if (check_compiler_support and
|
|
cc.has_argument('-march=' + supported_march))
|
|
candidate_march = supported_march
|
|
# highest supported march version found
|
|
break
|
|
endif
|
|
endforeach
|
|
if candidate_march == ''
|
|
error('No suitable armv8 march version found.')
|
|
endif
|
|
if candidate_march != part_number_config['march']
|
|
warning('Configuration march version is ' +
|
|
'@0@, but the compiler supports only @1@.'
|
|
.format(part_number_config['march'], candidate_march))
|
|
endif
|
|
candidate_march = '-march=' + candidate_march
|
|
|
|
march_features = []
|
|
if part_number_config.has_key('march_features')
|
|
march_features += part_number_config['march_features']
|
|
endif
|
|
if soc_config.has_key('extra_march_features')
|
|
march_features += soc_config['extra_march_features']
|
|
endif
|
|
foreach feature: march_features
|
|
if cc.has_argument('+'.join([candidate_march, feature]))
|
|
candidate_march = '+'.join([candidate_march, feature])
|
|
else
|
|
warning('The compiler does not support feature @0@'
|
|
.format(feature))
|
|
endif
|
|
endforeach
|
|
machine_args += candidate_march
|
|
endif
|
|
|
|
# apply supported compiler options
|
|
if part_number_config.has_key('compiler_options')
|
|
foreach flag: part_number_config['compiler_options']
|
|
if cc.has_argument(flag)
|
|
machine_args += flag
|
|
else
|
|
warning('Configuration compiler option ' +
|
|
'@0@ isn\'t supported.'.format(flag))
|
|
endif
|
|
endforeach
|
|
endif
|
|
|
|
# apply flags
|
|
foreach flag: dpdk_flags
|
|
if flag.length() > 0
|
|
dpdk_conf.set(flag[0], flag[1])
|
|
endif
|
|
endforeach
|
|
endif
|
|
message('Using machine args: @0@'.format(machine_args))
|
|
|
|
if (cc.get_define('__ARM_NEON', args: machine_args) != '' or
|
|
cc.get_define('__aarch64__', args: machine_args) != '')
|
|
compile_time_cpuflags += ['RTE_CPUFLAG_NEON']
|
|
endif
|
|
|
|
if cc.get_define('__ARM_FEATURE_SVE', args: machine_args) != ''
|
|
compile_time_cpuflags += ['RTE_CPUFLAG_SVE']
|
|
if (cc.check_header('arm_sve.h') and soc_config.get('sve_acle', true))
|
|
dpdk_conf.set('RTE_HAS_SVE_ACLE', 1)
|
|
endif
|
|
endif
|
|
|
|
if cc.get_define('__ARM_FEATURE_CRC32', args: machine_args) != ''
|
|
compile_time_cpuflags += ['RTE_CPUFLAG_CRC32']
|
|
endif
|
|
|
|
if cc.get_define('__ARM_FEATURE_CRYPTO', args: machine_args) != ''
|
|
compile_time_cpuflags += ['RTE_CPUFLAG_AES', 'RTE_CPUFLAG_PMULL',
|
|
'RTE_CPUFLAG_SHA1', 'RTE_CPUFLAG_SHA2']
|
|
endif
|