mirror of https://github.com/F-Stack/f-stack.git
1116 lines
28 KiB
C
1116 lines
28 KiB
C
/* SPDX-License-Identifier: BSD-3-Clause
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* Copyright 2020-2021 NXP
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*/
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#include <stdlib.h>
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#include <string.h>
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#include <unistd.h>
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#include <fcntl.h>
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#include <sys/ioctl.h>
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#include <sys/mman.h>
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#include <dirent.h>
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#include <rte_common.h>
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#include <bus_vdev_driver.h>
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#include <rte_malloc.h>
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#include <rte_ring.h>
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#include <rte_kvargs.h>
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#include <rte_bbdev.h>
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#include <rte_bbdev_pmd.h>
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#include <bbdev_la12xx_pmd_logs.h>
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#include <bbdev_la12xx_ipc.h>
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#include <bbdev_la12xx.h>
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#define DRIVER_NAME baseband_la12xx
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/* Initialisation params structure that can be used by LA12xx BBDEV driver */
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struct bbdev_la12xx_params {
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uint8_t queues_num; /*< LA12xx BBDEV queues number */
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int8_t modem_id; /*< LA12xx modem instance id */
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};
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#define LA12XX_MAX_NB_QUEUES_ARG "max_nb_queues"
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#define LA12XX_VDEV_MODEM_ID_ARG "modem"
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#define LA12XX_MAX_MODEM 4
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#define LA12XX_MAX_CORES 4
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#define LA12XX_LDPC_ENC_CORE 0
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#define LA12XX_LDPC_DEC_CORE 1
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#define LA12XX_MAX_LDPC_ENC_QUEUES 4
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#define LA12XX_MAX_LDPC_DEC_QUEUES 4
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static const char * const bbdev_la12xx_valid_params[] = {
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LA12XX_MAX_NB_QUEUES_ARG,
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LA12XX_VDEV_MODEM_ID_ARG,
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};
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static const struct rte_bbdev_op_cap bbdev_capabilities[] = {
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{
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.type = RTE_BBDEV_OP_LDPC_ENC,
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.cap.ldpc_enc = {
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.capability_flags =
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RTE_BBDEV_LDPC_RATE_MATCH |
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RTE_BBDEV_LDPC_CRC_24A_ATTACH |
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RTE_BBDEV_LDPC_CRC_24B_ATTACH,
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.num_buffers_src =
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RTE_BBDEV_LDPC_MAX_CODE_BLOCKS,
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.num_buffers_dst =
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RTE_BBDEV_LDPC_MAX_CODE_BLOCKS,
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}
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},
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{
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.type = RTE_BBDEV_OP_LDPC_DEC,
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.cap.ldpc_dec = {
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.capability_flags =
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RTE_BBDEV_LDPC_CRC_TYPE_24A_CHECK |
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RTE_BBDEV_LDPC_CRC_TYPE_24B_CHECK |
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RTE_BBDEV_LDPC_CRC_TYPE_24B_DROP,
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.num_buffers_src =
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RTE_BBDEV_LDPC_MAX_CODE_BLOCKS,
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.num_buffers_hard_out =
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RTE_BBDEV_LDPC_MAX_CODE_BLOCKS,
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.llr_size = 8,
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.llr_decimals = 1,
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}
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},
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RTE_BBDEV_END_OF_CAPABILITIES_LIST()
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};
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static struct rte_bbdev_queue_conf default_queue_conf = {
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.queue_size = MAX_CHANNEL_DEPTH,
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};
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/* Get device info */
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static void
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la12xx_info_get(struct rte_bbdev *dev __rte_unused,
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struct rte_bbdev_driver_info *dev_info)
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{
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PMD_INIT_FUNC_TRACE();
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dev_info->driver_name = RTE_STR(DRIVER_NAME);
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dev_info->max_num_queues = LA12XX_MAX_QUEUES;
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dev_info->queue_size_lim = MAX_CHANNEL_DEPTH;
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dev_info->hardware_accelerated = true;
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dev_info->max_dl_queue_priority = 0;
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dev_info->max_ul_queue_priority = 0;
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dev_info->data_endianness = RTE_BIG_ENDIAN;
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dev_info->default_queue_conf = default_queue_conf;
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dev_info->capabilities = bbdev_capabilities;
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dev_info->cpu_flag_reqs = NULL;
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dev_info->min_alignment = 64;
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dev_info->device_status = RTE_BBDEV_DEV_NOT_SUPPORTED;
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dev_info->num_queues[RTE_BBDEV_OP_NONE] = 0;
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dev_info->num_queues[RTE_BBDEV_OP_TURBO_DEC] = 0;
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dev_info->num_queues[RTE_BBDEV_OP_TURBO_ENC] = 0;
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dev_info->num_queues[RTE_BBDEV_OP_LDPC_DEC] = LA12XX_MAX_QUEUES / 2;
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dev_info->num_queues[RTE_BBDEV_OP_LDPC_ENC] = LA12XX_MAX_QUEUES / 2;
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dev_info->queue_priority[RTE_BBDEV_OP_LDPC_DEC] = 1;
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dev_info->queue_priority[RTE_BBDEV_OP_LDPC_ENC] = 1;
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rte_bbdev_log_debug("got device info from %u", dev->data->dev_id);
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}
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/* Release queue */
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static int
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la12xx_queue_release(struct rte_bbdev *dev, uint16_t q_id)
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{
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RTE_SET_USED(dev);
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RTE_SET_USED(q_id);
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PMD_INIT_FUNC_TRACE();
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return 0;
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}
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#define HUGEPG_OFFSET(A) \
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((uint64_t) ((unsigned long) (A) \
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- ((uint64_t)ipc_priv->hugepg_start.host_vaddr)))
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#define MODEM_P2V(A) \
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((uint64_t) ((unsigned long) (A) \
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+ (unsigned long)(ipc_priv->peb_start.host_vaddr)))
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static int
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ipc_queue_configure(uint32_t channel_id,
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ipc_t instance,
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struct bbdev_la12xx_q_priv *q_priv)
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{
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ipc_userspace_t *ipc_priv = (ipc_userspace_t *)instance;
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ipc_instance_t *ipc_instance = ipc_priv->instance;
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ipc_ch_t *ch;
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void *vaddr;
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uint32_t i = 0;
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uint32_t msg_size = sizeof(struct bbdev_ipc_enqueue_op);
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PMD_INIT_FUNC_TRACE();
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rte_bbdev_log_debug("%x %p", ipc_instance->initialized,
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ipc_priv->instance);
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ch = &(ipc_instance->ch_list[channel_id]);
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rte_bbdev_log_debug("channel: %u, depth: %u, msg size: %u",
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channel_id, q_priv->queue_size, msg_size);
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/* Start init of channel */
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ch->md.ring_size = rte_cpu_to_be_32(q_priv->queue_size);
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ch->md.pi = 0;
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ch->md.ci = 0;
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ch->md.msg_size = msg_size;
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for (i = 0; i < q_priv->queue_size; i++) {
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vaddr = rte_malloc(NULL, msg_size, RTE_CACHE_LINE_SIZE);
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if (!vaddr)
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return IPC_HOST_BUF_ALLOC_FAIL;
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/* Only offset now */
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ch->bd_h[i].modem_ptr =
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rte_cpu_to_be_32(HUGEPG_OFFSET(vaddr));
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ch->bd_h[i].host_virt_l = lower_32_bits(vaddr);
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ch->bd_h[i].host_virt_h = upper_32_bits(vaddr);
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q_priv->msg_ch_vaddr[i] = vaddr;
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/* Not sure use of this len may be for CRC*/
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ch->bd_h[i].len = 0;
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}
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ch->host_ipc_params =
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rte_cpu_to_be_32(HUGEPG_OFFSET(q_priv->host_params));
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rte_bbdev_log_debug("Channel configured");
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return IPC_SUCCESS;
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}
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static int
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la12xx_e200_queue_setup(struct rte_bbdev *dev,
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struct bbdev_la12xx_q_priv *q_priv)
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{
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struct bbdev_la12xx_private *priv = dev->data->dev_private;
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ipc_userspace_t *ipc_priv = priv->ipc_priv;
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struct gul_hif *mhif;
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ipc_metadata_t *ipc_md;
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ipc_ch_t *ch;
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int instance_id = 0, i;
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int ret;
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PMD_INIT_FUNC_TRACE();
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switch (q_priv->op_type) {
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case RTE_BBDEV_OP_LDPC_ENC:
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q_priv->la12xx_core_id = LA12XX_LDPC_ENC_CORE;
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break;
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case RTE_BBDEV_OP_LDPC_DEC:
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q_priv->la12xx_core_id = LA12XX_LDPC_DEC_CORE;
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break;
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default:
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rte_bbdev_log(ERR, "Unsupported op type\n");
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return -1;
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}
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mhif = (struct gul_hif *)ipc_priv->mhif_start.host_vaddr;
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/* offset is from start of PEB */
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ipc_md = (ipc_metadata_t *)((uintptr_t)ipc_priv->peb_start.host_vaddr +
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mhif->ipc_regs.ipc_mdata_offset);
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ch = &ipc_md->instance_list[instance_id].ch_list[q_priv->q_id];
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if (q_priv->q_id < priv->num_valid_queues) {
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ipc_br_md_t *md = &(ch->md);
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q_priv->feca_blk_id = rte_cpu_to_be_32(ch->feca_blk_id);
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q_priv->feca_blk_id_be32 = ch->feca_blk_id;
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q_priv->host_pi = rte_be_to_cpu_32(md->pi);
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q_priv->host_ci = rte_be_to_cpu_32(md->ci);
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q_priv->host_params = (host_ipc_params_t *)(uintptr_t)
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(rte_be_to_cpu_32(ch->host_ipc_params) +
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((uint64_t)ipc_priv->hugepg_start.host_vaddr));
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for (i = 0; i < q_priv->queue_size; i++) {
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uint32_t h, l;
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h = ch->bd_h[i].host_virt_h;
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l = ch->bd_h[i].host_virt_l;
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q_priv->msg_ch_vaddr[i] = (void *)join_32_bits(h, l);
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}
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rte_bbdev_log(WARNING,
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"Queue [%d] already configured, not configuring again",
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q_priv->q_id);
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return 0;
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}
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rte_bbdev_log_debug("setting up queue %d", q_priv->q_id);
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/* Call ipc_configure_channel */
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ret = ipc_queue_configure(q_priv->q_id, ipc_priv, q_priv);
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if (ret) {
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rte_bbdev_log(ERR, "Unable to setup queue (%d) (err=%d)",
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q_priv->q_id, ret);
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return ret;
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}
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/* Set queue properties for LA12xx device */
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switch (q_priv->op_type) {
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case RTE_BBDEV_OP_LDPC_ENC:
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if (priv->num_ldpc_enc_queues >= LA12XX_MAX_LDPC_ENC_QUEUES) {
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rte_bbdev_log(ERR,
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"num_ldpc_enc_queues reached max value");
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return -1;
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}
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ch->la12xx_core_id =
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rte_cpu_to_be_32(LA12XX_LDPC_ENC_CORE);
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ch->feca_blk_id = rte_cpu_to_be_32(priv->num_ldpc_enc_queues++);
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break;
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case RTE_BBDEV_OP_LDPC_DEC:
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if (priv->num_ldpc_dec_queues >= LA12XX_MAX_LDPC_DEC_QUEUES) {
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rte_bbdev_log(ERR,
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"num_ldpc_dec_queues reached max value");
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return -1;
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}
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ch->la12xx_core_id =
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rte_cpu_to_be_32(LA12XX_LDPC_DEC_CORE);
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ch->feca_blk_id = rte_cpu_to_be_32(priv->num_ldpc_dec_queues++);
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break;
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default:
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rte_bbdev_log(ERR, "Not supported op type\n");
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return -1;
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}
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ch->op_type = rte_cpu_to_be_32(q_priv->op_type);
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ch->depth = rte_cpu_to_be_32(q_priv->queue_size);
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/* Store queue config here */
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q_priv->feca_blk_id = rte_cpu_to_be_32(ch->feca_blk_id);
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q_priv->feca_blk_id_be32 = ch->feca_blk_id;
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return 0;
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}
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/* Setup a queue */
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static int
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la12xx_queue_setup(struct rte_bbdev *dev, uint16_t q_id,
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const struct rte_bbdev_queue_conf *queue_conf)
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{
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struct bbdev_la12xx_private *priv = dev->data->dev_private;
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struct rte_bbdev_queue_data *q_data;
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struct bbdev_la12xx_q_priv *q_priv;
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int ret;
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PMD_INIT_FUNC_TRACE();
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/* Move to setup_queues callback */
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q_data = &dev->data->queues[q_id];
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q_data->queue_private = rte_zmalloc(NULL,
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sizeof(struct bbdev_la12xx_q_priv), 0);
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if (!q_data->queue_private) {
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rte_bbdev_log(ERR, "Memory allocation failed for qpriv");
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return -ENOMEM;
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}
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q_priv = q_data->queue_private;
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q_priv->q_id = q_id;
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q_priv->bbdev_priv = dev->data->dev_private;
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q_priv->queue_size = queue_conf->queue_size;
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q_priv->op_type = queue_conf->op_type;
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ret = la12xx_e200_queue_setup(dev, q_priv);
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if (ret) {
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rte_bbdev_log(ERR, "e200_queue_setup failed for qid: %d",
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q_id);
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return ret;
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}
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/* Store queue config here */
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priv->num_valid_queues++;
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return 0;
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}
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static int
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la12xx_start(struct rte_bbdev *dev)
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{
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struct bbdev_la12xx_private *priv = dev->data->dev_private;
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ipc_userspace_t *ipc_priv = priv->ipc_priv;
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int ready = 0;
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struct gul_hif *hif_start;
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PMD_INIT_FUNC_TRACE();
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hif_start = (struct gul_hif *)ipc_priv->mhif_start.host_vaddr;
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/* Set Host Read bit */
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SET_HIF_HOST_RDY(hif_start, HIF_HOST_READY_IPC_APP);
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/* Now wait for modem ready bit */
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while (!ready)
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ready = CHK_HIF_MOD_RDY(hif_start, HIF_MOD_READY_IPC_APP);
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return 0;
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}
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static const struct rte_bbdev_ops pmd_ops = {
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.info_get = la12xx_info_get,
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.queue_setup = la12xx_queue_setup,
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.queue_release = la12xx_queue_release,
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.start = la12xx_start
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};
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static inline int
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is_bd_ring_full(uint32_t ci, uint32_t ci_flag,
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uint32_t pi, uint32_t pi_flag)
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{
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if (pi == ci) {
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if (pi_flag != ci_flag)
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return 1; /* Ring is Full */
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}
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return 0;
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}
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static inline int
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prepare_ldpc_enc_op(struct rte_bbdev_enc_op *bbdev_enc_op,
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struct bbdev_la12xx_q_priv *q_priv __rte_unused,
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struct rte_bbdev_op_data *in_op_data __rte_unused,
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struct rte_bbdev_op_data *out_op_data)
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{
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struct rte_bbdev_op_ldpc_enc *ldpc_enc = &bbdev_enc_op->ldpc_enc;
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uint32_t total_out_bits;
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total_out_bits = (ldpc_enc->tb_params.cab *
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ldpc_enc->tb_params.ea) + (ldpc_enc->tb_params.c -
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ldpc_enc->tb_params.cab) * ldpc_enc->tb_params.eb;
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ldpc_enc->output.length = (total_out_bits + 7)/8;
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rte_pktmbuf_append(out_op_data->data, ldpc_enc->output.length);
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return 0;
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}
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static inline int
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prepare_ldpc_dec_op(struct rte_bbdev_dec_op *bbdev_dec_op,
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struct bbdev_ipc_dequeue_op *bbdev_ipc_op,
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struct bbdev_la12xx_q_priv *q_priv __rte_unused,
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struct rte_bbdev_op_data *out_op_data __rte_unused)
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{
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struct rte_bbdev_op_ldpc_dec *ldpc_dec = &bbdev_dec_op->ldpc_dec;
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uint32_t total_out_bits;
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uint32_t num_code_blocks = 0;
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uint16_t sys_cols;
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sys_cols = (ldpc_dec->basegraph == 1) ? 22 : 10;
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if (ldpc_dec->tb_params.c == 1) {
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total_out_bits = ((sys_cols * ldpc_dec->z_c) -
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ldpc_dec->n_filler);
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/* 5G-NR protocol uses 16 bit CRC when output packet
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* size <= 3824 (bits). Otherwise 24 bit CRC is used.
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* Adjust the output bits accordingly
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*/
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if (total_out_bits - 16 <= 3824)
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total_out_bits -= 16;
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else
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total_out_bits -= 24;
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ldpc_dec->hard_output.length = (total_out_bits / 8);
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} else {
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total_out_bits = (((sys_cols * ldpc_dec->z_c) -
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ldpc_dec->n_filler - 24) *
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ldpc_dec->tb_params.c);
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ldpc_dec->hard_output.length = (total_out_bits / 8) - 3;
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}
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num_code_blocks = ldpc_dec->tb_params.c;
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bbdev_ipc_op->num_code_blocks = rte_cpu_to_be_32(num_code_blocks);
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return 0;
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}
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static int
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enqueue_single_op(struct bbdev_la12xx_q_priv *q_priv, void *bbdev_op)
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{
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struct bbdev_la12xx_private *priv = q_priv->bbdev_priv;
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ipc_userspace_t *ipc_priv = priv->ipc_priv;
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ipc_instance_t *ipc_instance = ipc_priv->instance;
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struct bbdev_ipc_dequeue_op *bbdev_ipc_op;
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struct rte_bbdev_op_ldpc_enc *ldpc_enc;
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struct rte_bbdev_op_ldpc_dec *ldpc_dec;
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uint32_t q_id = q_priv->q_id;
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uint32_t ci, ci_flag, pi, pi_flag;
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ipc_ch_t *ch = &(ipc_instance->ch_list[q_id]);
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ipc_br_md_t *md = &(ch->md);
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size_t virt;
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char *huge_start_addr =
|
|
(char *)q_priv->bbdev_priv->ipc_priv->hugepg_start.host_vaddr;
|
|
struct rte_bbdev_op_data *in_op_data, *out_op_data;
|
|
char *data_ptr;
|
|
uint32_t l1_pcie_addr;
|
|
int ret;
|
|
|
|
ci = IPC_GET_CI_INDEX(q_priv->host_ci);
|
|
ci_flag = IPC_GET_CI_FLAG(q_priv->host_ci);
|
|
|
|
pi = IPC_GET_PI_INDEX(q_priv->host_pi);
|
|
pi_flag = IPC_GET_PI_FLAG(q_priv->host_pi);
|
|
|
|
rte_bbdev_dp_log(DEBUG, "before bd_ring_full: pi: %u, ci: %u,"
|
|
"pi_flag: %u, ci_flag: %u, ring size: %u",
|
|
pi, ci, pi_flag, ci_flag, q_priv->queue_size);
|
|
|
|
if (is_bd_ring_full(ci, ci_flag, pi, pi_flag)) {
|
|
rte_bbdev_dp_log(DEBUG, "bd ring full for queue id: %d", q_id);
|
|
return IPC_CH_FULL;
|
|
}
|
|
|
|
virt = MODEM_P2V(q_priv->host_params->bd_m_modem_ptr[pi]);
|
|
bbdev_ipc_op = (struct bbdev_ipc_dequeue_op *)virt;
|
|
q_priv->bbdev_op[pi] = bbdev_op;
|
|
|
|
switch (q_priv->op_type) {
|
|
case RTE_BBDEV_OP_LDPC_ENC:
|
|
ldpc_enc = &(((struct rte_bbdev_enc_op *)bbdev_op)->ldpc_enc);
|
|
in_op_data = &ldpc_enc->input;
|
|
out_op_data = &ldpc_enc->output;
|
|
|
|
ret = prepare_ldpc_enc_op(bbdev_op, q_priv,
|
|
in_op_data, out_op_data);
|
|
if (ret) {
|
|
rte_bbdev_log(ERR, "process_ldpc_enc_op fail, ret: %d",
|
|
ret);
|
|
return ret;
|
|
}
|
|
break;
|
|
|
|
case RTE_BBDEV_OP_LDPC_DEC:
|
|
ldpc_dec = &(((struct rte_bbdev_dec_op *)bbdev_op)->ldpc_dec);
|
|
in_op_data = &ldpc_dec->input;
|
|
|
|
out_op_data = &ldpc_dec->hard_output;
|
|
|
|
ret = prepare_ldpc_dec_op(bbdev_op, bbdev_ipc_op,
|
|
q_priv, out_op_data);
|
|
if (ret) {
|
|
rte_bbdev_log(ERR, "process_ldpc_dec_op fail, ret: %d",
|
|
ret);
|
|
return ret;
|
|
}
|
|
break;
|
|
|
|
default:
|
|
rte_bbdev_log(ERR, "unsupported bbdev_ipc op type");
|
|
return -1;
|
|
}
|
|
|
|
if (in_op_data->data) {
|
|
data_ptr = rte_pktmbuf_mtod(in_op_data->data, char *);
|
|
l1_pcie_addr = (uint32_t)GUL_USER_HUGE_PAGE_ADDR +
|
|
data_ptr - huge_start_addr;
|
|
bbdev_ipc_op->in_addr = l1_pcie_addr;
|
|
bbdev_ipc_op->in_len = in_op_data->length;
|
|
}
|
|
|
|
if (out_op_data->data) {
|
|
data_ptr = rte_pktmbuf_mtod(out_op_data->data, char *);
|
|
l1_pcie_addr = (uint32_t)GUL_USER_HUGE_PAGE_ADDR +
|
|
data_ptr - huge_start_addr;
|
|
bbdev_ipc_op->out_addr = rte_cpu_to_be_32(l1_pcie_addr);
|
|
bbdev_ipc_op->out_len = rte_cpu_to_be_32(out_op_data->length);
|
|
}
|
|
|
|
/* Move Producer Index forward */
|
|
pi++;
|
|
/* Flip the PI flag, if wrapping */
|
|
if (unlikely(q_priv->queue_size == pi)) {
|
|
pi = 0;
|
|
pi_flag = pi_flag ? 0 : 1;
|
|
}
|
|
|
|
if (pi_flag)
|
|
IPC_SET_PI_FLAG(pi);
|
|
else
|
|
IPC_RESET_PI_FLAG(pi);
|
|
q_priv->host_pi = pi;
|
|
|
|
/* Wait for Data Copy & pi_flag update to complete before updating pi */
|
|
rte_mb();
|
|
/* now update pi */
|
|
md->pi = rte_cpu_to_be_32(pi);
|
|
|
|
rte_bbdev_dp_log(DEBUG, "enter: pi: %u, ci: %u,"
|
|
"pi_flag: %u, ci_flag: %u, ring size: %u",
|
|
pi, ci, pi_flag, ci_flag, q_priv->queue_size);
|
|
|
|
return 0;
|
|
}
|
|
|
|
/* Enqueue decode burst */
|
|
static uint16_t
|
|
enqueue_dec_ops(struct rte_bbdev_queue_data *q_data,
|
|
struct rte_bbdev_dec_op **ops, uint16_t nb_ops)
|
|
{
|
|
struct bbdev_la12xx_q_priv *q_priv = q_data->queue_private;
|
|
int nb_enqueued, ret;
|
|
|
|
for (nb_enqueued = 0; nb_enqueued < nb_ops; nb_enqueued++) {
|
|
ret = enqueue_single_op(q_priv, ops[nb_enqueued]);
|
|
if (ret)
|
|
break;
|
|
}
|
|
|
|
q_data->queue_stats.enqueue_err_count += nb_ops - nb_enqueued;
|
|
q_data->queue_stats.enqueued_count += nb_enqueued;
|
|
|
|
return nb_enqueued;
|
|
}
|
|
|
|
/* Enqueue encode burst */
|
|
static uint16_t
|
|
enqueue_enc_ops(struct rte_bbdev_queue_data *q_data,
|
|
struct rte_bbdev_enc_op **ops, uint16_t nb_ops)
|
|
{
|
|
struct bbdev_la12xx_q_priv *q_priv = q_data->queue_private;
|
|
int nb_enqueued, ret;
|
|
|
|
for (nb_enqueued = 0; nb_enqueued < nb_ops; nb_enqueued++) {
|
|
ret = enqueue_single_op(q_priv, ops[nb_enqueued]);
|
|
if (ret)
|
|
break;
|
|
}
|
|
|
|
q_data->queue_stats.enqueue_err_count += nb_ops - nb_enqueued;
|
|
q_data->queue_stats.enqueued_count += nb_enqueued;
|
|
|
|
return nb_enqueued;
|
|
}
|
|
|
|
/* Dequeue encode burst */
|
|
static void *
|
|
dequeue_single_op(struct bbdev_la12xx_q_priv *q_priv, void *dst)
|
|
{
|
|
void *op;
|
|
uint32_t ci, ci_flag;
|
|
uint32_t temp_ci;
|
|
|
|
temp_ci = q_priv->host_params->ci;
|
|
if (temp_ci == q_priv->host_ci)
|
|
return NULL;
|
|
|
|
ci = IPC_GET_CI_INDEX(q_priv->host_ci);
|
|
ci_flag = IPC_GET_CI_FLAG(q_priv->host_ci);
|
|
|
|
rte_bbdev_dp_log(DEBUG,
|
|
"ci: %u, ci_flag: %u, ring size: %u",
|
|
ci, ci_flag, q_priv->queue_size);
|
|
|
|
op = q_priv->bbdev_op[ci];
|
|
|
|
rte_memcpy(dst, q_priv->msg_ch_vaddr[ci],
|
|
sizeof(struct bbdev_ipc_enqueue_op));
|
|
|
|
/* Move Consumer Index forward */
|
|
ci++;
|
|
/* Flip the CI flag, if wrapping */
|
|
if (q_priv->queue_size == ci) {
|
|
ci = 0;
|
|
ci_flag = ci_flag ? 0 : 1;
|
|
}
|
|
if (ci_flag)
|
|
IPC_SET_CI_FLAG(ci);
|
|
else
|
|
IPC_RESET_CI_FLAG(ci);
|
|
|
|
q_priv->host_ci = ci;
|
|
|
|
rte_bbdev_dp_log(DEBUG,
|
|
"exit: ci: %u, ci_flag: %u, ring size: %u",
|
|
ci, ci_flag, q_priv->queue_size);
|
|
|
|
return op;
|
|
}
|
|
|
|
/* Dequeue decode burst */
|
|
static uint16_t
|
|
dequeue_dec_ops(struct rte_bbdev_queue_data *q_data,
|
|
struct rte_bbdev_dec_op **ops, uint16_t nb_ops)
|
|
{
|
|
struct bbdev_la12xx_q_priv *q_priv = q_data->queue_private;
|
|
struct bbdev_ipc_enqueue_op bbdev_ipc_op;
|
|
int nb_dequeued;
|
|
|
|
for (nb_dequeued = 0; nb_dequeued < nb_ops; nb_dequeued++) {
|
|
ops[nb_dequeued] = dequeue_single_op(q_priv, &bbdev_ipc_op);
|
|
if (!ops[nb_dequeued])
|
|
break;
|
|
ops[nb_dequeued]->status = bbdev_ipc_op.status;
|
|
}
|
|
q_data->queue_stats.dequeued_count += nb_dequeued;
|
|
|
|
return nb_dequeued;
|
|
}
|
|
|
|
/* Dequeue encode burst */
|
|
static uint16_t
|
|
dequeue_enc_ops(struct rte_bbdev_queue_data *q_data,
|
|
struct rte_bbdev_enc_op **ops, uint16_t nb_ops)
|
|
{
|
|
struct bbdev_la12xx_q_priv *q_priv = q_data->queue_private;
|
|
struct bbdev_ipc_enqueue_op bbdev_ipc_op;
|
|
int nb_enqueued;
|
|
|
|
for (nb_enqueued = 0; nb_enqueued < nb_ops; nb_enqueued++) {
|
|
ops[nb_enqueued] = dequeue_single_op(q_priv, &bbdev_ipc_op);
|
|
if (!ops[nb_enqueued])
|
|
break;
|
|
ops[nb_enqueued]->status = bbdev_ipc_op.status;
|
|
}
|
|
q_data->queue_stats.enqueued_count += nb_enqueued;
|
|
|
|
return nb_enqueued;
|
|
}
|
|
|
|
static struct hugepage_info *
|
|
get_hugepage_info(void)
|
|
{
|
|
struct hugepage_info *hp_info;
|
|
struct rte_memseg *mseg;
|
|
|
|
PMD_INIT_FUNC_TRACE();
|
|
|
|
/* TODO - find a better way */
|
|
hp_info = rte_malloc(NULL, sizeof(struct hugepage_info), 0);
|
|
if (!hp_info) {
|
|
rte_bbdev_log(ERR, "Unable to allocate on local heap");
|
|
return NULL;
|
|
}
|
|
|
|
mseg = rte_mem_virt2memseg(hp_info, NULL);
|
|
hp_info->vaddr = mseg->addr;
|
|
hp_info->paddr = rte_mem_virt2phy(mseg->addr);
|
|
hp_info->len = mseg->len;
|
|
|
|
return hp_info;
|
|
}
|
|
|
|
static int
|
|
open_ipc_dev(int modem_id)
|
|
{
|
|
char dev_initials[16], dev_path[PATH_MAX];
|
|
struct dirent *entry;
|
|
int dev_ipc = 0;
|
|
DIR *dir;
|
|
|
|
dir = opendir("/dev/");
|
|
if (!dir) {
|
|
rte_bbdev_log(ERR, "Unable to open /dev/");
|
|
return -1;
|
|
}
|
|
|
|
sprintf(dev_initials, "gulipcgul%d", modem_id);
|
|
|
|
while ((entry = readdir(dir)) != NULL) {
|
|
if (!strncmp(dev_initials, entry->d_name,
|
|
sizeof(dev_initials) - 1))
|
|
break;
|
|
}
|
|
|
|
if (!entry) {
|
|
rte_bbdev_log(ERR, "Error: No gulipcgul%d device", modem_id);
|
|
return -1;
|
|
}
|
|
|
|
sprintf(dev_path, "/dev/%s", entry->d_name);
|
|
dev_ipc = open(dev_path, O_RDWR);
|
|
if (dev_ipc < 0) {
|
|
rte_bbdev_log(ERR, "Error: Cannot open %s", dev_path);
|
|
return -errno;
|
|
}
|
|
|
|
return dev_ipc;
|
|
}
|
|
|
|
static int
|
|
setup_la12xx_dev(struct rte_bbdev *dev)
|
|
{
|
|
struct bbdev_la12xx_private *priv = dev->data->dev_private;
|
|
ipc_userspace_t *ipc_priv = priv->ipc_priv;
|
|
struct hugepage_info *hp = NULL;
|
|
ipc_channel_us_t *ipc_priv_ch = NULL;
|
|
int dev_ipc = 0, dev_mem = 0, i;
|
|
ipc_metadata_t *ipc_md;
|
|
struct gul_hif *mhif;
|
|
uint32_t phy_align = 0;
|
|
int ret;
|
|
|
|
PMD_INIT_FUNC_TRACE();
|
|
|
|
if (!ipc_priv) {
|
|
/* TODO - get a better way */
|
|
/* Get the hugepage info against it */
|
|
hp = get_hugepage_info();
|
|
if (!hp) {
|
|
rte_bbdev_log(ERR, "Unable to get hugepage info");
|
|
ret = -ENOMEM;
|
|
goto err;
|
|
}
|
|
|
|
rte_bbdev_log_debug("0x%" PRIx64 " %p 0x%" PRIx64,
|
|
hp->paddr, hp->vaddr, hp->len);
|
|
|
|
ipc_priv = rte_zmalloc(0, sizeof(ipc_userspace_t), 0);
|
|
if (ipc_priv == NULL) {
|
|
rte_bbdev_log(ERR,
|
|
"Unable to allocate memory for ipc priv");
|
|
ret = -ENOMEM;
|
|
goto err;
|
|
}
|
|
|
|
for (i = 0; i < IPC_MAX_CHANNEL_COUNT; i++) {
|
|
ipc_priv_ch = rte_zmalloc(0,
|
|
sizeof(ipc_channel_us_t), 0);
|
|
if (ipc_priv_ch == NULL) {
|
|
rte_bbdev_log(ERR,
|
|
"Unable to allocate memory for channels");
|
|
ret = -ENOMEM;
|
|
}
|
|
ipc_priv->channels[i] = ipc_priv_ch;
|
|
}
|
|
|
|
dev_mem = open("/dev/mem", O_RDWR);
|
|
if (dev_mem < 0) {
|
|
rte_bbdev_log(ERR, "Error: Cannot open /dev/mem");
|
|
ret = -errno;
|
|
goto err;
|
|
}
|
|
|
|
ipc_priv->instance_id = 0;
|
|
ipc_priv->dev_mem = dev_mem;
|
|
|
|
rte_bbdev_log_debug("hugepg input 0x%" PRIx64 "%p 0x%" PRIx64,
|
|
hp->paddr, hp->vaddr, hp->len);
|
|
|
|
ipc_priv->sys_map.hugepg_start.host_phys = hp->paddr;
|
|
ipc_priv->sys_map.hugepg_start.size = hp->len;
|
|
|
|
ipc_priv->hugepg_start.host_phys = hp->paddr;
|
|
ipc_priv->hugepg_start.host_vaddr = hp->vaddr;
|
|
ipc_priv->hugepg_start.size = hp->len;
|
|
|
|
rte_free(hp);
|
|
}
|
|
|
|
dev_ipc = open_ipc_dev(priv->modem_id);
|
|
if (dev_ipc < 0) {
|
|
rte_bbdev_log(ERR, "Error: open_ipc_dev failed");
|
|
goto err;
|
|
}
|
|
ipc_priv->dev_ipc = dev_ipc;
|
|
|
|
ret = ioctl(ipc_priv->dev_ipc, IOCTL_GUL_IPC_GET_SYS_MAP,
|
|
&ipc_priv->sys_map);
|
|
if (ret) {
|
|
rte_bbdev_log(ERR,
|
|
"IOCTL_GUL_IPC_GET_SYS_MAP ioctl failed");
|
|
goto err;
|
|
}
|
|
|
|
phy_align = (ipc_priv->sys_map.mhif_start.host_phys % 0x1000);
|
|
ipc_priv->mhif_start.host_vaddr =
|
|
mmap(0, ipc_priv->sys_map.mhif_start.size + phy_align,
|
|
(PROT_READ | PROT_WRITE), MAP_SHARED, ipc_priv->dev_mem,
|
|
(ipc_priv->sys_map.mhif_start.host_phys - phy_align));
|
|
if (ipc_priv->mhif_start.host_vaddr == MAP_FAILED) {
|
|
rte_bbdev_log(ERR, "MAP failed:");
|
|
ret = -errno;
|
|
goto err;
|
|
}
|
|
|
|
ipc_priv->mhif_start.host_vaddr = (void *) ((uintptr_t)
|
|
(ipc_priv->mhif_start.host_vaddr) + phy_align);
|
|
|
|
phy_align = (ipc_priv->sys_map.peb_start.host_phys % 0x1000);
|
|
ipc_priv->peb_start.host_vaddr =
|
|
mmap(0, ipc_priv->sys_map.peb_start.size + phy_align,
|
|
(PROT_READ | PROT_WRITE), MAP_SHARED, ipc_priv->dev_mem,
|
|
(ipc_priv->sys_map.peb_start.host_phys - phy_align));
|
|
if (ipc_priv->peb_start.host_vaddr == MAP_FAILED) {
|
|
rte_bbdev_log(ERR, "MAP failed:");
|
|
ret = -errno;
|
|
goto err;
|
|
}
|
|
|
|
ipc_priv->peb_start.host_vaddr = (void *)((uintptr_t)
|
|
(ipc_priv->peb_start.host_vaddr) + phy_align);
|
|
|
|
phy_align = (ipc_priv->sys_map.modem_ccsrbar.host_phys % 0x1000);
|
|
ipc_priv->modem_ccsrbar.host_vaddr =
|
|
mmap(0, ipc_priv->sys_map.modem_ccsrbar.size + phy_align,
|
|
(PROT_READ | PROT_WRITE), MAP_SHARED, ipc_priv->dev_mem,
|
|
(ipc_priv->sys_map.modem_ccsrbar.host_phys - phy_align));
|
|
if (ipc_priv->modem_ccsrbar.host_vaddr == MAP_FAILED) {
|
|
rte_bbdev_log(ERR, "MAP failed:");
|
|
ret = -errno;
|
|
goto err;
|
|
}
|
|
|
|
ipc_priv->modem_ccsrbar.host_vaddr = (void *)((uintptr_t)
|
|
(ipc_priv->modem_ccsrbar.host_vaddr) + phy_align);
|
|
|
|
ipc_priv->hugepg_start.modem_phys =
|
|
ipc_priv->sys_map.hugepg_start.modem_phys;
|
|
|
|
ipc_priv->mhif_start.host_phys =
|
|
ipc_priv->sys_map.mhif_start.host_phys;
|
|
ipc_priv->mhif_start.size = ipc_priv->sys_map.mhif_start.size;
|
|
ipc_priv->peb_start.host_phys = ipc_priv->sys_map.peb_start.host_phys;
|
|
ipc_priv->peb_start.size = ipc_priv->sys_map.peb_start.size;
|
|
|
|
rte_bbdev_log(INFO, "peb 0x%" PRIx64 "%p 0x%" PRIx32,
|
|
ipc_priv->peb_start.host_phys,
|
|
ipc_priv->peb_start.host_vaddr,
|
|
ipc_priv->peb_start.size);
|
|
rte_bbdev_log(INFO, "hugepg 0x%" PRIx64 "%p 0x%" PRIx32,
|
|
ipc_priv->hugepg_start.host_phys,
|
|
ipc_priv->hugepg_start.host_vaddr,
|
|
ipc_priv->hugepg_start.size);
|
|
rte_bbdev_log(INFO, "mhif 0x%" PRIx64 "%p 0x%" PRIx32,
|
|
ipc_priv->mhif_start.host_phys,
|
|
ipc_priv->mhif_start.host_vaddr,
|
|
ipc_priv->mhif_start.size);
|
|
mhif = (struct gul_hif *)ipc_priv->mhif_start.host_vaddr;
|
|
|
|
/* offset is from start of PEB */
|
|
ipc_md = (ipc_metadata_t *)((uintptr_t)ipc_priv->peb_start.host_vaddr +
|
|
mhif->ipc_regs.ipc_mdata_offset);
|
|
|
|
if (sizeof(ipc_metadata_t) != mhif->ipc_regs.ipc_mdata_size) {
|
|
rte_bbdev_log(ERR,
|
|
"ipc_metadata_t =0x%" PRIx64
|
|
", mhif->ipc_regs.ipc_mdata_size=0x%" PRIx32,
|
|
(uint64_t)(sizeof(ipc_metadata_t)),
|
|
mhif->ipc_regs.ipc_mdata_size);
|
|
rte_bbdev_log(ERR, "--> mhif->ipc_regs.ipc_mdata_offset= 0x%"
|
|
PRIx32, mhif->ipc_regs.ipc_mdata_offset);
|
|
rte_bbdev_log(ERR, "gul_hif size=0x%" PRIx64,
|
|
(uint64_t)(sizeof(struct gul_hif)));
|
|
return IPC_MD_SZ_MISS_MATCH;
|
|
}
|
|
|
|
ipc_priv->instance = (ipc_instance_t *)
|
|
(&ipc_md->instance_list[ipc_priv->instance_id]);
|
|
|
|
rte_bbdev_log_debug("finish host init");
|
|
|
|
priv->ipc_priv = ipc_priv;
|
|
|
|
return 0;
|
|
|
|
err:
|
|
rte_free(hp);
|
|
rte_free(ipc_priv);
|
|
rte_free(ipc_priv_ch);
|
|
if (dev_mem)
|
|
close(dev_mem);
|
|
if (dev_ipc)
|
|
close(dev_ipc);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static inline int
|
|
parse_u16_arg(const char *key, const char *value, void *extra_args)
|
|
{
|
|
uint16_t *u16 = extra_args;
|
|
|
|
uint64_t result;
|
|
if ((value == NULL) || (extra_args == NULL))
|
|
return -EINVAL;
|
|
errno = 0;
|
|
result = strtoul(value, NULL, 0);
|
|
if ((result >= (1 << 16)) || (errno != 0)) {
|
|
rte_bbdev_log(ERR, "Invalid value %" PRIu64 " for %s",
|
|
result, key);
|
|
return -ERANGE;
|
|
}
|
|
*u16 = (uint16_t)result;
|
|
return 0;
|
|
}
|
|
|
|
/* Parse integer from integer argument */
|
|
static int
|
|
parse_integer_arg(const char *key __rte_unused,
|
|
const char *value, void *extra_args)
|
|
{
|
|
int i;
|
|
char *end;
|
|
|
|
errno = 0;
|
|
|
|
i = strtol(value, &end, 10);
|
|
if (*end != 0 || errno != 0 || i < 0 || i > LA12XX_MAX_MODEM) {
|
|
rte_bbdev_log(ERR, "Supported Port IDS are 0 to %d",
|
|
LA12XX_MAX_MODEM - 1);
|
|
return -EINVAL;
|
|
}
|
|
|
|
*((uint32_t *)extra_args) = i;
|
|
|
|
return 0;
|
|
}
|
|
|
|
/* Parse parameters used to create device */
|
|
static int
|
|
parse_bbdev_la12xx_params(struct bbdev_la12xx_params *params,
|
|
const char *input_args)
|
|
{
|
|
struct rte_kvargs *kvlist = NULL;
|
|
int ret = 0;
|
|
|
|
if (params == NULL)
|
|
return -EINVAL;
|
|
if (input_args) {
|
|
kvlist = rte_kvargs_parse(input_args,
|
|
bbdev_la12xx_valid_params);
|
|
if (kvlist == NULL)
|
|
return -EFAULT;
|
|
|
|
ret = rte_kvargs_process(kvlist, bbdev_la12xx_valid_params[0],
|
|
&parse_u16_arg, ¶ms->queues_num);
|
|
if (ret < 0)
|
|
goto exit;
|
|
|
|
ret = rte_kvargs_process(kvlist,
|
|
bbdev_la12xx_valid_params[1],
|
|
&parse_integer_arg,
|
|
¶ms->modem_id);
|
|
|
|
if (params->modem_id >= LA12XX_MAX_MODEM) {
|
|
rte_bbdev_log(ERR, "Invalid modem id, must be < %u",
|
|
LA12XX_MAX_MODEM);
|
|
goto exit;
|
|
}
|
|
}
|
|
|
|
exit:
|
|
rte_kvargs_free(kvlist);
|
|
return ret;
|
|
}
|
|
|
|
/* Create device */
|
|
static int
|
|
la12xx_bbdev_create(struct rte_vdev_device *vdev,
|
|
struct bbdev_la12xx_params *init_params)
|
|
{
|
|
struct rte_bbdev *bbdev;
|
|
const char *name = rte_vdev_device_name(vdev);
|
|
struct bbdev_la12xx_private *priv;
|
|
int ret;
|
|
|
|
PMD_INIT_FUNC_TRACE();
|
|
|
|
bbdev = rte_bbdev_allocate(name);
|
|
if (bbdev == NULL)
|
|
return -ENODEV;
|
|
|
|
bbdev->data->dev_private = rte_zmalloc(name,
|
|
sizeof(struct bbdev_la12xx_private),
|
|
RTE_CACHE_LINE_SIZE);
|
|
if (bbdev->data->dev_private == NULL) {
|
|
rte_bbdev_release(bbdev);
|
|
return -ENOMEM;
|
|
}
|
|
|
|
priv = bbdev->data->dev_private;
|
|
priv->modem_id = init_params->modem_id;
|
|
/* if modem id is not configured */
|
|
if (priv->modem_id == -1)
|
|
priv->modem_id = bbdev->data->dev_id;
|
|
|
|
/* Reset Global variables */
|
|
priv->num_ldpc_enc_queues = 0;
|
|
priv->num_ldpc_dec_queues = 0;
|
|
priv->num_valid_queues = 0;
|
|
priv->max_nb_queues = init_params->queues_num;
|
|
|
|
rte_bbdev_log(INFO, "Setting Up %s: DevId=%d, ModemId=%d",
|
|
name, bbdev->data->dev_id, priv->modem_id);
|
|
ret = setup_la12xx_dev(bbdev);
|
|
if (ret) {
|
|
rte_bbdev_log(ERR, "IPC Setup failed for %s", name);
|
|
rte_free(bbdev->data->dev_private);
|
|
return ret;
|
|
}
|
|
bbdev->dev_ops = &pmd_ops;
|
|
bbdev->device = &vdev->device;
|
|
bbdev->data->socket_id = 0;
|
|
bbdev->intr_handle = NULL;
|
|
|
|
/* register rx/tx burst functions for data path */
|
|
bbdev->dequeue_enc_ops = NULL;
|
|
bbdev->dequeue_dec_ops = NULL;
|
|
bbdev->enqueue_enc_ops = NULL;
|
|
bbdev->enqueue_dec_ops = NULL;
|
|
bbdev->dequeue_ldpc_enc_ops = dequeue_enc_ops;
|
|
bbdev->dequeue_ldpc_dec_ops = dequeue_dec_ops;
|
|
bbdev->enqueue_ldpc_enc_ops = enqueue_enc_ops;
|
|
bbdev->enqueue_ldpc_dec_ops = enqueue_dec_ops;
|
|
|
|
return 0;
|
|
}
|
|
|
|
/* Initialise device */
|
|
static int
|
|
la12xx_bbdev_probe(struct rte_vdev_device *vdev)
|
|
{
|
|
struct bbdev_la12xx_params init_params = {
|
|
8, -1,
|
|
};
|
|
const char *name;
|
|
const char *input_args;
|
|
|
|
PMD_INIT_FUNC_TRACE();
|
|
|
|
if (vdev == NULL)
|
|
return -EINVAL;
|
|
|
|
name = rte_vdev_device_name(vdev);
|
|
if (name == NULL)
|
|
return -EINVAL;
|
|
|
|
input_args = rte_vdev_device_args(vdev);
|
|
parse_bbdev_la12xx_params(&init_params, input_args);
|
|
|
|
return la12xx_bbdev_create(vdev, &init_params);
|
|
}
|
|
|
|
/* Uninitialise device */
|
|
static int
|
|
la12xx_bbdev_remove(struct rte_vdev_device *vdev)
|
|
{
|
|
struct rte_bbdev *bbdev;
|
|
const char *name;
|
|
|
|
PMD_INIT_FUNC_TRACE();
|
|
|
|
if (rte_eal_process_type() != RTE_PROC_PRIMARY)
|
|
return 0;
|
|
|
|
if (vdev == NULL)
|
|
return -EINVAL;
|
|
|
|
name = rte_vdev_device_name(vdev);
|
|
if (name == NULL)
|
|
return -EINVAL;
|
|
|
|
bbdev = rte_bbdev_get_named_dev(name);
|
|
if (bbdev == NULL)
|
|
return -EINVAL;
|
|
|
|
rte_free(bbdev->data->dev_private);
|
|
|
|
return rte_bbdev_release(bbdev);
|
|
}
|
|
|
|
static struct rte_vdev_driver bbdev_la12xx_pmd_drv = {
|
|
.probe = la12xx_bbdev_probe,
|
|
.remove = la12xx_bbdev_remove
|
|
};
|
|
|
|
RTE_PMD_REGISTER_VDEV(DRIVER_NAME, bbdev_la12xx_pmd_drv);
|
|
RTE_PMD_REGISTER_PARAM_STRING(DRIVER_NAME,
|
|
LA12XX_MAX_NB_QUEUES_ARG"=<int>"
|
|
LA12XX_VDEV_MODEM_ID_ARG "=<int> ");
|
|
RTE_LOG_REGISTER_DEFAULT(bbdev_la12xx_logtype, NOTICE);
|