mirror of https://github.com/F-Stack/f-stack.git
93 lines
2.8 KiB
C
93 lines
2.8 KiB
C
/* SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0)
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*
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* Copyright 2008-2016 Freescale Semiconductor Inc.
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* Copyright 2017 NXP
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*
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*/
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#ifndef __BMAN_PRIV_H
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#define __BMAN_PRIV_H
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#include "dpaa_sys.h"
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#include <fsl_bman.h>
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/* Revision info (for errata and feature handling) */
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#define BMAN_REV10 0x0100
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#define BMAN_REV20 0x0200
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#define BMAN_REV21 0x0201
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#define BMAN_PORTAL_IRQ_PATH "/dev/fsl-usdpaa-irq"
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#define BMAN_CCSR_MAP "/dev/mem"
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/* This mask contains all the "irqsource" bits visible to API users */
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#define BM_PIRQ_VISIBLE (BM_PIRQ_RCRI | BM_PIRQ_BSCN)
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/* These are bm_<reg>_<verb>(). So for example, bm_disable_write() means "write
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* the disable register" rather than "disable the ability to write".
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*/
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#define bm_isr_status_read(bm) __bm_isr_read(bm, bm_isr_status)
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#define bm_isr_status_clear(bm, m) __bm_isr_write(bm, bm_isr_status, m)
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#define bm_isr_enable_read(bm) __bm_isr_read(bm, bm_isr_enable)
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#define bm_isr_enable_write(bm, v) __bm_isr_write(bm, bm_isr_enable, v)
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#define bm_isr_disable_read(bm) __bm_isr_read(bm, bm_isr_disable)
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#define bm_isr_disable_write(bm, v) __bm_isr_write(bm, bm_isr_disable, v)
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#define bm_isr_inhibit(bm) __bm_isr_write(bm, bm_isr_inhibit, 1)
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#define bm_isr_uninhibit(bm) __bm_isr_write(bm, bm_isr_inhibit, 0)
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/*
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* Global variables of the max portal/pool number this bman version supported
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*/
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extern u16 bman_pool_max;
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/* used by CCSR and portal interrupt code */
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enum bm_isr_reg {
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bm_isr_status = 0,
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bm_isr_enable = 1,
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bm_isr_disable = 2,
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bm_isr_inhibit = 3
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};
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struct bm_portal_config {
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/*
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* Corenet portal addresses;
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* [0]==cache-enabled, [1]==cache-inhibited.
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*/
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void __iomem *addr_virt[2];
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/* Allow these to be joined in lists */
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struct list_head list;
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/* User-visible portal configuration settings */
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/* This is used for any "core-affine" portals, ie. default portals
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* associated to the corresponding cpu. -1 implies that there is no
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* core affinity configured.
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*/
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int cpu;
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/* portal interrupt line */
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int irq;
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/* the unique index of this portal */
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u32 index;
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/* Is this portal shared? (If so, it has coarser locking and demuxes
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* processing on behalf of other CPUs.).
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*/
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int is_shared;
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/* These are the buffer pool IDs that may be used via this portal. */
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struct bman_depletion mask;
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};
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int bman_init_ccsr(const struct device_node *node);
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struct bman_portal *bman_create_affine_portal(
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const struct bm_portal_config *config);
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const struct bm_portal_config *bman_destroy_affine_portal(void);
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/* Set depletion thresholds associated with a buffer pool. Requires that the
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* operating system have access to Bman CCSR (ie. compiled in support and
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* run-time access courtesy of the device-tree).
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*/
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int bm_pool_set(u32 bpid, const u32 *thresholds);
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/* Read the free buffer count for a given buffer */
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u32 bm_pool_free_buffers(u32 bpid);
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#endif /* __BMAN_PRIV_H */
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