mirror of https://github.com/F-Stack/f-stack.git
317 lines
6.4 KiB
C
317 lines
6.4 KiB
C
/* SPDX-License-Identifier: BSD-3-Clause
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* Copyright(c) 2010-2019 Intel Corporation
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*/
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#include "opae_osdep.h"
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#include "opae_eth_group.h"
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#define DATA_VAL_INVL 1 /* us */
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#define DATA_VAL_POLL_TIMEOUT 10 /* us */
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static const char *eth_type_to_string(u8 type)
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{
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switch (type) {
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case ETH_GROUP_PHY:
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return "phy";
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case ETH_GROUP_MAC:
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return "mac";
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case ETH_GROUP_ETHER:
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return "ethernet wrapper";
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}
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return "unknown";
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}
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static int eth_group_get_select(struct eth_group_device *dev,
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u8 type, u8 index, u8 *select)
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{
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/*
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* in different speed configuration, the index of
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* PHY and MAC are different.
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*
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* 1 ethernet wrapper -> Device Select 0x0 - fixed value
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* n PHYs -> Device Select 0x2,4,6,8,A,C,E,10,...
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* n MACs -> Device Select 0x3,5,7,9,B,D,F,11,...
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*/
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if (type == ETH_GROUP_PHY && index < dev->phy_num)
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*select = index * 2 + 2;
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else if (type == ETH_GROUP_MAC && index < dev->mac_num)
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*select = index * 2 + 3;
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else if (type == ETH_GROUP_ETHER && index == 0)
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*select = 0;
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else
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return -EINVAL;
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return 0;
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}
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int eth_group_write_reg(struct eth_group_device *dev,
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u8 type, u8 index, u16 addr, u32 data)
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{
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u8 dev_select = 0;
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u64 v = 0;
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int ret;
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dev_debug(dev, "%s type %s index %u addr 0x%x\n",
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__func__, eth_type_to_string(type), index, addr);
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/* find device select */
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ret = eth_group_get_select(dev, type, index, &dev_select);
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if (ret)
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return ret;
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v = CMD_WR << CTRL_CMD_SHIT |
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(u64)dev_select << CTRL_DS_SHIFT |
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(u64)addr << CTRL_ADDR_SHIFT |
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(data & CTRL_WR_DATA);
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/* only PHY has additional feature bit */
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if (type == ETH_GROUP_PHY)
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v |= CTRL_FEAT_SELECT;
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opae_writeq(v, dev->base + ETH_GROUP_CTRL);
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return 0;
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}
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int eth_group_read_reg(struct eth_group_device *dev,
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u8 type, u8 index, u16 addr, u32 *data)
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{
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u8 dev_select = 0;
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u64 v = 0;
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int ret;
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dev_debug(dev, "%s type %s index %u addr 0x%x\n",
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__func__, eth_type_to_string(type), index,
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addr);
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/* find device select */
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ret = eth_group_get_select(dev, type, index, &dev_select);
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if (ret)
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return ret;
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v = CMD_RD << CTRL_CMD_SHIT |
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(u64)dev_select << CTRL_DS_SHIFT |
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(u64)addr << CTRL_ADDR_SHIFT;
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/* only PHY has additional feature bit */
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if (type == ETH_GROUP_PHY)
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v |= CTRL_FEAT_SELECT;
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opae_writeq(v, dev->base + ETH_GROUP_CTRL);
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if (opae_readq_poll_timeout(dev->base + ETH_GROUP_STAT,
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v, v & STAT_DATA_VAL, DATA_VAL_INVL,
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DATA_VAL_POLL_TIMEOUT))
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return -ETIMEDOUT;
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*data = (v & STAT_RD_DATA);
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dev_debug(dev, "%s data 0x%x\n", __func__, *data);
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return 0;
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}
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static int eth_group_reset_mac(struct eth_group_device *dev, u8 index,
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bool enable)
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{
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u32 val;
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int ret;
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/*
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* only support 25G & 40G mac reset for now. It uses internal reset.
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* as PHY and MAC are integrated together, below action will trigger
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* PHY reset too.
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*/
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if (dev->speed != 25 && dev->speed != 40)
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return 0;
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ret = eth_group_read_reg(dev, ETH_GROUP_MAC, index, MAC_CONFIG,
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&val);
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if (ret) {
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dev_err(dev, "fail to read PHY_CONFIG: %d\n", ret);
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return ret;
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}
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/* skip if mac is in expected state already */
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if ((((val & MAC_RESET_MASK) == MAC_RESET_MASK) && enable) ||
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(((val & MAC_RESET_MASK) == 0) && !enable))
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return 0;
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if (enable)
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val |= MAC_RESET_MASK;
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else
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val &= ~MAC_RESET_MASK;
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ret = eth_group_write_reg(dev, ETH_GROUP_MAC, index, MAC_CONFIG,
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val);
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if (ret)
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dev_err(dev, "fail to write PHY_CONFIG: %d\n", ret);
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return ret;
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}
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static void eth_group_mac_uinit(struct eth_group_device *dev)
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{
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u8 i;
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for (i = 0; i < dev->mac_num; i++) {
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if (eth_group_reset_mac(dev, i, true))
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dev_err(dev, "fail to disable mac %d\n", i);
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}
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}
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static int eth_group_mac_init(struct eth_group_device *dev)
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{
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int ret;
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u8 i;
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for (i = 0; i < dev->mac_num; i++) {
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ret = eth_group_reset_mac(dev, i, false);
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if (ret) {
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dev_err(dev, "fail to enable mac %d\n", i);
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goto exit;
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}
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}
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return 0;
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exit:
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while (i--)
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eth_group_reset_mac(dev, i, true);
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return ret;
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}
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static int eth_group_reset_phy(struct eth_group_device *dev, u8 index,
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bool enable)
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{
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u32 val;
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int ret;
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/* only support 10G PHY reset for now. It uses external reset. */
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if (dev->speed != 10)
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return 0;
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ret = eth_group_read_reg(dev, ETH_GROUP_PHY, index,
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ADD_PHY_CTRL, &val);
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if (ret) {
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dev_err(dev, "fail to read ADD_PHY_CTRL reg: %d\n", ret);
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return ret;
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}
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/* return if PHY is already in expected state */
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if ((val & PHY_RESET && enable) || (!(val & PHY_RESET) && !enable))
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return 0;
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if (enable)
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val |= PHY_RESET;
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else
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val &= ~PHY_RESET;
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ret = eth_group_write_reg(dev, ETH_GROUP_PHY, index,
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ADD_PHY_CTRL, val);
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if (ret)
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dev_err(dev, "fail to write ADD_PHY_CTRL reg: %d\n", ret);
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return ret;
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}
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static int eth_group_phy_init(struct eth_group_device *dev)
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{
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int ret;
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int i;
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for (i = 0; i < dev->phy_num; i++) {
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ret = eth_group_reset_phy(dev, i, false);
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if (ret) {
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dev_err(dev, "fail to enable phy %d\n", i);
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goto exit;
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}
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}
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return 0;
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exit:
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while (i--)
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eth_group_reset_phy(dev, i, true);
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return ret;
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}
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static void eth_group_phy_uinit(struct eth_group_device *dev)
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{
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int i;
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for (i = 0; i < dev->phy_num; i++) {
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if (eth_group_reset_phy(dev, i, true))
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dev_err(dev, "fail to disable phy %d\n", i);
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}
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}
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static int eth_group_hw_init(struct eth_group_device *dev)
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{
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int ret;
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ret = eth_group_phy_init(dev);
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if (ret) {
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dev_err(dev, "fail to init eth group phys\n");
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return ret;
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}
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ret = eth_group_mac_init(dev);
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if (ret) {
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dev_err(priv->dev, "fail to init eth group macs\n");
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goto phy_exit;
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}
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return 0;
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phy_exit:
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eth_group_phy_uinit(dev);
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return ret;
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}
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static void eth_group_hw_uinit(struct eth_group_device *dev)
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{
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eth_group_mac_uinit(dev);
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eth_group_phy_uinit(dev);
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}
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struct eth_group_device *eth_group_probe(void *base)
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{
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struct eth_group_device *dev;
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dev = opae_malloc(sizeof(*dev));
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if (!dev)
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return NULL;
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dev->base = (u8 *)base;
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dev->info.info = opae_readq(dev->base + ETH_GROUP_INFO);
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dev->group_id = dev->info.group_id;
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dev->phy_num = dev->mac_num = dev->info.num_phys;
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dev->speed = dev->info.speed;
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dev->status = ETH_GROUP_DEV_ATTACHED;
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if (eth_group_hw_init(dev)) {
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dev_err(dev, "eth group hw init fail\n");
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return NULL;
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}
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dev_info(dev, "eth group device %d probe done: phy_num=mac_num:%d, speed=%d\n",
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dev->group_id, dev->phy_num, dev->speed);
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return dev;
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}
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void eth_group_release(struct eth_group_device *dev)
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{
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if (dev) {
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eth_group_hw_uinit(dev);
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dev->status = ETH_GROUP_DEV_NOUSED;
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opae_free(dev);
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}
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}
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