mirror of https://github.com/F-Stack/f-stack.git
166 lines
3.9 KiB
C
166 lines
3.9 KiB
C
/* SPDX-License-Identifier: BSD-3-Clause
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* Copyright(c) 2018 Intel Corporation
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*/
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#ifndef _IFCVF_H_
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#define _IFCVF_H_
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#include "ifcvf_osdep.h"
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#define IFCVF_VENDOR_ID 0x1AF4
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#define IFCVF_DEVICE_ID 0x1041
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#define IFCVF_SUBSYS_VENDOR_ID 0x8086
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#define IFCVF_SUBSYS_DEVICE_ID 0x001A
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#define IFCVF_MAX_QUEUES 1
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#ifndef VIRTIO_F_IOMMU_PLATFORM
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#define VIRTIO_F_IOMMU_PLATFORM 33
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#endif
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/* Common configuration */
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#define IFCVF_PCI_CAP_COMMON_CFG 1
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/* Notifications */
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#define IFCVF_PCI_CAP_NOTIFY_CFG 2
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/* ISR Status */
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#define IFCVF_PCI_CAP_ISR_CFG 3
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/* Device specific configuration */
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#define IFCVF_PCI_CAP_DEVICE_CFG 4
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/* PCI configuration access */
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#define IFCVF_PCI_CAP_PCI_CFG 5
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#define IFCVF_CONFIG_STATUS_RESET 0x00
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#define IFCVF_CONFIG_STATUS_ACK 0x01
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#define IFCVF_CONFIG_STATUS_DRIVER 0x02
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#define IFCVF_CONFIG_STATUS_DRIVER_OK 0x04
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#define IFCVF_CONFIG_STATUS_FEATURES_OK 0x08
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#define IFCVF_CONFIG_STATUS_FAILED 0x80
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#define IFCVF_MSI_NO_VECTOR 0xffff
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#define IFCVF_PCI_MAX_RESOURCE 6
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#define IFCVF_LM_CFG_SIZE 0x40
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#define IFCVF_LM_RING_STATE_OFFSET 0x20
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#define IFCVF_LM_LOGGING_CTRL 0x0
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#define IFCVF_LM_BASE_ADDR_LOW 0x10
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#define IFCVF_LM_BASE_ADDR_HIGH 0x14
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#define IFCVF_LM_END_ADDR_LOW 0x18
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#define IFCVF_LM_END_ADDR_HIGH 0x1c
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#define IFCVF_LM_DISABLE 0x0
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#define IFCVF_LM_ENABLE_VF 0x1
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#define IFCVF_LM_ENABLE_PF 0x3
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#define IFCVF_LOG_BASE 0x100000000000
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#define IFCVF_MEDIATED_VRING 0x200000000000
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#define IFCVF_32_BIT_MASK 0xffffffff
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struct ifcvf_pci_cap {
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u8 cap_vndr; /* Generic PCI field: PCI_CAP_ID_VNDR */
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u8 cap_next; /* Generic PCI field: next ptr. */
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u8 cap_len; /* Generic PCI field: capability length */
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u8 cfg_type; /* Identifies the structure. */
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u8 bar; /* Where to find it. */
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u8 padding[3]; /* Pad to full dword. */
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u32 offset; /* Offset within bar. */
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u32 length; /* Length of the structure, in bytes. */
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};
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struct ifcvf_pci_notify_cap {
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struct ifcvf_pci_cap cap;
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u32 notify_off_multiplier; /* Multiplier for queue_notify_off. */
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};
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struct ifcvf_pci_common_cfg {
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/* About the whole device. */
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u32 device_feature_select;
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u32 device_feature;
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u32 guest_feature_select;
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u32 guest_feature;
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u16 msix_config;
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u16 num_queues;
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u8 device_status;
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u8 config_generation;
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/* About a specific virtqueue. */
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u16 queue_select;
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u16 queue_size;
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u16 queue_msix_vector;
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u16 queue_enable;
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u16 queue_notify_off;
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u32 queue_desc_lo;
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u32 queue_desc_hi;
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u32 queue_avail_lo;
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u32 queue_avail_hi;
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u32 queue_used_lo;
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u32 queue_used_hi;
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};
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struct ifcvf_net_config {
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u8 mac[6];
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u16 status;
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u16 max_virtqueue_pairs;
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} __attribute__((packed));
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struct ifcvf_pci_mem_resource {
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u64 phys_addr; /**< Physical address, 0 if not resource. */
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u64 len; /**< Length of the resource. */
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u8 *addr; /**< Virtual address, NULL when not mapped. */
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};
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struct vring_info {
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u64 desc;
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u64 avail;
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u64 used;
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u16 size;
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u16 last_avail_idx;
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u16 last_used_idx;
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};
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struct ifcvf_hw {
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u64 req_features;
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u8 notify_region;
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u32 notify_off_multiplier;
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struct ifcvf_pci_common_cfg *common_cfg;
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struct ifcvf_net_config *dev_cfg;
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u8 *isr;
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u16 *notify_base;
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u16 *notify_addr[IFCVF_MAX_QUEUES * 2];
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u8 *lm_cfg;
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struct vring_info vring[IFCVF_MAX_QUEUES * 2];
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u8 nr_vring;
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struct ifcvf_pci_mem_resource mem_resource[IFCVF_PCI_MAX_RESOURCE];
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};
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int
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ifcvf_init_hw(struct ifcvf_hw *hw, PCI_DEV *dev);
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u64
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ifcvf_get_features(struct ifcvf_hw *hw);
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int
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ifcvf_start_hw(struct ifcvf_hw *hw);
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void
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ifcvf_stop_hw(struct ifcvf_hw *hw);
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void
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ifcvf_enable_logging(struct ifcvf_hw *hw, u64 log_base, u64 log_size);
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void
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ifcvf_disable_logging(struct ifcvf_hw *hw);
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void
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ifcvf_notify_queue(struct ifcvf_hw *hw, u16 qid);
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u8
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ifcvf_get_notify_region(struct ifcvf_hw *hw);
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u64
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ifcvf_get_queue_notify_off(struct ifcvf_hw *hw, int qid);
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#endif /* _IFCVF_H_ */
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