mirror of https://github.com/F-Stack/f-stack.git
146 lines
2.9 KiB
C
146 lines
2.9 KiB
C
/* SPDX-License-Identifier: BSD-3-Clause
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* Copyright(c) 2010-2018 Intel Corporation
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*/
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#include "opae_ifpga_hw_api.h"
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#include "ifpga_api.h"
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int opae_manager_ifpga_get_prop(struct opae_manager *mgr,
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struct feature_prop *prop)
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{
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struct ifpga_fme_hw *fme;
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if (!mgr || !mgr->data)
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return -EINVAL;
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fme = mgr->data;
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return ifpga_get_prop(fme->parent, FEATURE_FIU_ID_FME, 0, prop);
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}
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int opae_manager_ifpga_set_prop(struct opae_manager *mgr,
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struct feature_prop *prop)
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{
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struct ifpga_fme_hw *fme;
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if (!mgr || !mgr->data)
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return -EINVAL;
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fme = mgr->data;
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return ifpga_set_prop(fme->parent, FEATURE_FIU_ID_FME, 0, prop);
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}
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int opae_manager_ifpga_get_info(struct opae_manager *mgr,
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struct fpga_fme_info *fme_info)
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{
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struct ifpga_fme_hw *fme;
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if (!mgr || !mgr->data || !fme_info)
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return -EINVAL;
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fme = mgr->data;
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spinlock_lock(&fme->lock);
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fme_info->capability = fme->capability;
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spinlock_unlock(&fme->lock);
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return 0;
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}
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int opae_manager_ifpga_set_err_irq(struct opae_manager *mgr,
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struct fpga_fme_err_irq_set *err_irq_set)
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{
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struct ifpga_fme_hw *fme;
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if (!mgr || !mgr->data)
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return -EINVAL;
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fme = mgr->data;
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return ifpga_set_irq(fme->parent, FEATURE_FIU_ID_FME, 0,
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IFPGA_FME_FEATURE_ID_GLOBAL_ERR, err_irq_set);
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}
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int opae_bridge_ifpga_get_prop(struct opae_bridge *br,
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struct feature_prop *prop)
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{
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struct ifpga_port_hw *port;
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if (!br || !br->data)
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return -EINVAL;
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port = br->data;
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return ifpga_get_prop(port->parent, FEATURE_FIU_ID_PORT,
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port->port_id, prop);
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}
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int opae_bridge_ifpga_set_prop(struct opae_bridge *br,
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struct feature_prop *prop)
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{
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struct ifpga_port_hw *port;
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if (!br || !br->data)
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return -EINVAL;
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port = br->data;
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return ifpga_set_prop(port->parent, FEATURE_FIU_ID_PORT,
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port->port_id, prop);
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}
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int opae_bridge_ifpga_get_info(struct opae_bridge *br,
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struct fpga_port_info *port_info)
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{
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struct ifpga_port_hw *port;
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if (!br || !br->data || !port_info)
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return -EINVAL;
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port = br->data;
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spinlock_lock(&port->lock);
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port_info->capability = port->capability;
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port_info->num_uafu_irqs = port->num_uafu_irqs;
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spinlock_unlock(&port->lock);
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return 0;
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}
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int opae_bridge_ifpga_get_region_info(struct opae_bridge *br,
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struct fpga_port_region_info *info)
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{
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struct ifpga_port_hw *port;
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if (!br || !br->data || !info)
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return -EINVAL;
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/* Only support STP region now */
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if (info->index != PORT_REGION_INDEX_STP)
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return -EINVAL;
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port = br->data;
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spinlock_lock(&port->lock);
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info->addr = port->stp_addr;
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info->size = port->stp_size;
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spinlock_unlock(&port->lock);
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return 0;
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}
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int opae_bridge_ifpga_set_err_irq(struct opae_bridge *br,
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struct fpga_port_err_irq_set *err_irq_set)
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{
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struct ifpga_port_hw *port;
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if (!br || !br->data)
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return -EINVAL;
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port = br->data;
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return ifpga_set_irq(port->parent, FEATURE_FIU_ID_PORT, port->port_id,
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IFPGA_PORT_FEATURE_ID_ERROR, err_irq_set);
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}
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