mirror of https://github.com/F-Stack/f-stack.git
103 lines
2.9 KiB
C
103 lines
2.9 KiB
C
/* SPDX-License-Identifier: BSD-3-Clause
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* Copyright(c) 2010-2018 Intel Corporation
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*/
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#define OPAE_HW_DEBUG
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#include "opae_hw_api.h"
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#include "opae_debug.h"
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void opae_manager_dump(struct opae_manager *mgr)
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{
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opae_log("=====%s=====\n", __func__);
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opae_log("OPAE Manger %s\n", mgr->name);
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opae_log("OPAE Manger OPs = %p\n", mgr->ops);
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opae_log("OPAE Manager Private Data = %p\n", mgr->data);
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opae_log("OPAE Adapter(parent) = %p\n", mgr->adapter);
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opae_log("==========================\n");
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}
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void opae_bridge_dump(struct opae_bridge *br)
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{
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opae_log("=====%s=====\n", __func__);
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opae_log("OPAE Bridge %s\n", br->name);
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opae_log("OPAE Bridge ID = %d\n", br->id);
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opae_log("OPAE Bridge OPs = %p\n", br->ops);
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opae_log("OPAE Bridge Private Data = %p\n", br->data);
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opae_log("OPAE Accelerator(under this bridge) = %p\n", br->acc);
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opae_log("==========================\n");
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}
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void opae_accelerator_dump(struct opae_accelerator *acc)
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{
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opae_log("=====%s=====\n", __func__);
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opae_log("OPAE Accelerator %s\n", acc->name);
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opae_log("OPAE Accelerator Index = %d\n", acc->index);
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opae_log("OPAE Accelerator OPs = %p\n", acc->ops);
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opae_log("OPAE Accelerator Private Data = %p\n", acc->data);
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opae_log("OPAE Bridge (upstream) = %p\n", acc->br);
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opae_log("OPAE Manager (upstream) = %p\n", acc->mgr);
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opae_log("==========================\n");
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if (acc->br)
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opae_bridge_dump(acc->br);
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}
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static void opae_adapter_data_dump(void *data)
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{
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struct opae_adapter_data *d = data;
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struct opae_adapter_data_pci *d_pci;
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struct opae_reg_region *r;
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int i;
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opae_log("=====%s=====\n", __func__);
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switch (d->type) {
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case OPAE_FPGA_PCI:
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d_pci = (struct opae_adapter_data_pci *)d;
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opae_log("OPAE Adapter Type = PCI\n");
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opae_log("PCI Device ID: 0x%04x\n", d_pci->device_id);
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opae_log("PCI Vendor ID: 0x%04x\n", d_pci->vendor_id);
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opae_log("PCI bus: 0x%04x\n", d_pci->bus);
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opae_log("PCI devid: 0x%04x\n", d_pci->devid);
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opae_log("PCI function: 0x%04x\n", d_pci->function);
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for (i = 0; i < PCI_MAX_RESOURCE; i++) {
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r = &d_pci->region[i];
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opae_log("PCI Bar %d: phy(%llx) len(%llx) addr(%p)\n",
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i, (unsigned long long)r->phys_addr,
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(unsigned long long)r->len, r->addr);
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}
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break;
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case OPAE_FPGA_NET:
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break;
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}
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opae_log("==========================\n");
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}
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void opae_adapter_dump(struct opae_adapter *adapter, int verbose)
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{
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struct opae_accelerator *acc;
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if (verbose) {
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opae_log("=====%s=====\n", __func__);
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opae_log("OPAE Adapter %s\n", adapter->name);
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opae_log("OPAE Adapter OPs = %p\n", adapter->ops);
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opae_log("OPAE Adapter Private Data = %p\n", adapter->data);
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opae_log("OPAE Manager (downstream) = %p\n", adapter->mgr);
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if (adapter->mgr)
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opae_manager_dump(adapter->mgr);
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opae_adapter_for_each_acc(adapter, acc)
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opae_accelerator_dump(acc);
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if (adapter->data)
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opae_adapter_data_dump(adapter->data);
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opae_log("==========================\n");
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}
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}
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