mirror of https://github.com/F-Stack/f-stack.git
147 lines
3.1 KiB
C
147 lines
3.1 KiB
C
/* SPDX-License-Identifier: BSD-3-Clause
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*
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* Copyright(c) 2019-2020 Xilinx, Inc.
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* Copyright(c) 2019 Solarflare Communications Inc.
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*/
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#include "efx.h"
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#include "efx_impl.h"
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#if EFSYS_OPT_RIVERHEAD && EFSYS_OPT_PCI
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/*
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* Search for a EF100 resource locator from the given offset of an entry
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* in a Xilinx capabilities table.
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*/
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static __checkReturn efx_rc_t
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rhead_xilinx_cap_tbl_find_ef100_locator(
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__in efsys_bar_t *esbp,
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__in efsys_dma_addr_t tbl_offset,
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__out efx_bar_region_t *ef100_ebrp)
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{
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efx_rc_t rc;
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efsys_dma_addr_t entry_offset = tbl_offset;
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rc = efx_pci_xilinx_cap_tbl_find(esbp, ESE_GZ_CFGBAR_ENTRY_EF100,
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B_FALSE, &entry_offset);
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if (rc != 0) {
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/* EF100 locator not found (ENOENT) or other error */
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goto fail1;
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}
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rc = rhead_nic_xilinx_cap_tbl_read_ef100_locator(esbp, entry_offset,
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ef100_ebrp);
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if (rc != 0)
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goto fail2;
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return (0);
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fail2:
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EFSYS_PROBE(fail2);
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fail1:
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EFSYS_PROBE1(fail1, efx_rc_t, rc);
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return (rc);
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}
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__checkReturn efx_rc_t
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rhead_pci_nic_membar_lookup(
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__in efsys_pci_config_t *espcp,
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__in const efx_pci_ops_t *epop,
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__out efx_bar_region_t *ebrp)
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{
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boolean_t xilinx_tbl_found = B_FALSE;
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unsigned int xilinx_tbl_bar;
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efsys_dma_addr_t xilinx_tbl_offset;
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size_t pci_capa_offset = 0;
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boolean_t bar_found = B_FALSE;
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efx_rc_t rc = ENOENT;
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efsys_bar_t xil_eb;
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efsys_bar_t nic_eb;
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efx_dword_t magic_ed;
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uint32_t magic;
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/*
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* SF-119689-TC Riverhead Host Interface section 4.2.2. describes
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* the following discovery steps.
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*/
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while (1) {
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rc = efx_pci_find_next_xilinx_cap_table(espcp, epop,
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&pci_capa_offset,
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&xilinx_tbl_bar,
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&xilinx_tbl_offset);
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if (rc != 0) {
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/*
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* SF-119689-TC Riverhead Host Interface section 4.2.2.
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* defines the following fallbacks for the memory bar
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* and the offset when no Xilinx capabilities table is
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* found.
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*/
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if (rc == ENOENT && xilinx_tbl_found == B_FALSE) {
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ebrp->ebr_type = EFX_BAR_TYPE_MEM;
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ebrp->ebr_index = EFX_MEM_BAR_RIVERHEAD;
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ebrp->ebr_offset = 0;
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ebrp->ebr_length = 0;
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bar_found = B_TRUE;
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break;
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} else {
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goto fail1;
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}
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}
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xilinx_tbl_found = B_TRUE;
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rc = epop->epo_find_mem_bar(espcp, xilinx_tbl_bar, &xil_eb);
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if (rc != 0)
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goto fail2;
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rc = rhead_xilinx_cap_tbl_find_ef100_locator(&xil_eb,
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xilinx_tbl_offset,
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ebrp);
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if (rc == 0) {
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/* Found valid EF100 locator. */
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bar_found = B_TRUE;
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break;
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} else if (rc != ENOENT) {
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/* Table access failed, so terminate search. */
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goto fail3;
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}
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}
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if (bar_found == B_FALSE)
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goto fail4;
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rc = epop->epo_find_mem_bar(espcp, ebrp->ebr_index, &nic_eb);
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if (rc != 0)
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goto fail5;
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EFSYS_BAR_READD(&nic_eb, ebrp->ebr_offset + ER_GZ_NIC_MAGIC_OFST,
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&magic_ed, B_FALSE);
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magic = EFX_DWORD_FIELD(magic_ed, ERF_GZ_NIC_MAGIC);
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if (magic != EFE_GZ_NIC_MAGIC_EXPECTED) {
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rc = EINVAL;
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goto fail6;
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}
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return (0);
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fail6:
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EFSYS_PROBE(fail6);
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fail5:
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EFSYS_PROBE(fail5);
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fail4:
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EFSYS_PROBE(fail4);
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fail3:
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EFSYS_PROBE(fail3);
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fail2:
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EFSYS_PROBE(fail2);
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fail1:
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EFSYS_PROBE1(fail1, efx_rc_t, rc);
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return (rc);
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}
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#endif /* EFSYS_OPT_RIVERHEAD && EFSYS_OPT_PCI */
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