mirror of https://github.com/F-Stack/f-stack.git
185 lines
6.7 KiB
C
185 lines
6.7 KiB
C
/* SPDX-License-Identifier: BSD-3-Clause
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*
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* Copyright(c) 2019-2020 Xilinx, Inc.
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* Copyright(c) 2012-2019 Solarflare Communications Inc.
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*/
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/*
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* This is NOT the original source file. Do NOT edit it.
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* To update the board and firmware ids, please edit the copy in
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* the sfregistry repo and then, in that repo,
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* "make id_headers" or "make export" to
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* regenerate and export all types of headers.
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*/
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#ifndef CI_MGMT_FIRMWARE_IDS_H
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#define CI_MGMT_FIRMWARE_IDS_H
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/* Reference: SF-103588-PS
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*
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* This header file is the input for v5s/scripts/genfwdef. So if you touch it,
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* ensure that v5/scripts/genfwdef still works.
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*/
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enum {
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FIRMWARE_TYPE_PHY = 0,
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FIRMWARE_TYPE_PHY_LOADER = 1,
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FIRMWARE_TYPE_BOOTROM = 2,
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FIRMWARE_TYPE_MCFW = 3,
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FIRMWARE_TYPE_MCFW_BACKUP = 4,
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FIRMWARE_TYPE_DISABLED_CALLISTO = 5,
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FIRMWARE_TYPE_FPGA = 6,
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FIRMWARE_TYPE_FPGA_BACKUP = 7,
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FIRMWARE_TYPE_FCFW = 8,
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FIRMWARE_TYPE_FCFW_BACKUP = 9,
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FIRMWARE_TYPE_CPLD = 10,
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FIRMWARE_TYPE_MUMFW = 11,
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FIRMWARE_TYPE_UEFIROM = 12,
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FIRMWARE_TYPE_BUNDLE = 13,
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FIRMWARE_TYPE_CMCFW = 14,
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};
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enum {
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FIRMWARE_PHY_SUBTYPE_SFX7101B = 0x3,
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FIRMWARE_PHY_SUBTYPE_SFT9001A = 0x8,
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FIRMWARE_PHY_SUBTYPE_QT2025C = 0x9,
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FIRMWARE_PHY_SUBTYPE_SFT9001B = 0xa,
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FIRMWARE_PHY_SUBTYPE_SFL9021 = 0x10, /* used for loader only */
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FIRMWARE_PHY_SUBTYPE_QT2025_KR = 0x11, /* QT2025 in KR rather than SFP+ mode */
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FIRMWARE_PHY_SUBTYPE_AEL3020 = 0x12, /* As seen on the R2 HP blade NIC */
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};
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enum {
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FIRMWARE_BOOTROM_SUBTYPE_FALCON = 0,
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FIRMWARE_BOOTROM_SUBTYPE_BETHPAGE = 1,
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FIRMWARE_BOOTROM_SUBTYPE_SIENA = 2,
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FIRMWARE_BOOTROM_SUBTYPE_HUNTINGTON = 3,
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FIRMWARE_BOOTROM_SUBTYPE_FARMINGDALE = 4,
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FIRMWARE_BOOTROM_SUBTYPE_GREENPORT = 5,
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FIRMWARE_BOOTROM_SUBTYPE_MEDFORD = 6,
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FIRMWARE_BOOTROM_SUBTYPE_MEDFORD2 = 7,
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FIRMWARE_BOOTROM_SUBTYPE_RIVERHEAD = 8,
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};
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enum {
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FIRMWARE_MCFW_SUBTYPE_COSIM = 0,
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FIRMWARE_MCFW_SUBTYPE_HALFSPEED = 6,
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FIRMWARE_MCFW_SUBTYPE_FLORENCE = 7,
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FIRMWARE_MCFW_SUBTYPE_ZEBEDEE = 8,
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FIRMWARE_MCFW_SUBTYPE_ERMINTRUDE = 9,
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FIRMWARE_MCFW_SUBTYPE_DYLAN = 10,
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FIRMWARE_MCFW_SUBTYPE_BRIAN = 11,
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FIRMWARE_MCFW_SUBTYPE_DOUGAL = 12,
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FIRMWARE_MCFW_SUBTYPE_MR_RUSTY = 13,
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FIRMWARE_MCFW_SUBTYPE_BUXTON = 14,
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FIRMWARE_MCFW_SUBTYPE_HOPE = 15,
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FIRMWARE_MCFW_SUBTYPE_MR_MCHENRY = 16,
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FIRMWARE_MCFW_SUBTYPE_UNCLE_HAMISH = 17,
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FIRMWARE_MCFW_SUBTYPE_TUTTLE = 18,
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FIRMWARE_MCFW_SUBTYPE_FINLAY = 19,
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FIRMWARE_MCFW_SUBTYPE_KAPTEYN = 20,
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FIRMWARE_MCFW_SUBTYPE_JOHNSON = 21,
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FIRMWARE_MCFW_SUBTYPE_GEHRELS = 22,
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FIRMWARE_MCFW_SUBTYPE_WHIPPLE = 23,
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FIRMWARE_MCFW_SUBTYPE_FORBES = 24,
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FIRMWARE_MCFW_SUBTYPE_LONGMORE = 25,
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FIRMWARE_MCFW_SUBTYPE_HERSCHEL = 26,
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FIRMWARE_MCFW_SUBTYPE_SHOEMAKER = 27,
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FIRMWARE_MCFW_SUBTYPE_IKEYA = 28,
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FIRMWARE_MCFW_SUBTYPE_KOWALSKI = 29,
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FIRMWARE_MCFW_SUBTYPE_NIMRUD = 30,
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FIRMWARE_MCFW_SUBTYPE_SPARTA = 31,
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FIRMWARE_MCFW_SUBTYPE_THEBES = 32,
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FIRMWARE_MCFW_SUBTYPE_ICARUS = 33,
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FIRMWARE_MCFW_SUBTYPE_JERICHO = 34,
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FIRMWARE_MCFW_SUBTYPE_BYBLOS = 35,
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FIRMWARE_MCFW_SUBTYPE_GROAT = 36,
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FIRMWARE_MCFW_SUBTYPE_SHILLING = 37,
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FIRMWARE_MCFW_SUBTYPE_FLORIN = 38,
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FIRMWARE_MCFW_SUBTYPE_THREEPENCE = 39,
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FIRMWARE_MCFW_SUBTYPE_CYCLOPS = 40,
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FIRMWARE_MCFW_SUBTYPE_PENNY = 41,
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FIRMWARE_MCFW_SUBTYPE_BOB = 42,
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FIRMWARE_MCFW_SUBTYPE_HOG = 43,
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FIRMWARE_MCFW_SUBTYPE_SOVEREIGN = 44,
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FIRMWARE_MCFW_SUBTYPE_SOLIDUS = 45,
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FIRMWARE_MCFW_SUBTYPE_SIXPENCE = 46,
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FIRMWARE_MCFW_SUBTYPE_CROWN = 47,
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FIRMWARE_MCFW_SUBTYPE_SOL = 48,
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FIRMWARE_MCFW_SUBTYPE_TANNER = 49,
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FIRMWARE_MCFW_SUBTYPE_BELUGA = 64,
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FIRMWARE_MCFW_SUBTYPE_KALUGA = 65,
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};
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enum {
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FIRMWARE_DISABLED_CALLISTO_SUBTYPE_ALL = 0
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};
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enum {
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FIRMWARE_FPGA_SUBTYPE_PTP = 1, /* PTP peripheral */
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FIRMWARE_FPGA_SUBTYPE_PTP_MR_MCHENRY = 2, /* PTP peripheral on R7 boards */
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FIRMWARE_FPGA_SUBTYPE_FLORENCE = 3, /* Modena FPGA */
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FIRMWARE_FPGA_SUBTYPE_UNCLE_HAMISH = 4, /* Modena FPGA: Unknown silicon */
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FIRMWARE_FPGA_SUBTYPE_UNCLE_HAMISH_A7 = 5, /* Modena FPGA: A7 silicon */
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FIRMWARE_FPGA_SUBTYPE_UNCLE_HAMISH_A5 = 6, /* Modena FPGA: A5 silicon */
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FIRMWARE_FPGA_SUBTYPE_SHOEMAKER = 7, /* Sorrento FPGA: Unknown silicon */
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FIRMWARE_FPGA_SUBTYPE_SHOEMAKER_A5 = 8, /* Sorrento FPGA: A5 silicon */
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FIRMWARE_FPGA_SUBTYPE_SHOEMAKER_A7 = 9, /* Sorrento FPGA: A7 silicon */
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};
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enum {
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FIRMWARE_FCFW_SUBTYPE_MODENA = 1,
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FIRMWARE_FCFW_SUBTYPE_SORRENTO = 2,
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};
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enum {
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FIRMWARE_CPLD_SUBTYPE_SFA6902 = 1, /* CPLD on Modena (2-port) */
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};
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enum {
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FIRMWARE_LICENSE_SUBTYPE_AOE = 1, /* AOE */
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};
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enum {
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FIRMWARE_MUMFW_SUBTYPE_MADAM_BLUE = 1, /* Sorrento MUM firmware */
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FIRMWARE_MUMFW_SUBTYPE_ICARUS = 2, /* Malaga MUM firmware */
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FIRMWARE_MUMFW_SUBTYPE_JERICHO = 3, /* Emma MUM firmware */
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FIRMWARE_MUMFW_SUBTYPE_BYBLOS = 4, /* Pagnell MUM firmware */
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FIRMWARE_MUMFW_SUBTYPE_SHILLING = 5, /* Bradford R1.x MUM firmware */
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FIRMWARE_MUMFW_SUBTYPE_FLORIN = 6, /* Bingley MUM firmware */
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FIRMWARE_MUMFW_SUBTYPE_THREEPENCE = 7, /* Baildon MUM firmware */
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FIRMWARE_MUMFW_SUBTYPE_CYCLOPS = 8, /* Talbot MUM firmware */
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FIRMWARE_MUMFW_SUBTYPE_PENNY = 9, /* Batley MUM firmware */
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FIRMWARE_MUMFW_SUBTYPE_BOB = 10, /* Bradford R2.x MUM firmware */
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FIRMWARE_MUMFW_SUBTYPE_HOG = 11, /* Roxburgh MUM firmware */
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FIRMWARE_MUMFW_SUBTYPE_SOVEREIGN = 12, /* Stirling MUM firmware */
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FIRMWARE_MUMFW_SUBTYPE_SOLIDUS = 13, /* Roxburgh R2 MUM firmware */
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FIRMWARE_MUMFW_SUBTYPE_SIXPENCE = 14, /* Melrose MUM firmware for Dell cards */
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FIRMWARE_MUMFW_SUBTYPE_CROWN = 15, /* Coldstream MUM firmware */
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FIRMWARE_MUMFW_SUBTYPE_SOL = 16, /* Roxburgh R2 MUM firmware for Dell cards with signed-bundle-update */
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FIRMWARE_MUMFW_SUBTYPE_KALUGA = 17, /* York MUM firmware */
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FIRMWARE_MUMFW_SUBTYPE_STERLET = 18, /* Bourn MUM firmware */
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FIRMWARE_MUMFW_SUBTYPE_TANNER = 19, /* Melrose MUM firmware for channel cards */
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};
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#define FIRMWARE_UEFIROM_SUBTYPE_ALL FIRMWARE_UEFIROM_SUBTYPE_EF10
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enum {
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FIRMWARE_UEFIROM_SUBTYPE_EF10 = 0,
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};
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enum {
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FIRMWARE_BUNDLE_SUBTYPE_DELL_X2522_25G = 1, /* X2522-25G for Dell with bundle update support */
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FIRMWARE_BUNDLE_SUBTYPE_X2552 = 2, /* X2552 OCP NIC - firmware bundle */
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FIRMWARE_BUNDLE_SUBTYPE_DELL_X2562 = 3, /* X2562 OCP NIC for Dell - firmware bundle */
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FIRMWARE_BUNDLE_SUBTYPE_X2562 = 4, /* X2562 OCP NIC - firmware bundle */
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};
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enum {
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FIRMWARE_CMCFW_SUBTYPE_BELUGA = 1, /* Riverhead VCU1525 CMC firmware */
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FIRMWARE_CMCFW_SUBTYPE_KALUGA = 2, /* York (X3x42) board CMC firmware */
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};
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#endif
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